* Re: [PATCH v2] mm/debug_vm_pgtable: Fix kernel crash by checking for THP support
From: Anshuman Khandual @ 2020-06-09 2:47 UTC (permalink / raw)
To: Aneesh Kumar K.V, linux-mm, akpm; +Cc: linuxppc-dev
In-Reply-To: <20200608125252.407659-1-aneesh.kumar@linux.ibm.com>
On 06/08/2020 06:22 PM, Aneesh Kumar K.V wrote:
> Architectures can have CONFIG_TRANSPARENT_HUGEPAGE enabled but
> no THP support enabled based on platforms. For ex: with 4K
> PAGE_SIZE ppc64 supports THP only with radix translation.
>
> This results in below crash when running with hash translation and
> 4K PAGE_SIZE.
>
> kernel BUG at arch/powerpc/include/asm/book3s/64/hash-4k.h:140!
> cpu 0x61: Vector: 700 (Program Check) at [c000000ff948f860]
> pc: c0000000018810f8: debug_vm_pgtable+0x480/0x8b0
> lr: c0000000018810ec: debug_vm_pgtable+0x474/0x8b0
> ...
> [c000000ff948faf0] c000000001880fec debug_vm_pgtable+0x374/0x8b0 (unreliable)
> [c000000ff948fbf0] c000000000011648 do_one_initcall+0x98/0x4f0
> [c000000ff948fcd0] c000000001843928 kernel_init_freeable+0x330/0x3fc
> [c000000ff948fdb0] c0000000000122ac kernel_init+0x24/0x148
> [c000000ff948fe20] c00000000000cc44 ret_from_kernel_thread+0x5c/0x78
>
> Check for THP support correctly
>
> Cc: anshuman.khandual@arm.com
> Fixes: 399145f9eb6c ("mm/debug: add tests validating architecture page table helpers")
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
> ---
> mm/debug_vm_pgtable.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
> index 188c18908964..df3a3a08f4f8 100644
> --- a/mm/debug_vm_pgtable.c
> +++ b/mm/debug_vm_pgtable.c
> @@ -61,6 +61,9 @@ static void __init pmd_basic_tests(unsigned long pfn, pgprot_t prot)
> {
> pmd_t pmd = pfn_pmd(pfn, prot);
>
> + if (!has_transparent_hugepage())
> + return;
> +
> WARN_ON(!pmd_same(pmd, pmd));
> WARN_ON(!pmd_young(pmd_mkyoung(pmd_mkold(pmd))));
> WARN_ON(!pmd_dirty(pmd_mkdirty(pmd_mkclean(pmd))));
> @@ -80,6 +83,9 @@ static void __init pud_basic_tests(unsigned long pfn, pgprot_t prot)
> {
> pud_t pud = pfn_pud(pfn, prot);
>
> + if (!has_transparent_hugepage())
> + return;
> +
> WARN_ON(!pud_same(pud, pud));
> WARN_ON(!pud_young(pud_mkyoung(pud_mkold(pud))));
> WARN_ON(!pud_write(pud_mkwrite(pud_wrprotect(pud))));
>
Builds with THP on arc, s390 and runs with THP on x86 and arm64 platforms.
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
^ permalink raw reply
* [PATCH v2] selftests: powerpc: Fix CPU affinity for child process
From: Harish @ 2020-06-09 3:40 UTC (permalink / raw)
To: mpe; +Cc: srikar, kamalesh, shiganta, sandipan, Harish, linuxppc-dev
On systems with large number of cpus, test fails trying to set
affinity for child process by calling sched_setaffinity() with
smaller size for cpuset. This patch fixes it by making sure that
the size of allocated cpu set is dependent on the number of CPUs
as reported by get_nprocs().
Fixes: 00b7ec5c9cf3 ("selftests/powerpc: Import Anton's context_switch2 benchmark")
Reported-by: Shirisha Ganta <shiganta@in.ibm.com>
Signed-off-by: Harish <harish@linux.ibm.com>
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
.../powerpc/benchmarks/context_switch.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/tools/testing/selftests/powerpc/benchmarks/context_switch.c b/tools/testing/selftests/powerpc/benchmarks/context_switch.c
index a2e8c9da7fa5..de6c49d6f88f 100644
--- a/tools/testing/selftests/powerpc/benchmarks/context_switch.c
+++ b/tools/testing/selftests/powerpc/benchmarks/context_switch.c
@@ -19,6 +19,7 @@
#include <limits.h>
#include <sys/time.h>
#include <sys/syscall.h>
+#include <sys/sysinfo.h>
#include <sys/types.h>
#include <sys/shm.h>
#include <linux/futex.h>
@@ -104,8 +105,9 @@ static void start_thread_on(void *(*fn)(void *), void *arg, unsigned long cpu)
static void start_process_on(void *(*fn)(void *), void *arg, unsigned long cpu)
{
- int pid;
- cpu_set_t cpuset;
+ int pid, ncpus;
+ cpu_set_t *cpuset;
+ size_t size;
pid = fork();
if (pid == -1) {
@@ -116,12 +118,16 @@ static void start_process_on(void *(*fn)(void *), void *arg, unsigned long cpu)
if (pid)
return;
- CPU_ZERO(&cpuset);
- CPU_SET(cpu, &cpuset);
+ size = CPU_ALLOC_SIZE(ncpus);
+ ncpus = get_nprocs();
+ cpuset = CPU_ALLOC(ncpus);
+ CPU_ZERO_S(size, cpuset);
+ CPU_SET_S(cpu, size, cpuset);
- if (sched_setaffinity(0, sizeof(cpuset), &cpuset)) {
+ if (sched_setaffinity(0, size, cpuset)) {
perror("sched_setaffinity");
- exit(1);
+ CPU_FREE(cpuset);
+ exit(-1);
}
fn(arg);
--
2.24.1
^ permalink raw reply related
* Re: [PATCH 4/5] powerpc/lib: Add LKDTM accessor for patching addr
From: Christopher M. Riedl @ 2020-06-09 4:40 UTC (permalink / raw)
To: Christophe Leroy, linuxppc-dev, kernel-hardening
In-Reply-To: <a458667c-fb8d-a01f-130b-0fef733dd001@csgroup.eu>
On Wed Jun 3, 2020 at 9:14 AM, Christophe Leroy wrote:
>
>
>
>
> Le 03/06/2020 à 07:19, Christopher M. Riedl a écrit :
> > When live patching a STRICT_RWX kernel, a mapping is installed at a
> > "patching address" with temporary write permissions. Provide a
> > LKDTM-only accessor function for this address in preparation for a LKDTM
> > test which attempts to "hijack" this mapping by writing to it from
> > another CPU.
> >
> > Signed-off-by: Christopher M. Riedl <cmr@informatik.wtf>
> > ---
> > arch/powerpc/lib/code-patching.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
> > index df0765845204..c23453049116 100644
> > --- a/arch/powerpc/lib/code-patching.c
> > +++ b/arch/powerpc/lib/code-patching.c
> > @@ -52,6 +52,13 @@ int raw_patch_instruction(struct ppc_inst *addr, struct ppc_inst instr)
> > static struct mm_struct *patching_mm __ro_after_init;
> > static unsigned long patching_addr __ro_after_init;
> >
> > +#ifdef CONFIG_LKDTM
> > +unsigned long read_cpu_patching_addr(unsigned int cpu)
>
>
> If this fonction is not static, it means it is intended to be used from
> some other C file, so it should be declared in a .h too.
>
Yup agreed. This was left-over from the RFC to simplify using the LKDTM
test on a tree without this series. Will fix this in the next spin.
>
> Christophe
>
>
> > +{
> > + return patching_addr;
> > +}
> > +#endif
> > +
> > void __init poking_init(void)
> > {
> > spinlock_t *ptl; /* for protecting pte table */
> >
>
>
>
>
^ permalink raw reply
* Re: [PATCH 5/5] powerpc: Add LKDTM test to hijack a patch mapping
From: Christopher M. Riedl @ 2020-06-09 4:48 UTC (permalink / raw)
To: Christophe Leroy, linuxppc-dev, kernel-hardening
In-Reply-To: <6fcbff8c-fe24-f35c-ec95-84fdaa3b869c@csgroup.eu>
On Wed Jun 3, 2020 at 9:20 AM, Christophe Leroy wrote:
>
>
>
>
> Le 03/06/2020 à 07:19, Christopher M. Riedl a écrit :
> > When live patching with STRICT_KERNEL_RWX, the CPU doing the patching
> > must use a temporary mapping which allows for writing to kernel text.
> > During the entire window of time when this temporary mapping is in use,
> > another CPU could write to the same mapping and maliciously alter kernel
> > text. Implement a LKDTM test to attempt to exploit such a openings when
> > a CPU is patching under STRICT_KERNEL_RWX. The test is only implemented
> > on powerpc for now.
> >
> > The LKDTM "hijack" test works as follows:
> >
> > 1. A CPU executes an infinite loop to patch an instruction.
> > This is the "patching" CPU.
> > 2. Another CPU attempts to write to the address of the temporary
> > mapping used by the "patching" CPU. This other CPU is the
> > "hijacker" CPU. The hijack either fails with a segfault or
> > succeeds, in which case some kernel text is now overwritten.
> >
> > How to run the test:
> >
> > mount -t debugfs none /sys/kernel/debug
> > (echo HIJACK_PATCH > /sys/kernel/debug/provoke-crash/DIRECT)
> >
> > Signed-off-by: Christopher M. Riedl <cmr@informatik.wtf>
> > ---
> > drivers/misc/lkdtm/core.c | 1 +
> > drivers/misc/lkdtm/lkdtm.h | 1 +
> > drivers/misc/lkdtm/perms.c | 101 +++++++++++++++++++++++++++++++++++++
> > 3 files changed, 103 insertions(+)
> >
> > diff --git a/drivers/misc/lkdtm/core.c b/drivers/misc/lkdtm/core.c
> > index a5e344df9166..482e72f6a1e1 100644
> > --- a/drivers/misc/lkdtm/core.c
> > +++ b/drivers/misc/lkdtm/core.c
> > @@ -145,6 +145,7 @@ static const struct crashtype crashtypes[] = {
> > CRASHTYPE(WRITE_RO),
> > CRASHTYPE(WRITE_RO_AFTER_INIT),
> > CRASHTYPE(WRITE_KERN),
> > + CRASHTYPE(HIJACK_PATCH),
> > CRASHTYPE(REFCOUNT_INC_OVERFLOW),
> > CRASHTYPE(REFCOUNT_ADD_OVERFLOW),
> > CRASHTYPE(REFCOUNT_INC_NOT_ZERO_OVERFLOW),
> > diff --git a/drivers/misc/lkdtm/lkdtm.h b/drivers/misc/lkdtm/lkdtm.h
> > index 601a2156a0d4..bfcf3542370d 100644
> > --- a/drivers/misc/lkdtm/lkdtm.h
> > +++ b/drivers/misc/lkdtm/lkdtm.h
> > @@ -62,6 +62,7 @@ void lkdtm_EXEC_USERSPACE(void);
> > void lkdtm_EXEC_NULL(void);
> > void lkdtm_ACCESS_USERSPACE(void);
> > void lkdtm_ACCESS_NULL(void);
> > +void lkdtm_HIJACK_PATCH(void);
> >
> > /* lkdtm_refcount.c */
> > void lkdtm_REFCOUNT_INC_OVERFLOW(void);
> > diff --git a/drivers/misc/lkdtm/perms.c b/drivers/misc/lkdtm/perms.c
> > index 62f76d506f04..8bda3b56bc78 100644
> > --- a/drivers/misc/lkdtm/perms.c
> > +++ b/drivers/misc/lkdtm/perms.c
> > @@ -9,6 +9,7 @@
> > #include <linux/vmalloc.h>
> > #include <linux/mman.h>
> > #include <linux/uaccess.h>
> > +#include <linux/kthread.h>
> > #include <asm/cacheflush.h>
> >
> > /* Whether or not to fill the target memory area with do_nothing(). */
> > @@ -213,6 +214,106 @@ void lkdtm_ACCESS_NULL(void)
> > *ptr = tmp;
> > }
> >
> > +#if defined(CONFIG_PPC) && defined(CONFIG_STRICT_KERNEL_RWX)
>
>
> Why only PPC ? I understood that this applies also to x86. And
> regarless, the test should be able to run on other architectures,
> allthought for sure it will fail. That's the case for other tests.
>
I think the code patching details are different between architectures
and (for now) I am only comfortable enough with PPC to implement
something meaningful. The intent of the RFC versions was to try to get
some interest (hence the distribution to the hardening list) or feedback
about how this could work on other architectures.
There are a few other tests which are arch specific in LKDTM so it's not
completely unheard of :)
>
> > +#include <include/asm/code-patching.h>
> > +
> > +extern unsigned long read_cpu_patching_addr(unsigned int cpu);
>
>
> 'extern' keyword is useless for functions and shall be banned.
>
>
> Shouldn't this declaration be in asm/code-patching.h ?
>
Yes, left-over from the RFC version, this will be fixed in the next
spin.
>
> > +
> > +static struct ppc_inst * const patch_site = (struct ppc_inst *)&do_nothing;
> > +
> > +static int lkdtm_patching_cpu(void *data)
> > +{
> > + int err = 0;
> > + struct ppc_inst insn = ppc_inst(0xdeadbeef);
> > +
> > + pr_info("starting patching_cpu=%d\n", smp_processor_id());
> > + do {
> > + err = patch_instruction(patch_site, insn);
> > + } while (ppc_inst_equal(ppc_inst_read(READ_ONCE(patch_site)), insn) &&
> > + !err && !kthread_should_stop());
> > +
> > + if (err)
> > + pr_warn("patch_instruction returned error: %d\n", err);
> > +
> > + set_current_state(TASK_INTERRUPTIBLE);
> > + while (!kthread_should_stop()) {
> > + schedule();
> > + set_current_state(TASK_INTERRUPTIBLE);
> > + }
> > +
> > + return err;
> > +}
> > +
> > +void lkdtm_HIJACK_PATCH(void)
> > +{
> > + struct task_struct *patching_kthrd;
> > + struct ppc_inst original_insn;
> > + int patching_cpu, hijacker_cpu, attempts;
> > + unsigned long addr;
> > + bool hijacked;
> > +
> > + if (num_online_cpus() < 2) {
> > + pr_warn("need at least two cpus\n");
> > + return;
> > + }
> > +
> > + original_insn = ppc_inst_read(READ_ONCE(patch_site));
> > +
> > + hijacker_cpu = smp_processor_id();
> > + patching_cpu = cpumask_any_but(cpu_online_mask, hijacker_cpu);
> > +
> > + patching_kthrd = kthread_create_on_node(&lkdtm_patching_cpu, NULL,
> > + cpu_to_node(patching_cpu),
> > + "lkdtm_patching_cpu");
> > + kthread_bind(patching_kthrd, patching_cpu);
> > + wake_up_process(patching_kthrd);
> > +
> > + addr = offset_in_page(patch_site) | read_cpu_patching_addr(patching_cpu);
> > +
> > + pr_info("starting hijacker_cpu=%d\n", hijacker_cpu);
> > + for (attempts = 0; attempts < 100000; ++attempts) {
> > + /* Use __put_user to catch faults without an Oops */
> > + hijacked = !__put_user(0xbad00bad, (unsigned int *)addr);
> > +
> > + if (hijacked) {
> > + if (kthread_stop(patching_kthrd))
> > + goto out;
> > + break;
> > + }
> > + }
> > + pr_info("hijack attempts: %d\n", attempts);
> > +
> > + if (hijacked) {
> > + if (*(unsigned int *)READ_ONCE(patch_site) == 0xbad00bad)
> > + pr_err("overwrote kernel text\n");
> > + /*
> > + * There are window conditions where the hijacker cpu manages to
> > + * write to the patch site but the site gets overwritten again by
> > + * the patching cpu. We still consider that a "successful" hijack
> > + * since the hijacker cpu did not fault on the write.
> > + */
> > + pr_err("FAIL: wrote to another cpu's patching area\n");
> > + } else {
> > + kthread_stop(patching_kthrd);
> > + }
> > +
> > +out:
> > + /* Restore the original insn for any future lkdtm tests */
> > + patch_instruction(patch_site, original_insn);
> > +}
> > +
> > +#else
> > +
> > +void lkdtm_HIJACK_PATCH(void)
> > +{
> > + if (!IS_ENABLED(CONFIG_PPC))
> > + pr_err("XFAIL: this test is powerpc-only\n");
> > + if (!IS_ENABLED(CONFIG_STRICT_KERNEL_RWX))
> > + pr_err("XFAIL: this test requires CONFIG_STRICT_KERNEL_RWX\n");
> > +}
> > +
> > +#endif /* CONFIG_PPC && CONFIG_STRICT_KERNEL_RWX */
> > +
> > void __init lkdtm_perms_init(void)
> > {
> > /* Make sure we can write to __ro_after_init values during __init */
> >
>
>
> Christophe
>
>
>
>
^ permalink raw reply
* Re: [PATCH] cxl: Remove dead Kconfig options
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: linuxppc-dev, Andrew Donnellan; +Cc: fbarrat
In-Reply-To: <20200602040341.10152-1-ajd@linux.ibm.com>
On Tue, 2 Jun 2020 14:03:41 +1000, Andrew Donnellan wrote:
> The CXL_AFU_DRIVER_OPS and CXL_LIB Kconfig options were added to coordinate
> merging of new features. They no longer serve any purpose, so remove them.
Applied to powerpc/next.
[1/1] cxl: Remove dead Kconfig options
https://git.kernel.org/powerpc/c/f44b85da5e7450d0308695ba6f503d75fe6cc166
cheers
^ permalink raw reply
* Re: [PATCH] ocxl: Fix misleading comment
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: linuxppc-dev, Andrew Donnellan; +Cc: Frederic Barrat
In-Reply-To: <20200226043923.5481-1-ajd@linux.ibm.com>
On Wed, 26 Feb 2020 15:39:23 +1100, Andrew Donnellan wrote:
> In ocxl_context_free() we note that the AFU reference we're releasing was
> taken in "ocxl_context_init", a function that doesn't actually exist.
>
> Fix it to say ocxl_context_alloc() instead, which I expect was what was
> intended.
Applied to powerpc/next.
[1/1] ocxl: Fix misleading comment
https://git.kernel.org/powerpc/c/a0594e89c9dc8e37883cc0d6642d1baad9c0744e
cheers
^ permalink raw reply
* Re: [PATCH v3 0/7] Base support for POWER10
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: linuxppc-dev, Alistair Popple; +Cc: aneesh.kumar, mikey, npiggin
In-Reply-To: <20200521014341.29095-1-alistair@popple.id.au>
On Thu, 21 May 2020 11:43:34 +1000, Alistair Popple wrote:
> This series brings together several previously posted patches required for
> POWER10 support and introduces a new patch enabling POWER10 architected
> mode to enable booting as a POWER10 pseries guest.
>
> It includes support for enabling facilities related to MMA and prefix
> instructions.
>
> [...]
Patches 1-3 and 5-7 applied to powerpc/next.
[1/7] powerpc: Add new HWCAP bits
https://git.kernel.org/powerpc/c/ee988c11acf6f9464b7b44e9a091bf6afb3b3a49
[2/7] powerpc: Add support for ISA v3.1
https://git.kernel.org/powerpc/c/3fd5836ee801ab9ac5b314c26550e209bafa5eaa
[3/7] powerpc/dt_cpu_ftrs: Advertise support for ISA v3.1 if selected
https://git.kernel.org/powerpc/c/43d0d37acbe40a9a93d9891ca670638cd22116b1
[5/7] powerpc/dt_cpu_ftrs: Enable Prefixed Instructions
https://git.kernel.org/powerpc/c/c63d688c3dabca973c5a7da73d17422ad13f3737
[6/7] powerpc/dt_cpu_ftrs: Add MMA feature
https://git.kernel.org/powerpc/c/87939d50e5888bd78478d9aa9455f56b919df658
[7/7] powerpc: Add POWER10 architected mode
https://git.kernel.org/powerpc/c/a3ea40d5c7365e7e5c7c85b6f30b15142b397571
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/book3s64/kvm: Fix secondary page table walk warning during migration
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: paulus, Aneesh Kumar K.V, kvm-ppc; +Cc: linuxppc-dev
In-Reply-To: <20200528080456.87797-1-aneesh.kumar@linux.ibm.com>
On Thu, 28 May 2020 13:34:56 +0530, Aneesh Kumar K.V wrote:
> This patch fix the below warning reported during migration.
>
> find_kvm_secondary_pte called with kvm mmu_lock not held
> CPU: 23 PID: 5341 Comm: qemu-system-ppc Tainted: G W 5.7.0-rc5-kvm-00211-g9ccf10d6d088 #432
> NIP: c008000000fe848c LR: c008000000fe8488 CTR: 0000000000000000
> REGS: c000001e19f077e0 TRAP: 0700 Tainted: G W (5.7.0-rc5-kvm-00211-g9ccf10d6d088)
> MSR: 9000000000029033 <SF,HV,EE,ME,IR,DR,RI,LE> CR: 42222422 XER: 20040000
> CFAR: c00000000012f5ac IRQMASK: 0
> GPR00: c008000000fe8488 c000001e19f07a70 c008000000ffe200 0000000000000039
> GPR04: 0000000000000001 c000001ffc8b4900 0000000000018840 0000000000000007
> GPR08: 0000000000000003 0000000000000001 0000000000000007 0000000000000001
> GPR12: 0000000000002000 c000001fff6d9400 000000011f884678 00007fff70b70000
> GPR16: 00007fff7137cb90 00007fff7dcb4410 0000000000000001 0000000000000000
> GPR20: 000000000ffe0000 0000000000000000 0000000000000001 0000000000000000
> GPR24: 8000000000000000 0000000000000001 c000001e1f67e600 c000001e1fd82410
> GPR28: 0000000000001000 c000001e2e410000 0000000000000fff 0000000000000ffe
> NIP [c008000000fe848c] kvmppc_hv_get_dirty_log_radix+0x2e4/0x340 [kvm_hv]
> LR [c008000000fe8488] kvmppc_hv_get_dirty_log_radix+0x2e0/0x340 [kvm_hv]
> Call Trace:
> [c000001e19f07a70] [c008000000fe8488] kvmppc_hv_get_dirty_log_radix+0x2e0/0x340 [kvm_hv] (unreliable)
> [c000001e19f07b50] [c008000000fd42e4] kvm_vm_ioctl_get_dirty_log_hv+0x33c/0x3c0 [kvm_hv]
> [c000001e19f07be0] [c008000000eea878] kvm_vm_ioctl_get_dirty_log+0x30/0x50 [kvm]
> [c000001e19f07c00] [c008000000edc818] kvm_vm_ioctl+0x2b0/0xc00 [kvm]
> [c000001e19f07d50] [c00000000046e148] ksys_ioctl+0xf8/0x150
> [c000001e19f07da0] [c00000000046e1c8] sys_ioctl+0x28/0x80
> [c000001e19f07dc0] [c00000000003652c] system_call_exception+0x16c/0x240
> [c000001e19f07e20] [c00000000000d070] system_call_common+0xf0/0x278
> Instruction dump:
> 7d3a512a 4200ffd0 7ffefb78 4bfffdc4 60000000 3c820000 e8848468 3c620000
> e86384a8 38840010 4800673d e8410018 <0fe00000> 4bfffdd4 60000000 60000000
Applied to powerpc/next.
[1/1] powerpc/book3s64/kvm: Fix secondary page table walk warning during migration
https://git.kernel.org/powerpc/c/bf8036a4098d1548cdccf9ed5c523ef4e83e3c68
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/book3s64/radix/tlb: Determine hugepage flush correctly
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: linuxppc-dev, mpe, Aneesh Kumar K.V; +Cc: npiggin, Bharata B Rao
In-Reply-To: <20200513030616.152288-1-aneesh.kumar@linux.ibm.com>
On Wed, 13 May 2020 08:36:16 +0530, Aneesh Kumar K.V wrote:
> With a 64K page size flush with start and end value as below
> (start, end) = (721f680d0000, 721f680e0000) results in
> (hstart, hend) = (721f68200000, 721f68000000)
>
> Avoid doing a __tlbie_va_range with the wrong hstart and hend value in this
> case.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/book3s64/radix/tlb: Determine hugepage flush correctly
https://git.kernel.org/powerpc/c/8f53f9c0f68ab2168f637494b9e24034899c1310
cheers
^ permalink raw reply
* Re: [PATCH v3] powerpc/64s/pgtable: fix an undefined behaviour
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: mpe, Qian Cai; +Cc: linuxppc-dev, rashmicy, linux-kernel
In-Reply-To: <20200306044852.3236-1-cai@lca.pw>
On Thu, 5 Mar 2020 23:48:52 -0500, Qian Cai wrote:
> Booting a power9 server with hash MMU could trigger an undefined
> behaviour because pud_offset(p4d, 0) will do,
>
> 0 >> (PAGE_SHIFT:16 + PTE_INDEX_SIZE:8 + H_PMD_INDEX_SIZE:10)
>
> Fix it by converting pud_index() and friends to static inline
> functions.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/64s/pgtable: fix an undefined behaviour
https://git.kernel.org/powerpc/c/c2e929b18cea6cbf71364f22d742d9aad7f4677a
cheers
^ permalink raw reply
* Re: [PATCH -next] powerpc/powernv: add NULL check after kzalloc
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: mpe, benh, Chen Zhou, paulus; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <20200509020838.121660-1-chenzhou10@huawei.com>
On Sat, 9 May 2020 10:08:38 +0800, Chen Zhou wrote:
> Fixes coccicheck warning:
>
> ./arch/powerpc/platforms/powernv/opal.c:813:1-5:
> alloc with no test, possible model on line 814
>
> Add NULL check after kzalloc.
Applied to powerpc/next.
[1/1] powerpc/powernv: add NULL check after kzalloc
https://git.kernel.org/powerpc/c/ceffa63acce7165c442395b7d64a11ab8b5c5dca
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/8xx: Reduce time spent in allow_user_access() and friends
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: Christophe Leroy, Paul Mackerras, Benjamin Herrenschmidt,
Michael Ellerman
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <57425c33dd72f292b1a23570244b81419072a7aa.1586945153.git.christophe.leroy@c-s.fr>
On Wed, 15 Apr 2020 10:06:09 +0000 (UTC), Christophe Leroy wrote:
> To enable/disable kernel access to user space, the 8xx has to
> modify the properties of access group 1. This is done by writing
> predefined values into SPRN_Mx_AP registers.
>
> As of today, a __put_user() gives:
>
> 00000d64 <my_test>:
> d64: 3d 20 4f ff lis r9,20479
> d68: 61 29 ff ff ori r9,r9,65535
> d6c: 7d 3a c3 a6 mtspr 794,r9
> d70: 39 20 00 00 li r9,0
> d74: 90 83 00 00 stw r4,0(r3)
> d78: 3d 20 6f ff lis r9,28671
> d7c: 61 29 ff ff ori r9,r9,65535
> d80: 7d 3a c3 a6 mtspr 794,r9
> d84: 4e 80 00 20 blr
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/8xx: Reduce time spent in allow_user_access() and friends
https://git.kernel.org/powerpc/c/332ce969b763553e9c4d55069e1e15aba4ea560f
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/kprobes: Use probe_address() to read instructions
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: Christophe Leroy, Paul Mackerras, Benjamin Herrenschmidt,
Michael Ellerman, naveen.n.rao
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <7f24b5961a6839ff01df792816807f74ff236bf6.1582567319.git.christophe.leroy@c-s.fr>
On Mon, 24 Feb 2020 18:02:10 +0000 (UTC), Christophe Leroy wrote:
> In order to avoid Oopses, use probe_address() to read the
> instruction at the address where the trap happened.
Applied to powerpc/next.
[1/1] powerpc/kprobes: Use probe_address() to read instructions
https://git.kernel.org/powerpc/c/9ed5df69b79a22b40b20bc2132ba2495708b19c4
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/uaccess: Don't set KUAP by default on book3s/32
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: Christophe Leroy, Paul Mackerras, Benjamin Herrenschmidt,
Michael Ellerman
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <154a99399317b096ac1f04827b9f8d7a9179ddc1.1586962586.git.christophe.leroy@c-s.fr>
On Wed, 15 Apr 2020 14:57:09 +0000 (UTC), Christophe Leroy wrote:
> On book3s/32, KUAP is an heavy process as it requires to
> determine which segments are impacted and unlock/lock
> each of them.
>
> And since the implementation of user_access_begin/end, it
> is even worth for the time being because unlike __get_user(),
> user_access_begin doesn't make difference between read and write
> and unlocks access also for read allthought that's unneeded
> on book3s/32.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/uaccess: Don't set KUAP by default on book3s/32
https://git.kernel.org/powerpc/c/547e687b2981a115814962506068873d24983af7
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/uaccess: Don't set KUEP by default on book3s/32
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: Christophe Leroy, Paul Mackerras, Benjamin Herrenschmidt,
Michael Ellerman
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <1492bb150c1aaa53d99a604b49992e60ea20cd5f.1586962582.git.christophe.leroy@c-s.fr>
On Wed, 15 Apr 2020 14:57:11 +0000 (UTC), Christophe Leroy wrote:
> On book3s/32, KUEP is an heavy process as it requires to
> set/unset the NX bit in each of the 12 user segments
> everytime the kernel is entered/exited from/to user space.
>
> Don't select KUEP by default on book3s/32.
Applied to powerpc/next.
[1/1] powerpc/uaccess: Don't set KUEP by default on book3s/32
https://git.kernel.org/powerpc/c/c3ba4dbbd1d05b49ec01efe098e0a78857d3ce22
cheers
^ permalink raw reply
* Re: [PATCH v2 01/12] powerpc/52xx: Blacklist functions running with MMU disabled for kprobe
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: Christophe Leroy, Paul Mackerras, Benjamin Herrenschmidt,
Michael Ellerman, naveen.n.rao
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <1ae02b6637b87fc5aaa1d5012c3e2cb30e62b4a3.1585670437.git.christophe.leroy@c-s.fr>
On Tue, 31 Mar 2020 16:03:36 +0000 (UTC), Christophe Leroy wrote:
> kprobe does not handle events happening in real mode, all
> functions running with MMU disabled have to be blacklisted.
Applied to powerpc/next.
[01/12] powerpc/52xx: Blacklist functions running with MMU disabled for kprobe
https://git.kernel.org/powerpc/c/e83f01fdb9143a4f90b17fbf7d8b8b21efb2f968
[02/12] powerpc/82xx: Blacklist pq2_restart() for kprobe
https://git.kernel.org/powerpc/c/1740f15a99d30a5e2710b2b0754e65fc5ba68d1d
[03/12] powerpc/83xx: Blacklist mpc83xx_deep_resume() for kprobe
https://git.kernel.org/powerpc/c/7aa85127b1a170694b042cbc35a07afe3904173e
[04/12] powerpc/powermac: Blacklist functions running with MMU disabled for kprobe
https://git.kernel.org/powerpc/c/32a820670fa00419375a964ca8bc569e1499b90d
[05/12] powerpc/mem: Blacklist flush_dcache_icache_phys() for kprobe
https://git.kernel.org/powerpc/c/a64371b5d4fb37199dcd04cb7bf0132894018e33
[06/12] powerpc/32s: Make local symbols non visible in hash_low.
https://git.kernel.org/powerpc/c/f892c21d2efb3b86ecbf8f5a95ea4abeedcc91b0
[07/12] powerpc/32s: Blacklist functions running with MMU disabled for kprobe
https://git.kernel.org/powerpc/c/e6209318d63e2774c5ab214b14b948079e040064
[08/12] powerpc/rtas: Remove machine_check_in_rtas()
https://git.kernel.org/powerpc/c/32746dfe4cf37f4077929601e8877a7fd02676e8
[09/12] powerpc/32: Blacklist functions running with MMU disabled for kprobe
https://git.kernel.org/powerpc/c/5f32e8361cba8c58c4f272a389296f489ecc2823
[10/12] powerpc/entry32: Blacklist exception entry points for kprobe.
https://git.kernel.org/powerpc/c/a616c442119f2ea5641e6abc215d7255b73b982b
[11/12] powerpc/entry32: Blacklist syscall exit points for kprobe.
https://git.kernel.org/powerpc/c/7cdf4401388572f720403a7038a178a4b30ac14c
[12/12] powerpc/entry32: Blacklist exception exit points for kprobe.
https://git.kernel.org/powerpc/c/e51c3e13709fe55d4d0eb50ba435bc53a64152bf
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/32: disable KASAN with pages bigger than 16k
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: Paul Mackerras, Benjamin Herrenschmidt, Michael Ellerman,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <7195fcde7314ccbf7a081b356084a69d421b10d4.1590660977.git.christophe.leroy@csgroup.eu>
On Thu, 28 May 2020 10:17:04 +0000 (UTC), Christophe Leroy wrote:
> Mapping of early shadow area is implemented by using a single static
> page table having all entries pointing to the same early shadow page.
> The shadow area must therefore occupy full PGD entries.
>
> The shadow area has a size of 128Mbytes starting at 0xf8000000.
> With 4k pages, a PGD entry is 4Mbytes
> With 16k pages, a PGD entry is 64Mbytes
> With 64k pages, a PGD entry is 256Mbytes which is too big.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/32: Disable KASAN with pages bigger than 16k
https://git.kernel.org/powerpc/c/888468ce725a4cd56d72dc7e5096078f7a9251a0
cheers
^ permalink raw reply
* Re: [PATCH v2] powerpc/32s: Fix another build failure with CONFIG_PPC_KUAP_DEBUG
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: Paul Mackerras, Benjamin Herrenschmidt, Michael Ellerman,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <b459e1600b969047a74e34251a84a3d6fdf1f312.1590858925.git.christophe.leroy@csgroup.eu>
On Sat, 30 May 2020 17:16:33 +0000 (UTC), Christophe Leroy wrote:
> 'thread' doesn't exist in kuap_check() macro.
>
> Use 'current' instead.
Applied to powerpc/next.
[1/1] powerpc/32s: Fix another build failure with CONFIG_PPC_KUAP_DEBUG
https://git.kernel.org/powerpc/c/74016701fe5f873ae23bf02835407227138d874d
cheers
^ permalink raw reply
* Re: [PATCH v4 00/45] Use hugepages to map kernel mem on 8xx
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: Paul Mackerras, Benjamin Herrenschmidt, Michael Ellerman,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1589866984.git.christophe.leroy@csgroup.eu>
On Tue, 19 May 2020 05:48:42 +0000 (UTC), Christophe Leroy wrote:
> The main purpose of this big series is to:
> - reorganise huge page handling to avoid using mm_slices.
> - use huge pages to map kernel memory on the 8xx.
>
> The 8xx supports 4 page sizes: 4k, 16k, 512k and 8M.
> It uses 2 Level page tables, PGD having 1024 entries, each entry
> covering 4M address space. Then each page table has 1024 entries.
>
> [...]
Patches 1-6 and 9-45 applied to powerpc/next.
[01/45] powerpc/kasan: Fix error detection on memory allocation
https://git.kernel.org/powerpc/c/d132443a73d7a131775df46f33000f67ed92de1e
[02/45] powerpc/kasan: Fix issues by lowering KASAN_SHADOW_END
https://git.kernel.org/powerpc/c/3a66a24f6060e6775f8c02ac52329ea0152d7e58
[03/45] powerpc/kasan: Fix shadow pages allocation failure
https://git.kernel.org/powerpc/c/d2a91cef9bbdeb87b7449fdab1a6be6000930210
[04/45] powerpc/kasan: Remove unnecessary page table locking
https://git.kernel.org/powerpc/c/7c31c05e00fc5ff2067332c5f80e525573e7269c
[05/45] powerpc/kasan: Refactor update of early shadow mappings
https://git.kernel.org/powerpc/c/7dec42ab57f2f59feba82abf0353164479bfde4c
[06/45] powerpc/kasan: Declare kasan_init_region() weak
https://git.kernel.org/powerpc/c/ec97d022f621c6c850aec46d8818b49c6aae95ad
[09/45] powerpc/ptdump: Add _PAGE_COHERENT flag
https://git.kernel.org/powerpc/c/3af4786eb429b2df76cbd7ce3bae21467ac3e4fb
[10/45] powerpc/ptdump: Display size of BATs
https://git.kernel.org/powerpc/c/6b30830e2003d9d77696084ebe2fc19dbe7d6f70
[11/45] powerpc/ptdump: Standardise display of BAT flags
https://git.kernel.org/powerpc/c/8961a2a5353cca5451f648f4838cd848a3b2354c
[12/45] powerpc/ptdump: Properly handle non standard page size
https://git.kernel.org/powerpc/c/b00ff6d8c1c3898b0f768cbb38ef722d25bd2f39
[13/45] powerpc/ptdump: Handle hugepd at PGD level
https://git.kernel.org/powerpc/c/6b789a26d7da2e0256d199da980369ef8fb49ec6
[14/45] powerpc/32s: Don't warn when mapping RO data ROX.
https://git.kernel.org/powerpc/c/4b19f96a81bceaf0bcf44d79c0855c61158065ec
[15/45] powerpc/mm: Allocate static page tables for fixmap
https://git.kernel.org/powerpc/c/925ac141d106b55acbe112a9272f970631a3c082
[16/45] powerpc/mm: Fix conditions to perform MMU specific management by blocks on PPC32.
https://git.kernel.org/powerpc/c/4e3319c23a66dabfd6c35f4d2633d64d99b68096
[17/45] powerpc/mm: PTE_ATOMIC_UPDATES is only for 40x
https://git.kernel.org/powerpc/c/fadaac67c9007cad9fc485e36dcc54460d6d5886
[18/45] powerpc/mm: Refactor pte_update() on nohash/32
https://git.kernel.org/powerpc/c/2db99aeb63dd6e8808dc054d181c4d0e8645bbe0
[19/45] powerpc/mm: Refactor pte_update() on book3s/32
https://git.kernel.org/powerpc/c/1c1bf294882bd12669e39ccd7680c4ce34b7c15c
[20/45] powerpc/mm: Standardise __ptep_test_and_clear_young() params between PPC32 and PPC64
https://git.kernel.org/powerpc/c/c7fa77016eb6093df38fdabdb7a89bb9617e7185
[21/45] powerpc/mm: Standardise pte_update() prototype between PPC32 and PPC64
https://git.kernel.org/powerpc/c/06f52524870122fb43b214d27e8f4546da36f8ba
[22/45] powerpc/mm: Create a dedicated pte_update() for 8xx
https://git.kernel.org/powerpc/c/6ad41bfbc907be0cd414f09fa5382d2133376595
[23/45] powerpc/mm: Reduce hugepd size for 8M hugepages on 8xx
https://git.kernel.org/powerpc/c/b12c07a4bb064c0a8db7554557b89d40f57c936f
[24/45] powerpc/8xx: Drop CONFIG_8xx_COPYBACK option
https://git.kernel.org/powerpc/c/d3efcd38c0b99162d889e36a30425345a18edb33
[25/45] powerpc/8xx: Prepare handlers for _PAGE_HUGE for 512k pages.
https://git.kernel.org/powerpc/c/a891c43b97d315ee5f9fe8e797d3d48fc351e053
[26/45] powerpc/8xx: Manage 512k huge pages as standard pages.
https://git.kernel.org/powerpc/c/b250c8c08c79d1eb5354c7eaa84b7505f5f2d921
[27/45] powerpc/8xx: Only 8M pages are hugepte pages now
https://git.kernel.org/powerpc/c/d4870b89acd7c362ded08f9295e8d143cf7e0024
[28/45] powerpc/8xx: MM_SLICE is not needed anymore
https://git.kernel.org/powerpc/c/555904d07eef3a2e5fc458419edf6174362c4ddd
[29/45] powerpc/8xx: Move PPC_PIN_TLB options into 8xx Kconfig
https://git.kernel.org/powerpc/c/5d4656696c30cef56b2ab506b203533c818af04d
[30/45] powerpc/8xx: Add function to set pinned TLBs
https://git.kernel.org/powerpc/c/f76c8f6d257cefda60221c83af7f97d9f74cb3ce
[31/45] powerpc/8xx: Don't set IMMR map anymore at boot
https://git.kernel.org/powerpc/c/136a9a0f74d2e0d9de5515190fe80344b86b45cf
[32/45] powerpc/8xx: Always pin TLBs at startup.
https://git.kernel.org/powerpc/c/684c1664e0de63398aceb748343541b48d398710
[33/45] powerpc/8xx: Drop special handling of Linear and IMMR mappings in I/D TLB handlers
https://git.kernel.org/powerpc/c/400dc0f86102d2ad11d3601f1948fbb02e926431
[34/45] powerpc/8xx: Remove now unused TLB miss functions
https://git.kernel.org/powerpc/c/1251288e64ba44969e1c4d59e5ee88a6e873447b
[35/45] powerpc/8xx: Move DTLB perf handling closer.
https://git.kernel.org/powerpc/c/0c8c2c9c201b44eed6c10d7c5c8d25fe5aab87ce
[36/45] powerpc/mm: Don't be too strict with _etext alignment on PPC32
https://git.kernel.org/powerpc/c/a0591b60eef965f7f5255ad4696bbba9af4b43d0
[37/45] powerpc/8xx: Refactor kernel address boundary comparison
https://git.kernel.org/powerpc/c/c8bef10a9f17b2b9549e37878b2bcd48039c136b
[38/45] powerpc/8xx: Add a function to early map kernel via huge pages
https://git.kernel.org/powerpc/c/34536d78068318def0a370462cbc3319e1ca9014
[39/45] powerpc/8xx: Map IMMR with a huge page
https://git.kernel.org/powerpc/c/a623bb5861dc442dc8de9edc9b3116f8b7c235c4
[40/45] powerpc/8xx: Map linear memory with huge pages
https://git.kernel.org/powerpc/c/cf209951fa7f2e7a8ec92f45f27ea11bc024bbfc
[41/45] powerpc/8xx: Allow STRICT_KERNEL_RwX with pinned TLB
https://git.kernel.org/powerpc/c/da1adea07576722da4597b0df7d00931f0203229
[42/45] powerpc/8xx: Allow large TLBs with DEBUG_PAGEALLOC
https://git.kernel.org/powerpc/c/fcdafd10a363cf3278ce29c6c9a92930380c6cd8
[43/45] powerpc/8xx: Implement dedicated kasan_init_region()
https://git.kernel.org/powerpc/c/a2feeb2c2ecbd9c9206d66f238ca710b760c9ef5
[44/45] powerpc/32s: Allow mapping with BATs with DEBUG_PAGEALLOC
https://git.kernel.org/powerpc/c/2b279c0348af62f42be346c1ea6d70bac98df0f9
[45/45] powerpc/32s: Implement dedicated kasan_init_region()
https://git.kernel.org/powerpc/c/7974c4732642f710b5111165ae1f7f7fed822282
cheers
^ permalink raw reply
* Re: [PATCH 0/3] powerpc/xive: PCI hotplug fixes under PowerVM
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: Cédric Le Goater, Michael Ellerman; +Cc: linuxppc-dev
In-Reply-To: <20200429075122.1216388-1-clg@kaod.org>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 1022 bytes --]
On Wed, 29 Apr 2020 09:51:19 +0200, Cédric Le Goater wrote:
> Here are a couple of fixes for PCI hotplug issues for machines running
> under the POWER hypervisor using hash MMU and the XIVE interrupt mode.
>
> Commit 1ca3dec2b2df ("powerpc/xive: Prevent page fault issues in the
> machine crash handler") forced the mapping of the XIVE ESB page and
> this is now blocking the removal of a passthrough IO adapter because
> the PCI isolation fails with "valid outstanding translations". Under
> KVM, the ESB pages for the adapter interrupts are un-mapped from the
> guest by the hypervisor in the KVM XIVE native device. This is is now
> redundant but it's harmless.
>
> [...]
Patches 1 & 3 pplied to powerpc/next.
[1/3] powerpc/xive: Clear the page tables for the ESB IO mapping
https://git.kernel.org/powerpc/c/a101950fcb78b0ba20cd487be6627dea58d55c2b
[3/3] powerpc/xive: Do not expose a debugfs file when XIVE is disabled
https://git.kernel.org/powerpc/c/0755e85570a4615ca674ad6489d44d63916f1f3e
cheers
^ permalink raw reply
* Re: [PATCH v5 00/13] Modernise powerpc 40x
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: michal.simek, Christophe Leroy, Paul Mackerras,
Benjamin Herrenschmidt, Michael Ellerman, arnd
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1590079968.git.christophe.leroy@csgroup.eu>
On Thu, 21 May 2020 16:55:51 +0000 (UTC), Christophe Leroy wrote:
> v1 and v2 of this series were aiming at removing 40x entirely,
> but it led to protests.
>
> v3 is trying to start modernising powerpc 40x:
> - Rework TLB miss handlers to not use PTE_ATOMIC_UPDATES and _PAGE_HWWRITE
> - Remove old versions of 40x processors, namely 403 and 405GP and associated
> errata.
> - Last two patches are trivial changes in TLB miss handlers to reduce number
> of scratch registers.
>
> [...]
Applied to powerpc/next.
[01/13] powerpc: Remove Xilinx PPC405/PPC440 support
https://git.kernel.org/powerpc/c/7ade8495dcfd788a76e6877c9ea86f5207369ea4
[02/13] powerpc/40x: Rework 40x PTE access and TLB miss
https://git.kernel.org/powerpc/c/2c74e2586bb96012ffc05f1c819b05d9cad86d6e
[03/13] powerpc/pgtable: Drop PTE_ATOMIC_UPDATES
https://git.kernel.org/powerpc/c/4e1df545e2fae53e07c93b835c3dcc9d4917c849
[04/13] powerpc/40x: Remove support for IBM 403GCX
https://git.kernel.org/powerpc/c/1b5c0967ab8aa9424cdd5108de4e055d8aeaa9d0
[05/13] powerpc/40x: Remove STB03xxx
https://git.kernel.org/powerpc/c/7583b63c343c1076c89b2012fd8758473f046f5f
[06/13] powerpc/40x: Remove WALNUT
https://git.kernel.org/powerpc/c/5786074b96e38691a0cb3d3644ca2aa5d6d8830d
[07/13] powerpc/40x: Remove EP405
https://git.kernel.org/powerpc/c/548f5244f1064c9facb19c5e97c21e1e80102ea0
[08/13] powerpc/40x: Remove support for ISS Simulator
https://git.kernel.org/powerpc/c/2874ec75708eed59a47a9a986c02add747ae6e9b
[09/13] powerpc/40x: Remove support for IBM 405GP
https://git.kernel.org/powerpc/c/7d372d4ccdd55d5ead4d4ecbc336af4dd7d04344
[10/13] powerpc/40x: Remove IBM405 Erratum #51
https://git.kernel.org/powerpc/c/59fb463b48e904dfdfff64c7dd4d67f20ae27170
[11/13] powerpc: Remove IBM405 Erratum #77
https://git.kernel.org/powerpc/c/455531e9d88048c025ff9099796413df748d92b9
[12/13] powerpc/40x: Avoid using r12 in TLB miss handlers
https://git.kernel.org/powerpc/c/797f4016f6da4a90ac83e32b213b68ff7be3812b
[13/13] powerpc/40x: Don't save CR in SPRN_SPRG_SCRATCH6
https://git.kernel.org/powerpc/c/3aacaa719b7bf135551cabde2480e8f7bfdf7c7d
cheers
^ permalink raw reply
* Re: [PATCH] macintosh/ams-input: switch to using input device polling mode
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Dmitry Torokhov
Cc: Jean Delvare, linuxppc-dev, linux-kernel
In-Reply-To: <20191002214854.GA114387@dtor-ws>
On Wed, 2 Oct 2019 14:48:54 -0700, Dmitry Torokhov wrote:
> Now that instances of input_dev support polling mode natively,
> we no longer need to create input_polled_dev instance.
Applied to powerpc/next.
[1/1] macintosh/ams-input: switch to using input device polling mode
https://git.kernel.org/powerpc/c/0c444d98efad89e2a189d1a5a188e0385edac647
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/fadump: account for memory_limit while reserving memory
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: linuxppc-dev, Michael Ellerman, Hari Bathini
Cc: Sourabh Jain, stable, Mahesh J Salgaonkar, Vasant Hegde,
kbuild test robot
In-Reply-To: <159057266320.22331.6571453892066907320.stgit@hbathini.in.ibm.com>
On Wed, 27 May 2020 15:14:35 +0530, Hari Bathini wrote:
> If the memory chunk found for reserving memory overshoots the memory
> limit imposed, do not proceed with reserving memory. Default behavior
> was this until commit 140777a3d8df ("powerpc/fadump: consider reserved
> ranges while reserving memory") changed it unwittingly.
Applied to powerpc/next.
[1/1] powerpc/fadump: Account for memory_limit while reserving memory
https://git.kernel.org/powerpc/c/9a2921e5baca1d25eb8d21f21d1e90581a6d0f68
cheers
^ permalink raw reply
* Re: [PATCHv4] powerpc/crashkernel: take "mem=" option into account
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: linuxppc-dev, Pingfan Liu; +Cc: kexec, Hari Bathini
In-Reply-To: <1585749644-4148-1-git-send-email-kernelfans@gmail.com>
On Wed, 1 Apr 2020 22:00:44 +0800, Pingfan Liu wrote:
> 'mem=" option is an easy way to put high pressure on memory during some
> test. Hence after applying the memory limit, instead of total mem, the
> actual usable memory should be considered when reserving mem for
> crashkernel. Otherwise the boot up may experience OOM issue.
>
> E.g. it would reserve 4G prior to the change and 512M afterward, if passing
> crashkernel="2G-4G:384M,4G-16G:512M,16G-64G:1G,64G-128G:2G,128G-:4G", and
> mem=5G on a 256G machine.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/crashkernel: Take "mem=" option into account
https://git.kernel.org/powerpc/c/be5470e0c285a68dc3afdea965032f5ddc8269d7
cheers
^ permalink raw reply
* Re: [PATCH v10 0/5] powerpc/hv-24x7: Expose chip/sockets info to add json file metric support for the hv_24x7 socket/chip level events
From: Michael Ellerman @ 2020-06-09 5:28 UTC (permalink / raw)
To: suka, Kajol Jain, mpe, linuxppc-dev, nathanl
Cc: ravi.bangoria, maddy, mpetlan, gregkh, alexander.shishkin, peterz,
anju, mamatha4, jmario, namhyung
In-Reply-To: <20200525104308.9814-1-kjain@linux.ibm.com>
On Mon, 25 May 2020 16:13:02 +0530, Kajol Jain wrote:
> Patchset fixes the inconsistent results we are getting when
> we run multiple 24x7 events.
>
> "hv_24x7" pmu interface events needs system dependent parameter
> like socket/chip/core. For example, hv_24x7 chip level events needs
> specific chip-id to which the data is requested should be added as part
> of pmu events.
>
> [...]
Applied to powerpc/next.
[1/5] powerpc/perf/hv-24x7: Fix inconsistent output values incase multiple hv-24x7 events run
https://git.kernel.org/powerpc/c/b4ac18eead28611ff470d0f47a35c4e0ac080d9c
[2/5] powerpc/hv-24x7: Add rtas call in hv-24x7 driver to get processor details
https://git.kernel.org/powerpc/c/8ba21426738207711347335b2cf3e99c690fc777
[3/5] powerpc/hv-24x7: Add sysfs files inside hv-24x7 device to show processor details
https://git.kernel.org/powerpc/c/60beb65da1efd4cc23d05141181c39b98487950f
[4/5] Documentation/ABI: Add ABI documentation for chips and sockets
https://git.kernel.org/powerpc/c/15cd1d35ba4a59832df693858ef046457107bd8d
[5/5] powerpc/pseries: Update hv-24x7 information after migration
https://git.kernel.org/powerpc/c/373b373053384f12951ae9f916043d955501d482
cheers
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox