* [RFC PATCH 00/35] Move all PCIBIOS* definitions into arch/x86
From: Saheed O. Bolarinwa @ 2020-07-13 12:22 UTC (permalink / raw)
To: helgaas
Cc: Rich Felker, Martin K. Petersen, linux-sh, linux-pci, linux-nvme,
Yicong Yang, Keith Busch, netdev, Paul Mackerras, linux-i2c,
bcm-kernel-feedback-list, sparclinux, rfi, Toan Le, Greg Ungerer,
Marek Vasut, Rob Herring, Stefano Stabellini, Sagi Grimberg,
Yoshinori Sato, linux-scsi, Greg Kroah-Hartman, linux-atm-general,
Russell King, Realtek linux nic maintainers, Christoph Hellwig,
Ley Foon Tan, Geert Uytterhoeven, Rafał Miłecki,
Chas Williams, xen-devel, Matt Turner, linux-mips,
linux-kernel-mentees, Kevin Hilman, Guenter Roeck, linux-hwmon,
Jean Delvare, Andrew Donnellan, Arnd Bergmann, Ray Jui,
James E.J. Bottomley, Yue Wang, Jens Axboe, Jakub Kicinski,
linux-m68k, Lorenzo Pieralisi, Ivan Kokshaysky, Michael Buesch,
skhan, bjorn, linux-amlogic, Boris Ostrovsky, Guan Xuetao,
linux-arm-kernel, Richard Henderson, Juergen Gross, Michal Simek,
Thomas Bogendoerfer, Scott Branden, Bjorn Helgaas, Jingoo Han,
Saheed O. Bolarinwa, Yoshihiro Shimoda, linux-wireless,
linux-kernel, linux-renesas-soc, Brian King, Philipp Zabel,
linux-alpha, Frederic Barrat, Gustavo Pimentel, linuxppc-dev,
David S. Miller, Heiner Kallweit
This goal of these series is to move the definition of *all* PCIBIOS* from
include/linux/pci.h to arch/x86 and limit their use within there.
All other tree specific definition will be left for intact. Maybe they can
be renamed.
PCIBIOS* is an x86 concept as defined by the PCI spec. The returned error
codes of PCIBIOS* are positive values and this introduces some complexities
which other archs need not incur.
PLAN:
1. [PATCH v0 1-36] Replace all PCIBIOS_SUCCESSFUL with 0
2a. Audit all functions returning PCIBIOS_* error values directly or
indirectly and prevent possible bug coming in (2b)
2b. Make all functions returning PCIBIOS_* error values call
pcibios_err_to_errno(). *This will change their behaviour, for good.*
3. Clone a pcibios_err_to_errno() into arch/x86/pci/pcbios.c as _v2.
This handles the positive error codes directly and will not use any
PCIBIOS* definitions. So calls to it have no outside dependence.
4. Make all x86 codes that needs to convert to -E* values call the
cloned version - pcibios_err_to_errno_v2()
5. Assign PCIBIOS_* errors values directly to generic -E* errors
6. Refactor pcibios_err_to_errno() and mark it deprecated
7. Replace all calls to pcibios_err_to_errno() with the proper -E* value
or 0.
8. Remove all PCIBIOS* definitions in include/linux/pci.h and
pcibios_err_to_errno() too.
9. Redefine all PCIBIOS* definitions with original values inside
arch/x86/pci/pcbios.c
10. Redefine pcibios_err_to_errno() inside arch/x86/pci/pcbios.c
11. Replace pcibios_err_to_errno_v2() calls with pcibios_err_to_errno()
12. Remove pcibios_err_to_errno_v2()
Suggested-by: Bjorn Helgaas <bjorn@helgaas.com>
Suggested-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
Bolarinwa Olayemi Saheed (35):
Change PCIBIOS_SUCCESSFUL to 0
Change PCIBIOS_SUCCESSFUL to 0
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Change PCIBIOS_SUCCESSFUL to 0
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Change PCIBIOS_SUCCESSFUL to 0
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Fix Style ERROR: assignment in if condition
Change PCIBIOS_SUCCESSFUL to 0
Change PCIBIOS_SUCCESSFUL to 0
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Change PCIBIOS_SUCCESSFUL to 0
Change PCIBIOS_SUCCESSFUL to 0
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
Change PCIBIOS_SUCCESSFUL to 0
Tidy Success/Failure checks
arch/alpha/kernel/core_apecs.c | 4 +--
arch/alpha/kernel/core_cia.c | 4 +--
arch/alpha/kernel/core_irongate.c | 4 +--
arch/alpha/kernel/core_lca.c | 4 +--
arch/alpha/kernel/core_marvel.c | 4 +--
arch/alpha/kernel/core_mcpcia.c | 4 +--
arch/alpha/kernel/core_polaris.c | 4 +--
arch/alpha/kernel/core_t2.c | 4 +--
arch/alpha/kernel/core_titan.c | 4 +--
arch/alpha/kernel/core_tsunami.c | 4 +--
arch/alpha/kernel/core_wildfire.c | 4 +--
arch/alpha/kernel/sys_miata.c | 2 +-
arch/arm/common/it8152.c | 4 +--
arch/arm/mach-cns3xxx/pcie.c | 2 +-
arch/arm/mach-footbridge/dc21285.c | 4 +--
arch/arm/mach-iop32x/pci.c | 6 ++--
arch/arm/mach-ixp4xx/common-pci.c | 8 ++---
arch/arm/mach-orion5x/pci.c | 4 +--
arch/arm/plat-orion/pcie.c | 8 ++---
arch/m68k/coldfire/pci.c | 8 ++---
arch/microblaze/pci/indirect_pci.c | 4 +--
arch/mips/pci/fixup-ath79.c | 2 +-
arch/mips/pci/ops-bcm63xx.c | 14 ++++----
arch/mips/pci/ops-bonito64.c | 4 +--
arch/mips/pci/ops-gt64xxx_pci0.c | 4 +--
arch/mips/pci/ops-lantiq.c | 4 +--
arch/mips/pci/ops-loongson2.c | 4 +--
arch/mips/pci/ops-mace.c | 4 +--
arch/mips/pci/ops-msc.c | 4 +--
arch/mips/pci/ops-rc32434.c | 6 ++--
arch/mips/pci/ops-sni.c | 4 +--
arch/mips/pci/ops-tx3927.c | 2 +-
arch/mips/pci/ops-tx4927.c | 2 +-
arch/mips/pci/ops-vr41xx.c | 4 +--
arch/mips/pci/pci-alchemy.c | 6 ++--
arch/mips/pci/pci-ar2315.c | 5 ++-
arch/mips/pci/pci-ar71xx.c | 4 +--
arch/mips/pci/pci-ar724x.c | 6 ++--
arch/mips/pci/pci-bcm1480.c | 4 +--
arch/mips/pci/pci-bcm1480ht.c | 4 +--
arch/mips/pci/pci-mt7620.c | 4 +--
arch/mips/pci/pci-octeon.c | 12 +++----
arch/mips/pci/pci-rt2880.c | 4 +--
arch/mips/pci/pci-rt3883.c | 4 +--
arch/mips/pci/pci-sb1250.c | 4 +--
arch/mips/pci/pci-virtio-guest.c | 4 +--
arch/mips/pci/pci-xlp.c | 4 +--
arch/mips/pci/pci-xlr.c | 4 +--
arch/mips/pci/pci-xtalk-bridge.c | 14 ++++----
arch/mips/pci/pcie-octeon.c | 4 +--
arch/mips/txx9/generic/pci.c | 5 ++-
arch/powerpc/kernel/rtas_pci.c | 4 +--
arch/powerpc/platforms/4xx/pci.c | 4 +--
arch/powerpc/platforms/52xx/efika.c | 4 +--
arch/powerpc/platforms/52xx/mpc52xx_pci.c | 4 +--
arch/powerpc/platforms/82xx/pq2.c | 2 +-
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 2 +-
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 2 +-
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 2 +-
arch/powerpc/platforms/chrp/pci.c | 8 ++---
arch/powerpc/platforms/embedded6xx/holly.c | 2 +-
.../platforms/embedded6xx/mpc7448_hpc2.c | 2 +-
arch/powerpc/platforms/fsl_uli1575.c | 2 +-
arch/powerpc/platforms/maple/pci.c | 18 +++++-----
arch/powerpc/platforms/pasemi/pci.c | 6 ++--
arch/powerpc/platforms/powermac/pci.c | 8 ++---
arch/powerpc/platforms/powernv/eeh-powernv.c | 4 +--
arch/powerpc/platforms/powernv/pci.c | 4 +--
arch/powerpc/platforms/pseries/eeh_pseries.c | 4 +--
arch/powerpc/sysdev/fsl_pci.c | 2 +-
arch/powerpc/sysdev/indirect_pci.c | 4 +--
arch/powerpc/sysdev/tsi108_pci.c | 4 +--
arch/sh/drivers/pci/common.c | 3 +-
arch/sh/drivers/pci/ops-dreamcast.c | 4 +--
arch/sh/drivers/pci/ops-sh4.c | 4 +--
arch/sh/drivers/pci/ops-sh7786.c | 8 ++---
arch/sh/drivers/pci/pci.c | 2 +-
arch/sparc/kernel/pci_common.c | 28 +++++++--------
arch/unicore32/kernel/pci.c | 4 +--
drivers/atm/iphase.c | 20 ++++++-----
drivers/atm/lanai.c | 8 ++---
drivers/bcma/driver_pci_host.c | 4 +--
drivers/hwmon/sis5595.c | 13 +++----
drivers/hwmon/via686a.c | 13 +++----
drivers/hwmon/vt8231.c | 13 +++----
drivers/i2c/busses/i2c-ali15x3.c | 5 ++-
drivers/i2c/busses/i2c-nforce2.c | 3 +-
drivers/i2c/busses/i2c-sis5595.c | 15 +++-----
drivers/misc/cxl/vphb.c | 4 +--
drivers/net/ethernet/realtek/r8169_main.c | 2 +-
drivers/nvme/host/pci.c | 2 +-
drivers/pci/access.c | 14 ++++----
drivers/pci/controller/dwc/pci-meson.c | 4 +--
.../pci/controller/dwc/pcie-designware-host.c | 2 +-
drivers/pci/controller/dwc/pcie-designware.c | 4 +--
drivers/pci/controller/dwc/pcie-hisi.c | 4 +--
drivers/pci/controller/dwc/pcie-tegra194.c | 4 +--
.../pci/controller/mobiveil/pcie-mobiveil.c | 4 +--
drivers/pci/controller/pci-aardvark.c | 4 +--
drivers/pci/controller/pci-ftpci100.c | 4 +--
drivers/pci/controller/pci-hyperv.c | 8 ++---
drivers/pci/controller/pci-mvebu.c | 4 +--
drivers/pci/controller/pci-thunder-ecam.c | 36 +++++++++----------
drivers/pci/controller/pci-thunder-pem.c | 4 +--
drivers/pci/controller/pci-xgene.c | 5 ++-
drivers/pci/controller/pcie-altera.c | 16 ++++-----
drivers/pci/controller/pcie-iproc.c | 10 +++---
drivers/pci/controller/pcie-mediatek.c | 4 +--
drivers/pci/controller/pcie-rcar-host.c | 8 ++---
drivers/pci/controller/pcie-rockchip-host.c | 10 +++---
drivers/pci/pci-bridge-emul.c | 14 ++++----
drivers/pci/pci.c | 8 ++---
drivers/pci/pcie/bw_notification.c | 4 +--
drivers/pci/probe.c | 4 +--
drivers/pci/quirks.c | 4 +--
drivers/pci/syscall.c | 8 ++---
drivers/pci/xen-pcifront.c | 2 +-
drivers/scsi/ipr.c | 16 ++++-----
drivers/scsi/pmcraid.c | 6 ++--
drivers/ssb/driver_gige.c | 4 +--
drivers/ssb/driver_pcicore.c | 4 +--
drivers/xen/xen-pciback/conf_space.c | 2 +-
122 files changed, 347 insertions(+), 369 deletions(-)
--
2.18.2
^ permalink raw reply
* [PATCH 2/2] powerpc/kvm/cma: Improve kernel log during boot
From: Aneesh Kumar K.V @ 2020-07-13 15:07 UTC (permalink / raw)
To: linuxppc-dev, mpe; +Cc: Aneesh Kumar K.V
In-Reply-To: <20200713150749.25245-1-aneesh.kumar@linux.ibm.com>
Current kernel gives:
[ 0.000000] cma: Reserved 26224 MiB at 0x0000007959000000
[ 0.000000] hugetlb_cma: reserve 65536 MiB, up to 16384 MiB per node
[ 0.000000] cma: Reserved 16384 MiB at 0x0000001800000000
With the fix
[ 0.000000] kvm_cma_reserve: reserving 26214 MiB for global area
[ 0.000000] cma: Reserved 26224 MiB at 0x0000007959000000
[ 0.000000] hugetlb_cma: reserve 65536 MiB, up to 16384 MiB per node
[ 0.000000] cma: Reserved 16384 MiB at 0x0000001800000000
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
---
arch/powerpc/kvm/book3s_hv_builtin.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c
index 7cd3cf3d366b..073617ce83e0 100644
--- a/arch/powerpc/kvm/book3s_hv_builtin.c
+++ b/arch/powerpc/kvm/book3s_hv_builtin.c
@@ -113,7 +113,7 @@ void __init kvm_cma_reserve(void)
selected_size = (selected_size * kvm_cma_resv_ratio / 100) << PAGE_SHIFT;
if (selected_size) {
- pr_debug("%s: reserving %ld MiB for global area\n", __func__,
+ pr_info("%s: reserving %ld MiB for global area\n", __func__,
(unsigned long)selected_size / SZ_1M);
align_size = HPT_ALIGN_PAGES << PAGE_SHIFT;
cma_declare_contiguous(0, selected_size, 0, align_size,
--
2.26.2
^ permalink raw reply related
* [PATCH 1/2] powerpc/hugetlb/cma: Allocate gigantic hugetlb pages using CMA
From: Aneesh Kumar K.V @ 2020-07-13 15:07 UTC (permalink / raw)
To: linuxppc-dev, mpe; +Cc: Aneesh Kumar K.V
commit: cf11e85fc08c ("mm: hugetlb: optionally allocate gigantic hugepages using cma")
added support for allocating gigantic hugepages using CMA. This patch
enables the same for powerpc
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
---
arch/powerpc/include/asm/hugetlb.h | 7 +++++++
arch/powerpc/kernel/setup-common.c | 3 +++
arch/powerpc/mm/hugetlbpage.c | 18 ++++++++++++++++++
3 files changed, 28 insertions(+)
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index 551a9d4d3958..013165e62618 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -57,6 +57,7 @@ int huge_ptep_set_access_flags(struct vm_area_struct *vma,
unsigned long addr, pte_t *ptep,
pte_t pte, int dirty);
+void gigantic_hugetlb_cma_reserve(void) __init;
#include <asm-generic/hugetlb.h>
#else /* ! CONFIG_HUGETLB_PAGE */
@@ -71,6 +72,12 @@ static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
{
return NULL;
}
+
+
+static inline void __init gigantic_hugetlb_cma_reserve(void)
+{
+}
+
#endif /* CONFIG_HUGETLB_PAGE */
#endif /* _ASM_POWERPC_HUGETLB_H */
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 9d3faac53295..b198b0ff25bc 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -928,6 +928,9 @@ void __init setup_arch(char **cmdline_p)
/* Reserve large chunks of memory for use by CMA for KVM. */
kvm_cma_reserve();
+ /* Reserve large chunks of memory for us by CMA for hugetlb */
+ gigantic_hugetlb_cma_reserve();
+
klp_init_thread_info(&init_task);
init_mm.start_code = (unsigned long)_stext;
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index e9bfbccd975d..26292544630f 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -684,3 +684,21 @@ void flush_dcache_icache_hugepage(struct page *page)
}
}
}
+
+void __init gigantic_hugetlb_cma_reserve(void)
+{
+ unsigned long order = 0;
+
+ if (radix_enabled())
+ order = PUD_SHIFT - PAGE_SHIFT;
+ else if (!firmware_has_feature(FW_FEATURE_LPAR) && mmu_psize_defs[MMU_PAGE_16G].shift)
+ /*
+ * For pseries we do use ibm,expected#pages for reserving 16G pages.
+ */
+ order = mmu_psize_to_shift(MMU_PAGE_16G) - PAGE_SHIFT;
+
+ if (order) {
+ VM_WARN_ON(order < MAX_ORDER);
+ hugetlb_cma_reserve(order);
+ }
+}
--
2.26.2
^ permalink raw reply related
* Re: [PATCH v5] ima: move APPRAISE_BOOTPARAM dependency on ARCH_POLICY to runtime
From: Bruno Meneguele @ 2020-07-13 15:03 UTC (permalink / raw)
To: Mimi Zohar
Cc: linux-s390, nayna, erichte, x86, linux-kernel, stable,
linux-integrity, linuxppc-dev
In-Reply-To: <20200710192516.GC10547@glitch>
[-- Attachment #1: Type: text/plain, Size: 5872 bytes --]
On Fri, Jul 10, 2020 at 04:25:16PM -0300, Bruno Meneguele wrote:
> On Fri, Jul 10, 2020 at 02:54:48PM -0400, Mimi Zohar wrote:
> > On Fri, 2020-07-10 at 15:34 -0300, Bruno Meneguele wrote:
> > > On Fri, Jul 10, 2020 at 03:03:38PM -0300, Bruno Meneguele wrote:
> > > > On Fri, Jul 10, 2020 at 01:23:24PM -0400, Mimi Zohar wrote:
> > > > > On Thu, 2020-07-09 at 13:46 -0300, Bruno Meneguele wrote:
> > > > > > APPRAISE_BOOTPARAM has been marked as dependent on !ARCH_POLICY in compile
> > > > > > time, enforcing the appraisal whenever the kernel had the arch policy option
> > > > > > enabled.
> > > > >
> > > > > > However it breaks systems where the option is set but the system didn't
> > > > > > boot in a "secure boot" platform. In this scenario, anytime an appraisal
> > > > > > policy (i.e. ima_policy=appraisal_tcb) is used it will be forced, without
> > > > > > giving the user the opportunity to label the filesystem, before enforcing
> > > > > > integrity.
> > > > > >
> > > > > > Considering the ARCH_POLICY is only effective when secure boot is actually
> > > > > > enabled this patch remove the compile time dependency and move it to a
> > > > > > runtime decision, based on the secure boot state of that platform.
> > > > >
> > > > > Perhaps we could simplify this patch description a bit?
> > > > >
> > > > > The IMA_APPRAISE_BOOTPARAM config allows enabling different
> > > > > "ima_appraise=" modes - log, fix, enforce - at run time, but not when
> > > > > IMA architecture specific policies are enabled. This prevents
> > > > > properly labeling the filesystem on systems where secure boot is
> > > > > supported, but not enabled on the platform. Only when secure boot is
> > > > > enabled, should these IMA appraise modes be disabled.
> > > > >
> > > > > This patch removes the compile time dependency and makes it a runtime
> > > > > decision, based on the secure boot state of that platform.
> > > > >
> > > >
> > > > Sounds good to me.
> > > >
> > > > > <snip>
> > > > >
> > > > > > diff --git a/security/integrity/ima/ima_appraise.c b/security/integrity/ima/ima_appraise.c
> > > > > > index a9649b04b9f1..884de471b38a 100644
> > > > > > --- a/security/integrity/ima/ima_appraise.c
> > > > > > +++ b/security/integrity/ima/ima_appraise.c
> > > > > > @@ -19,6 +19,11 @@
> > > > > > static int __init default_appraise_setup(c
> > > > >
> > > > > > har *str)
> > > > > > {
> > > > > > #ifdef CONFIG_IMA_APPRAISE_BOOTPARAM
> > > > > > + if (arch_ima_get_secureboot()) {
> > > > > > + pr_info("appraise boot param ignored: secure boot enabled");
> > > > >
> > > > > Instead of a generic statement, is it possible to include the actual
> > > > > option being denied? Perhaps something like: "Secure boot enabled,
> > > > > ignoring %s boot command line option"
> > > > >
> > > > > Mimi
> > > > >
> > > >
> > > > Yes, sure.
> > > >
> > >
> > > Btw, would it make sense to first make sure we have a valid "str"
> > > option and not something random to print?
> > >
> > > diff --git a/security/integrity/ima/ima_appraise.c b/security/integrity/ima/ima_appraise.c
> > > index a9649b04b9f1..1f1175531d3e 100644
> > > --- a/security/integrity/ima/ima_appraise.c
> > > +++ b/security/integrity/ima/ima_appraise.c
> > > @@ -25,6 +25,16 @@ static int __init default_appraise_setup(char *str)
> > > ima_appraise = IMA_APPRAISE_LOG;
> > > else if (strncmp(str, "fix", 3) == 0)
> > > ima_appraise = IMA_APPRAISE_FIX;
> > > + else
> > > + pr_info("invalid \"%s\" appraise option");
> > > +
> > > + if (arch_ima_get_secureboot()) {
> > > + if (!is_ima_appraise_enabled()) {
> > > + pr_info("Secure boot enabled: ignoring ima_appraise=%s boot parameter option",
> > > + str);
> > > + ima_appraise = IMA_APPRAISE_ENFORCE;
> > > + }
> > > + }
> >
> > Providing feedback is probably a good idea. However, the
> > "arch_ima_get_secureboot" test can't come after setting
> > "ima_appraise."
> >
>
> Sorry, but I'm not sure if I got the reason to why it can't be done
> after: would it be basically to prevent any further processing about
> ima_appraise as a matter of security principle? Or maybe to keep the
> dependency between secureboot and bootparam truly strict?
>
> Or are there something else I'm missing?
>
I'm going to send a v6 with the pr_info() placed in the beginning
directly printing 'str', thus we can have the actual issue solved.
Then later I send another patches to handle the other cases of limiting
'str' printing and also giving the user a feedback about invalid
ima_appraise= options. So we can discuss further on that.
Thanks Mimi.
> > Mimi
> >
> > > #endif
> > > return 1;
> > > }
> > >
> > >
> > > The "else" there I think would make sense as well, at least to give the
> > > user some feedback about a possible mispelling of him (as a separate
> > > patch).
> > >
> > > And "if(!is_ima_appraise_enabled())" would avoid to print anything about
> > > "ignoring the option" to the user in case he explicitly set "enforce",
> > > which we know there isn't any real effect but is allowed and shown in
> > > kernel-parameters.txt.
> > >
> > > > Thanks!
> > > >
> > > > > > + return 1;
> > > > > > + }
> > > > > > +
> > > > > > if (strncmp(str, "off", 3) == 0)
> > > > > > ima_appraise = 0;
> > > > > > else if (strncmp(str, "log", 3) == 0)
> > > > >
> > > >
> > > > --
> > > > bmeneg
> > > > PGP Key: http://bmeneg.com/pubkey.txt
> > >
> > >
> > >
> >
>
> --
> bmeneg
> PGP Key: http://bmeneg.com/pubkey.txt
--
bmeneg
PGP Key: http://bmeneg.com/pubkey.txt
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* [PATCH v2] powerpc/perf: Add kernel support for new MSR[HV PR] bits in trace-imc
From: Madhavan Srinivasan @ 2020-07-13 14:46 UTC (permalink / raw)
To: mpe; +Cc: Anju T Sudhakar, linuxppc-dev, Madhavan Srinivasan
From: Anju T Sudhakar <anju@linux.vnet.ibm.com>
IMC trace-mode record has MSR[HV PR] bits added in the third DW.
These bits can be used to set the cpumode for the instruction pointer
captured in each sample.
Add support in kernel to use these bits to set the cpumode for
each sample.
Signed-off-by: Anju T Sudhakar <anju@linux.vnet.ibm.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
---
Changelog v1:
- Changed check to use CPU_FTR_ARCH_31
arch/powerpc/include/asm/imc-pmu.h | 5 +++++
arch/powerpc/perf/imc-pmu.c | 29 ++++++++++++++++++++++++-----
2 files changed, 29 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/imc-pmu.h b/arch/powerpc/include/asm/imc-pmu.h
index 4da4fcba0684..4f897993b710 100644
--- a/arch/powerpc/include/asm/imc-pmu.h
+++ b/arch/powerpc/include/asm/imc-pmu.h
@@ -99,6 +99,11 @@ struct trace_imc_data {
*/
#define IMC_TRACE_RECORD_TB1_MASK 0x3ffffffffffULL
+/*
+ * Bit 0:1 in third DW of IMC trace record
+ * specifies the MSR[HV PR] values.
+ */
+#define IMC_TRACE_RECORD_VAL_HVPR(x) ((x) >> 62)
/*
* Device tree parser code detects IMC pmu support and
diff --git a/arch/powerpc/perf/imc-pmu.c b/arch/powerpc/perf/imc-pmu.c
index 0edcfd0b491d..a45d694a5d5d 100644
--- a/arch/powerpc/perf/imc-pmu.c
+++ b/arch/powerpc/perf/imc-pmu.c
@@ -1288,11 +1288,30 @@ static int trace_imc_prepare_sample(struct trace_imc_data *mem,
header->size = sizeof(*header) + event->header_size;
header->misc = 0;
- if (is_kernel_addr(data->ip))
- header->misc |= PERF_RECORD_MISC_KERNEL;
- else
- header->misc |= PERF_RECORD_MISC_USER;
-
+ if (cpu_has_feature(CPU_FTR_ARCH_31)) {
+ switch (IMC_TRACE_RECORD_VAL_HVPR(mem->val)) {
+ case 0:/* when MSR HV and PR not set in the trace-record */
+ header->misc |= PERF_RECORD_MISC_GUEST_KERNEL;
+ break;
+ case 1: /* MSR HV is 0 and PR is 1 */
+ header->misc |= PERF_RECORD_MISC_GUEST_USER;
+ break;
+ case 2: /* MSR HV is 1 and PR is 0 */
+ header->misc |= PERF_RECORD_MISC_HYPERVISOR;
+ break;
+ case 3: /* MSR HV is 1 and PR is 1 */
+ header->misc |= PERF_RECORD_MISC_USER;
+ break;
+ default:
+ pr_info("IMC: Unable to set the flag based on MSR bits\n");
+ break;
+ }
+ } else {
+ if (is_kernel_addr(data->ip))
+ header->misc |= PERF_RECORD_MISC_KERNEL;
+ else
+ header->misc |= PERF_RECORD_MISC_USER;
+ }
perf_event_header__init_id(header, data, event);
return 0;
--
2.26.2
^ permalink raw reply related
* Re: [RFC PATCH 4/7] x86: use exit_lazy_tlb rather than membarrier_mm_sync_core_before_usermode
From: Mathieu Desnoyers @ 2020-07-13 14:13 UTC (permalink / raw)
To: Nicholas Piggin
Cc: linux-arch, Arnd Bergmann, Peter Zijlstra, x86, linux-kernel,
linux-mm, Andy Lutomirski, linuxppc-dev
In-Reply-To: <1594647408.wmrazhwjzb.astroid@bobo.none>
----- On Jul 13, 2020, at 9:47 AM, Nicholas Piggin npiggin@gmail.com wrote:
> Excerpts from Nicholas Piggin's message of July 13, 2020 2:45 pm:
>> Excerpts from Andy Lutomirski's message of July 11, 2020 3:04 am:
>>> Also, as it stands, I can easily see in_irq() ceasing to promise to
>>> serialize. There are older kernels for which it does not promise to
>>> serialize. And I have plans to make it stop serializing in the
>>> nearish future.
>>
>> You mean x86's return from interrupt? Sounds fun... you'll konw where to
>> update the membarrier sync code, at least :)
>
> Oh, I should actually say Mathieu recently clarified a return from
> interrupt doesn't fundamentally need to serialize in order to support
> membarrier sync core.
Clarification to your statement:
Return from interrupt to kernel code does not need to be context serializing
as long as kernel serializes before returning to user-space.
However, return from interrupt to user-space needs to be context serializing.
Thanks,
Mathieu
>
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2020-July/214171.html
>
> So you may not need to do anything more if you relaxed it.
>
> Thanks,
> Nick
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
^ permalink raw reply
* Re: [RFC PATCH 4/7] x86: use exit_lazy_tlb rather than membarrier_mm_sync_core_before_usermode
From: Nicholas Piggin @ 2020-07-13 13:47 UTC (permalink / raw)
To: Andy Lutomirski
Cc: linux-arch, Arnd Bergmann, Peter Zijlstra, X86 ML, LKML, Linux-MM,
Mathieu Desnoyers, linuxppc-dev
In-Reply-To: <1594613902.1wzayj0p15.astroid@bobo.none>
Excerpts from Nicholas Piggin's message of July 13, 2020 2:45 pm:
> Excerpts from Andy Lutomirski's message of July 11, 2020 3:04 am:
>> Also, as it stands, I can easily see in_irq() ceasing to promise to
>> serialize. There are older kernels for which it does not promise to
>> serialize. And I have plans to make it stop serializing in the
>> nearish future.
>
> You mean x86's return from interrupt? Sounds fun... you'll konw where to
> update the membarrier sync code, at least :)
Oh, I should actually say Mathieu recently clarified a return from
interrupt doesn't fundamentally need to serialize in order to support
membarrier sync core.
https://lists.ozlabs.org/pipermail/linuxppc-dev/2020-July/214171.html
So you may not need to do anything more if you relaxed it.
Thanks,
Nick
^ permalink raw reply
* [RFC PATCH 27/35] powerpc: Tidy Success/Failure checks
From: Saheed O. Bolarinwa @ 2020-07-13 12:22 UTC (permalink / raw)
To: helgaas, Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras
Cc: linuxppc-dev, Saheed O. Bolarinwa, skhan, linux-kernel, linux-pci,
bjorn, linux-kernel-mentees
In-Reply-To: <20200713122247.10985-1-refactormyself@gmail.com>
Remove unnecessary check for 0.
Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 26/35
arch/powerpc/platforms/powernv/eeh-powernv.c | 4 ++--
arch/powerpc/platforms/pseries/eeh_pseries.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 92f145dc9c1d..834cb6175cc4 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -318,7 +318,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (!edev || !edev->pcie_cap)
return 0;
- if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
+ if (pnv_pci_cfg_read(pdn, pos, 4, &header))
return 0;
else if (!header)
return 0;
@@ -331,7 +331,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (pos < 256)
break;
- if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
+ if (pnv_pci_cfg_read(pdn, pos, 4, &header))
break;
}
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index 9c023b928f2c..aec6f76879a9 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -200,7 +200,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (!edev || !edev->pcie_cap)
return 0;
- if (rtas_read_config(pdn, pos, 4, &header) != 0)
+ if (rtas_read_config(pdn, pos, 4, &header))
return 0;
else if (!header)
return 0;
@@ -213,7 +213,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (pos < 256)
break;
- if (rtas_read_config(pdn, pos, 4, &header) != 0)
+ if (rtas_read_config(pdn, pos, 4, &header))
break;
}
--
2.18.2
^ permalink raw reply related
* [RFC PATCH 26/35] powerpc: Change PCIBIOS_SUCCESSFUL to 0
From: Saheed O. Bolarinwa @ 2020-07-13 12:22 UTC (permalink / raw)
To: helgaas, Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras
Cc: linuxppc-dev, Saheed O. Bolarinwa, skhan, linux-kernel, linux-pci,
bjorn, linux-kernel-mentees
In-Reply-To: <20200713122247.10985-1-refactormyself@gmail.com>
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.
Change all PCIBIOS_SUCCESSFUL to 0
Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
arch/powerpc/kernel/rtas_pci.c | 4 ++--
arch/powerpc/platforms/4xx/pci.c | 4 ++--
arch/powerpc/platforms/52xx/efika.c | 4 ++--
arch/powerpc/platforms/52xx/mpc52xx_pci.c | 4 ++--
arch/powerpc/platforms/82xx/pq2.c | 2 +-
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 2 +-
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 2 +-
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 2 +-
arch/powerpc/platforms/chrp/pci.c | 8 ++++----
arch/powerpc/platforms/embedded6xx/holly.c | 2 +-
.../platforms/embedded6xx/mpc7448_hpc2.c | 2 +-
arch/powerpc/platforms/fsl_uli1575.c | 2 +-
arch/powerpc/platforms/maple/pci.c | 18 +++++++++---------
arch/powerpc/platforms/pasemi/pci.c | 6 +++---
arch/powerpc/platforms/powermac/pci.c | 8 ++++----
arch/powerpc/platforms/powernv/eeh-powernv.c | 4 ++--
arch/powerpc/platforms/powernv/pci.c | 4 ++--
arch/powerpc/platforms/pseries/eeh_pseries.c | 4 ++--
arch/powerpc/sysdev/fsl_pci.c | 2 +-
arch/powerpc/sysdev/indirect_pci.c | 4 ++--
arch/powerpc/sysdev/tsi108_pci.c | 4 ++--
21 files changed, 46 insertions(+), 46 deletions(-)
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 781c1869902e..18108ed9284c 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -71,7 +71,7 @@ int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
if (ret)
return PCIBIOS_DEVICE_NOT_FOUND;
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int rtas_pci_read_config(struct pci_bus *bus,
@@ -121,7 +121,7 @@ int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
if (ret)
return PCIBIOS_DEVICE_NOT_FOUND;
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int rtas_pci_write_config(struct pci_bus *bus,
diff --git a/arch/powerpc/platforms/4xx/pci.c b/arch/powerpc/platforms/4xx/pci.c
index c13d64c3b019..3e6799d987d2 100644
--- a/arch/powerpc/platforms/4xx/pci.c
+++ b/arch/powerpc/platforms/4xx/pci.c
@@ -1652,7 +1652,7 @@ static int ppc4xx_pciex_read_config(struct pci_bus *bus, unsigned int devfn,
dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int ppc4xx_pciex_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -1696,7 +1696,7 @@ static int ppc4xx_pciex_write_config(struct pci_bus *bus, unsigned int devfn,
dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops ppc4xx_pciex_pci_ops =
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c
index 4514a6f7458a..ef2584eb2dad 100644
--- a/arch/powerpc/platforms/52xx/efika.c
+++ b/arch/powerpc/platforms/52xx/efika.c
@@ -44,7 +44,7 @@ static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
*val = ret;
- return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+ return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
}
static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -58,7 +58,7 @@ static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
addr, len, val);
- return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+ return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
}
static struct pci_ops rtas_pci_ops = {
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index af0f79995214..b9c2d0a7077e 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -157,7 +157,7 @@ mpc52xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
out_be32(hose->cfg_addr, 0);
mb();
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int
@@ -221,7 +221,7 @@ mpc52xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
out_be32(hose->cfg_addr, 0);
mb();
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops mpc52xx_pci_ops = {
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c
index 3b5cb39a564c..c15b3b0ed118 100644
--- a/arch/powerpc/platforms/82xx/pq2.c
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -40,7 +40,7 @@ static int pq2_pci_exclude_device(struct pci_controller *hose,
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
else
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static void __init pq2_pci_add_bridge(struct device_node *np)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 172d2b7cfeb7..66f00eb2a8be 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -76,7 +76,7 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
return PCIBIOS_DEVICE_NOT_FOUND;
else
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int mpc85xx_cds_restart(struct notifier_block *this,
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 2157a8017aa4..f33ac8e04da6 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -118,7 +118,7 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
if (hose->dn == pci_with_uli)
return uli_exclude_device(hose, bus, devfn);
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
#endif /* CONFIG_PCI */
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index b697918b727d..36b38b28d40b 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -49,7 +49,7 @@ static int mpc86xx_exclude_device(struct pci_controller *hose,
if (hose->dn == fsl_pci_primary)
return uli_exclude_device(hose, bus, devfn);
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
#endif /* CONFIG_PCI */
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index b2c2bf35b76c..c8f8356607c7 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -55,7 +55,7 @@ static int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
*val = in_le32(cfg_data);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
@@ -82,7 +82,7 @@ static int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
out_le32(cfg_data, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops gg2_pci_ops =
@@ -106,7 +106,7 @@ static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
*val = ret;
- return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
+ return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
}
static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
@@ -120,7 +120,7 @@ static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset
rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
addr, len, val);
- return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
+ return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
}
static struct pci_ops rtas_pci_ops =
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c b/arch/powerpc/platforms/embedded6xx/holly.c
index d8f2e2c737bb..f9fca540c52a 100644
--- a/arch/powerpc/platforms/embedded6xx/holly.c
+++ b/arch/powerpc/platforms/embedded6xx/holly.c
@@ -47,7 +47,7 @@ static int holly_exclude_device(struct pci_controller *hose, u_char bus,
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
else
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static void holly_remap_bridge(void)
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index 15437abe1f6d..34f6a0ecdf67 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -55,7 +55,7 @@ int mpc7448_hpc2_exclude_device(struct pci_controller *hose,
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
else
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static void __init mpc7448_hpc2_setup_arch(void)
diff --git a/arch/powerpc/platforms/fsl_uli1575.c b/arch/powerpc/platforms/fsl_uli1575.c
index 044a20c1fbde..17c2cb5a8682 100644
--- a/arch/powerpc/platforms/fsl_uli1575.c
+++ b/arch/powerpc/platforms/fsl_uli1575.c
@@ -353,5 +353,5 @@ int uli_exclude_device(struct pci_controller *hose,
return PCIBIOS_DEVICE_NOT_FOUND;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index c86a66d5e998..4e49f465056d 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -142,7 +142,7 @@ static int u3_agp_read_config(struct pci_bus *bus, unsigned int devfn,
*val = in_le32(addr);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -173,7 +173,7 @@ static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn,
out_le32(addr, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops u3_agp_pci_ops =
@@ -223,7 +223,7 @@ static int u3_ht_root_read_config(struct pci_controller *hose, u8 offset,
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u3_ht_root_write_config(struct pci_controller *hose, u8 offset,
@@ -234,7 +234,7 @@ static int u3_ht_root_write_config(struct pci_controller *hose, u8 offset,
addr = hose->cfg_addr + ((offset & ~3) << 2) + (4 - len - (offset & 3));
if (offset >= PCI_BASE_ADDRESS_0 && offset < PCI_CAPABILITY_LIST)
- return PCIBIOS_SUCCESSFUL;
+ return 0;
switch (len) {
case 1:
@@ -248,7 +248,7 @@ static int u3_ht_root_write_config(struct pci_controller *hose, u8 offset,
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -286,7 +286,7 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
*val = in_le32(addr);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -323,7 +323,7 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
out_le32(addr, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops u3_ht_pci_ops =
@@ -397,7 +397,7 @@ static int u4_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
*val = in_le32(addr);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
int offset, int len, u32 val)
@@ -428,7 +428,7 @@ static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
out_le32(addr, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops u4_pcie_pci_ops =
diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
index 8779b107d872..e558a402532a 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -166,7 +166,7 @@ static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_BAD_REGISTER_NUMBER;
if (workaround_5945(bus, devfn, offset, len, val))
- return PCIBIOS_SUCCESSFUL;
+ return 0;
addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
@@ -188,7 +188,7 @@ static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -223,7 +223,7 @@ static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
out_le32(addr, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops pa_pxp_ops = {
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index e35eaa9cf938..bdc9a89b5181 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -307,7 +307,7 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
default:
*val = 0xfffffffful; break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
default:
return PCIBIOS_DEVICE_NOT_FOUND;
}
@@ -327,7 +327,7 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
*val = swap ? in_le32(addr) : in_be32(addr);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -350,7 +350,7 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
case 0:
break;
case 1:
- return PCIBIOS_SUCCESSFUL;
+ return 0;
default:
return PCIBIOS_DEVICE_NOT_FOUND;
}
@@ -370,7 +370,7 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
swap ? out_le32(addr, val) : out_be32(addr, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops u3_ht_pci_ops =
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 79409e005fcd..92f145dc9c1d 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -318,7 +318,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (!edev || !edev->pcie_cap)
return 0;
- if (pnv_pci_cfg_read(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+ if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
return 0;
else if (!header)
return 0;
@@ -331,7 +331,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (pos < 256)
break;
- if (pnv_pci_cfg_read(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+ if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
break;
}
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 091fe1cf386b..b3d5cc3e262a 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -685,7 +685,7 @@ int pnv_pci_cfg_read(struct pci_dn *pdn,
pr_devel("%s: bus: %x devfn: %x +%x/%x -> %08x\n",
__func__, pdn->busno, pdn->devfn, where, size, *val);
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
int pnv_pci_cfg_write(struct pci_dn *pdn,
@@ -710,7 +710,7 @@ int pnv_pci_cfg_write(struct pci_dn *pdn,
return PCIBIOS_FUNC_NOT_SUPPORTED;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
#if CONFIG_EEH
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index ace117f99d94..9c023b928f2c 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -200,7 +200,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (!edev || !edev->pcie_cap)
return 0;
- if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+ if (rtas_read_config(pdn, pos, 4, &header) != 0)
return 0;
else if (!header)
return 0;
@@ -213,7 +213,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (pos < 256)
break;
- if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+ if (rtas_read_config(pdn, pos, 4, &header) != 0)
break;
}
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 040b9d01c079..f1118c4443f4 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -697,7 +697,7 @@ static int mpc83xx_pcie_exclude_device(struct pci_bus *bus, unsigned int devfn)
return PCIBIOS_DEVICE_NOT_FOUND;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus,
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c
index 09b36617425e..35b21276609b 100644
--- a/arch/powerpc/sysdev/indirect_pci.c
+++ b/arch/powerpc/sysdev/indirect_pci.c
@@ -70,7 +70,7 @@ int __indirect_read_config(struct pci_controller *hose,
*val = in_le32(cfg_data);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
int indirect_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -148,7 +148,7 @@ int indirect_write_config(struct pci_bus *bus, unsigned int devfn,
out_le32(cfg_data, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops indirect_pci_ops =
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index 49f9541954f8..586dabb4e7ea 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -78,7 +78,7 @@ tsi108_direct_write_config(struct pci_bus *bus, unsigned int devfunc,
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
void tsi108_clear_pci_error(u32 pci_cfg_base)
@@ -167,7 +167,7 @@ tsi108_direct_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
printk("data = 0x%x\n", *val);
}
#endif
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
void tsi108_clear_pci_cfg_error(void)
--
2.18.2
^ permalink raw reply related
* [RFC PATCH 13/35] cxl: Change PCIBIOS_SUCCESSFUL to 0
From: Saheed O. Bolarinwa @ 2020-07-13 12:22 UTC (permalink / raw)
To: helgaas, Frederic Barrat, Andrew Donnellan, Arnd Bergmann,
Greg Kroah-Hartman
Cc: linuxppc-dev, Saheed O. Bolarinwa, skhan, linux-kernel, linux-pci,
bjorn, linux-kernel-mentees
In-Reply-To: <20200713122247.10985-1-refactormyself@gmail.com>
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
There scope should be limited within arch/x86.
Change all PCIBIOS_SUCCESSFUL to 0
Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
drivers/misc/cxl/vphb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/cxl/vphb.c b/drivers/misc/cxl/vphb.c
index 1cf320e2a415..1264253cc07b 100644
--- a/drivers/misc/cxl/vphb.c
+++ b/drivers/misc/cxl/vphb.c
@@ -150,7 +150,7 @@ static int cxl_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
out:
cxl_afu_configured_put(afu);
- return rc ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+ return rc ? PCIBIOS_DEVICE_NOT_FOUND : 0;
}
static int cxl_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -184,7 +184,7 @@ static int cxl_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
out:
cxl_afu_configured_put(afu);
- return rc ? PCIBIOS_SET_FAILED : PCIBIOS_SUCCESSFUL;
+ return rc ? PCIBIOS_SET_FAILED : 0;
}
static struct pci_ops cxl_pcie_pci_ops =
--
2.18.2
^ permalink raw reply related
* Re: [PATCH v2 01/10] powerpc/perf: Add support for ISA3.1 PMU SPRs
From: Michael Ellerman @ 2020-07-13 12:50 UTC (permalink / raw)
To: Athira Rajeev; +Cc: Michael Neuling, maddy, linuxppc-dev
In-Reply-To: <DF000FF6-EF09-4299-A4AD-EF76277A6EF4@linux.vnet.ibm.com>
Athira Rajeev <atrajeev@linux.vnet.ibm.com> writes:
>> On 08-Jul-2020, at 4:32 PM, Michael Ellerman <mpe@ellerman.id.au> wrote:
>>
>> Athira Rajeev <atrajeev@linux.vnet.ibm.com> writes:
>> ...
>>> diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
>>> index cd6a742..5c64bd3 100644
>>> --- a/arch/powerpc/perf/core-book3s.c
>>> +++ b/arch/powerpc/perf/core-book3s.c
>>> @@ -39,10 +39,10 @@ struct cpu_hw_events {
>>> unsigned int flags[MAX_HWEVENTS];
>>> /*
>>> * The order of the MMCR array is:
>>> - * - 64-bit, MMCR0, MMCR1, MMCRA, MMCR2
>>> + * - 64-bit, MMCR0, MMCR1, MMCRA, MMCR2, MMCR3
>>> * - 32-bit, MMCR0, MMCR1, MMCR2
>>> */
>>> - unsigned long mmcr[4];
>>> + unsigned long mmcr[5];
>>> struct perf_event *limited_counter[MAX_LIMITED_HWCOUNTERS];
>>> u8 limited_hwidx[MAX_LIMITED_HWCOUNTERS];
>>> u64 alternatives[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
>> ...
>>> @@ -1310,6 +1326,10 @@ static void power_pmu_enable(struct pmu *pmu)
>>> if (!cpuhw->n_added) {
>>> mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE);
>>> mtspr(SPRN_MMCR1, cpuhw->mmcr[1]);
>>> +#ifdef CONFIG_PPC64
>>> + if (ppmu->flags & PPMU_ARCH_310S)
>>> + mtspr(SPRN_MMCR3, cpuhw->mmcr[4]);
>>> +#endif /* CONFIG_PPC64 */
>>> goto out_enable;
>>> }
>>>
>>> @@ -1353,6 +1373,11 @@ static void power_pmu_enable(struct pmu *pmu)
>>> if (ppmu->flags & PPMU_ARCH_207S)
>>> mtspr(SPRN_MMCR2, cpuhw->mmcr[3]);
>>>
>>> +#ifdef CONFIG_PPC64
>>> + if (ppmu->flags & PPMU_ARCH_310S)
>>> + mtspr(SPRN_MMCR3, cpuhw->mmcr[4]);
>>> +#endif /* CONFIG_PPC64 */
>>
>> I don't think you need the #ifdef CONFIG_PPC64?
>
> Hi Michael
>
> Thanks for reviewing this series.
>
> SPRN_MMCR3 is not defined for PPC32 and we hit build failure for pmac32_defconfig.
> The #ifdef CONFIG_PPC64 is to address this.
We like to avoid #ifdefs in the body of the code like that.
There's a bunch of existing #defines near the top of the file to make
32-bit work, I think you should just add another for this, so eg:
#ifdef CONFIG_PPC32
...
#define SPRN_MMCR3 0
cheers
^ permalink raw reply
* Re: [PATCH v2 09/10] tools/perf: Add perf tools support for extended register capability in powerpc
From: Michael Ellerman @ 2020-07-13 12:47 UTC (permalink / raw)
To: Athira Rajeev; +Cc: mikey, maddy, linuxppc-dev
In-Reply-To: <FFC0AE06-9BF8-446C-B6D8-C4D62B61FDBE@linux.vnet.ibm.com>
Athira Rajeev <atrajeev@linux.vnet.ibm.com> writes:
>> On 08-Jul-2020, at 5:34 PM, Michael Ellerman <mpe@ellerman.id.au> wrote:
>>
>> Athira Rajeev <atrajeev@linux.vnet.ibm.com <mailto:atrajeev@linux.vnet.ibm.com>> writes:
>>> From: Anju T Sudhakar <anju@linux.vnet.ibm.com>
>>>
>>> Add extended regs to sample_reg_mask in the tool side to use
>>> with `-I?` option. Perf tools side uses extended mask to display
...
>>
>>> + */
>>> + get_cpuid(buffer, sizeof(buffer));
>>> + ret = sscanf(buffer, "%u,", &version);
>>
>> This is powerpc specific code, why not just use mfspr(SPRN_PVR), rather
>> than redirecting via printf/sscanf.
>
> Hi Michael
>
> For perf tools, defines for `mfspr` , `SPRN_PVR` are in arch/powerpc/util/header.c
> So I have re-used existing utility. Otherwise, we will need to include these defines here as well
> Does that sounds good ?
They should be moved to a header in that directory that both C files can include.
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/boot: add DTB to 'targets'
From: Michael Ellerman @ 2020-07-13 12:34 UTC (permalink / raw)
To: Masahiro Yamada, linux-kbuild
Cc: Christophe Leroy, Arnd Bergmann, Masahiro Yamada, Michal Simek,
linux-kernel, Paul Mackerras, linuxppc-dev
In-Reply-To: <20200713075629.5948-1-masahiroy@kernel.org>
Masahiro Yamada <masahiroy@kernel.org> writes:
> PowerPC always re-builds DTB even if nothing has been changed.
>
> As for other architectures, arch/*/boot/dts/Makefile builds DTB by
> using the dtb-y syntax.
>
> In contrast, arch/powerpc/boot/dts/(fsl/)Makefile does nothing unless
> CONFIG_OF_ALL_DTBS is defined. Instead, arch/powerpc/boot/Makefile
> builds DTB on demand. You need to add DTB to 'targets' explicitly
> so .*.cmd files are included.
>
> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
> ---
>
> I want to apply this to kbuild tree because this is needed
> to fix the build error caused by another kbuild patch:
>
> https://lkml.org/lkml/2020/7/7/134
OK.
Acked-by: Michael Ellerman <mpe@ellerman.id.au>
cheers
> diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
> index 63d7456b9518..8792323707fd 100644
> --- a/arch/powerpc/boot/Makefile
> +++ b/arch/powerpc/boot/Makefile
> @@ -366,6 +366,8 @@ initrd-y := $(patsubst zImage%, zImage.initrd%, \
> $(patsubst treeImage%, treeImage.initrd%, $(image-y)))))
> initrd-y := $(filter-out $(image-y), $(initrd-y))
> targets += $(image-y) $(initrd-y)
> +targets += $(foreach x, dtbImage uImage cuImage simpleImage treeImage, \
> + $(patsubst $(x).%, dts/%.dtb, $(filter $(x).%, $(image-y))))
>
> $(addprefix $(obj)/, $(initrd-y)): $(obj)/ramdisk.image.gz
>
> --
> 2.25.1
^ permalink raw reply
* Re: [PATCH 18/20] Documentation: security/keys: eliminate duplicated word
From: Mimi Zohar @ 2020-07-13 12:24 UTC (permalink / raw)
To: Randy Dunlap, linux-kernel
Cc: kvm, linux-doc, David Airlie, kgdb-bugreport, linux-fpga,
Liviu Dudau, dri-devel, linux-mips, Paul Cercueil, keyrings,
Paul Mackerras, linux-i2c, Pavel Machek, Srinivas Pandruvada,
Mihail Atanassov, linux-leds, linux-s390, Daniel Thompson,
linux-scsi, Jonathan Corbet, Masahiro Yamada, Matthew Wilcox,
Halil Pasic, Jarkko Sakkinen, James Wang, linux-input,
Mali DP Maintainers, Derek Kiernan, Dragan Cvetic, Wu Hao,
Tony Krowiak, linux-kbuild, James E.J. Bottomley, Jiri Kosina,
Hannes Reinecke, linux-block, Thomas Bogendoerfer,
Jacek Anaszewski, linux-mm, Dan Williams, Andrew Morton,
Jens Axboe, Michal Marek, Martin K. Petersen, Pierre Morel,
Douglas Anderson, Wolfram Sang, Daniel Vetter, Jason Wessel,
Paolo Bonzini, linux-integrity, linuxppc-dev, Mike Rapoport,
Dan Murphy
In-Reply-To: <20200707180414.10467-19-rdunlap@infradead.org>
On Tue, 2020-07-07 at 11:04 -0700, Randy Dunlap wrote:
> Drop the doubled word "in".
>
> Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reviewed-by: Mimi Zohar <zohar@linux.ibm.com>
^ permalink raw reply
* Re: [PATCH v2 0/3] Power10 basic energy management
From: Gautham R Shenoy @ 2020-07-13 10:48 UTC (permalink / raw)
To: Nicholas Piggin
Cc: ego, mikey, pratik.r.sampat, linux-kernel, Pratik Rajesh Sampat,
paulus, linuxppc-dev, ravi.bangoria
In-Reply-To: <1594617564.57k8bsyfd0.astroid@bobo.none>
On Mon, Jul 13, 2020 at 03:23:21PM +1000, Nicholas Piggin wrote:
> Excerpts from Pratik Rajesh Sampat's message of July 10, 2020 3:22 pm:
> > Changelog v1 --> v2:
> > 1. Save-restore DAWR and DAWRX unconditionally as they are lost in
> > shallow idle states too
> > 2. Rename pnv_first_spr_loss_level to pnv_first_fullstate_loss_level to
> > correct naming terminology
> >
> > Pratik Rajesh Sampat (3):
> > powerpc/powernv/idle: Exclude mfspr on HID1,4,5 on P9 and above
> > powerpc/powernv/idle: save-restore DAWR0,DAWRX0 for P10
> > powerpc/powernv/idle: Rename pnv_first_spr_loss_level variable
> >
> > arch/powerpc/platforms/powernv/idle.c | 34 +++++++++++++++++----------
> > 1 file changed, 22 insertions(+), 12 deletions(-)
>
> These look okay to me, but the CPU_FTR_ARCH_300 test for
> pnv_power9_idle_init() is actually wrong, it should be a PVR test
> because idle is not completely architected (not even shallow stop
> states, unfortunately).
>
> It doesn't look like we support POWER10 idle correctly yet, and on older
> kernels it wouldn't work even if we fixed newer, so ideally the PVR
> check would be backported as a fix in the front of the series.
>
> Sadly, we have no OPAL idle driver yet. Hopefully we will before the
> next processor shows up :P
Abhishek posted a version recently :
https://patchwork.ozlabs.org/project/skiboot/patch/20200706043533.76539-1-huntbag@linux.vnet.ibm.com/
>
> Thanks,
> Nick
--
Thanks and Regards
gautham.
^ permalink raw reply
* Re: [PATCH 06/14] powerpc/eeh: Remove VF config space restoration
From: Alexey Kardashevskiy @ 2020-07-13 11:39 UTC (permalink / raw)
To: Oliver O'Halloran; +Cc: linuxppc-dev, Mahesh J Salgaonkar
In-Reply-To: <CAOSf1CFsC8PeLW3Deh=vf8pJQbo7Gg7oDTSOk0T0Da1TBptwGg@mail.gmail.com>
On 13/07/2020 20:55, Oliver O'Halloran wrote:
> On Mon, Jul 13, 2020 at 8:32 PM Alexey Kardashevskiy <aik@ozlabs.ru> wrote:
>>
>>> #ifdef CONFIG_PCI_IOV
>>> int pseries_send_allow_unfreeze(struct pci_dn *pdn,
>>> u16 *vf_pe_array, int cur_vfs)
>>> @@ -848,7 +824,7 @@ static struct eeh_ops pseries_eeh_ops = {
>>> .read_config = pseries_eeh_read_config,
>>> .write_config = pseries_eeh_write_config,
>>> .next_error = NULL,
>>> - .restore_config = pseries_eeh_restore_config,
>>> + .restore_config = NULL, /* NB: configure_bridge() does this */
>>
>>
>> configure_bridge() calls rtas_call(ibm_configure_pe, 3, 1, NULL...)
>> which reconfigures the PE and which is quite different from what
>> pseries_eeh_restore_config() used to do although the comment suggests it
>> is about the same thing. I am pretty sure the new code produces a better
>> result so I suggest ditching this comment and adding a note to the
>> commit log may be. Thanks,
>
> I put the comment there largely because the EEH core seems to think
> that restore_config() is what should be called to reset the device's
> config space to the defaults set be firmware. On PowerNV it does
> actually do that and configure_bridge is this:
>
> static int pnv_eeh_configure_bridge(struct eeh_pe *pe)
> {
> return 0;
> }
>
> So... there's definitely something strange going on there. I don't
> remember the exact details, but I think the generic EEH code calls
> into RTAS to collect debug data and apparently that requires the
> device to be accessible via MMIO (i.e BARs need to be restored) which
> is why the pseries .configure_bridge() calls configure_pe.
ah ok, makes more now, cool. thanks,
> It might
> work out better, but having something called "restore_config" that
> doesn't actually restore the config is uh... modern. It's something
> that probably needs a rework at some point. Anyway, I think the
> comment is more helpful than it is misleading. Especially if you
> consider the PowerNV behaviour.
>
>>> #ifdef CONFIG_PCI_IOV
>>> .notify_resume = pseries_notify_resume
>>> #endif
>>>
>>
>> --
>> Alexey
--
Alexey
^ permalink raw reply
* Re: [PATCH 05/14] powerpc/eeh: Kill off eeh_ops->get_pe_addr()
From: Oliver O'Halloran @ 2020-07-13 11:11 UTC (permalink / raw)
To: Alexey Kardashevskiy; +Cc: linuxppc-dev, Mahesh J Salgaonkar
In-Reply-To: <d227871b-efc7-0864-efc4-a92b99a2ff04@ozlabs.ru>
On Mon, Jul 13, 2020 at 7:54 PM Alexey Kardashevskiy <aik@ozlabs.ru> wrote:
>
>
>
> On 06/07/2020 11:36, Oliver O'Halloran wrote:
> > This is used in precisely one place which is in pseries specific platform
> > code. There's no need to have the callback in eeh_ops since the platform
> > chooses the EEH PE addresses anyway. The PowerNV implementation has always
> > been a stub too so remove it.
> >
> > Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
> > ---
> > arch/powerpc/include/asm/eeh.h | 1 -
> > arch/powerpc/platforms/powernv/eeh-powernv.c | 13 ------------
> > arch/powerpc/platforms/pseries/eeh_pseries.c | 22 ++++++++++----------
> > 3 files changed, 11 insertions(+), 25 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
> > index 3d648e042835..1bddc0dfe099 100644
> > --- a/arch/powerpc/include/asm/eeh.h
> > +++ b/arch/powerpc/include/asm/eeh.h
> > @@ -220,7 +220,6 @@ struct eeh_ops {
> > int (*init)(void);
> > struct eeh_dev *(*probe)(struct pci_dev *pdev);
> > int (*set_option)(struct eeh_pe *pe, int option);
> > - int (*get_pe_addr)(struct eeh_pe *pe);
> > int (*get_state)(struct eeh_pe *pe, int *delay);
> > int (*reset)(struct eeh_pe *pe, int option);
> > int (*get_log)(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len);
> > diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
> > index 79409e005fcd..bcd0515d8f79 100644
> > --- a/arch/powerpc/platforms/powernv/eeh-powernv.c
> > +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
> > @@ -535,18 +535,6 @@ static int pnv_eeh_set_option(struct eeh_pe *pe, int option)
> > return 0;
> > }
> >
> > -/**
> > - * pnv_eeh_get_pe_addr - Retrieve PE address
> > - * @pe: EEH PE
> > - *
> > - * Retrieve the PE address according to the given tranditional
> > - * PCI BDF (Bus/Device/Function) address.
> > - */
> > -static int pnv_eeh_get_pe_addr(struct eeh_pe *pe)
> > -{
> > - return pe->addr;
> > -}
> > -
> > static void pnv_eeh_get_phb_diag(struct eeh_pe *pe)
> > {
> > struct pnv_phb *phb = pe->phb->private_data;
> > @@ -1670,7 +1658,6 @@ static struct eeh_ops pnv_eeh_ops = {
> > .init = pnv_eeh_init,
> > .probe = pnv_eeh_probe,
> > .set_option = pnv_eeh_set_option,
> > - .get_pe_addr = pnv_eeh_get_pe_addr,
> > .get_state = pnv_eeh_get_state,
> > .reset = pnv_eeh_reset,
> > .get_log = pnv_eeh_get_log,
> > diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
> > index 18a2522b9b5e..088771fa38be 100644
> > --- a/arch/powerpc/platforms/pseries/eeh_pseries.c
> > +++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
> > @@ -32,6 +32,8 @@
> > #include <asm/ppc-pci.h>
> > #include <asm/rtas.h>
> >
> > +static int pseries_eeh_get_pe_addr(struct pci_dn *pdn);
> > +
> > /* RTAS tokens */
> > static int ibm_set_eeh_option;
> > static int ibm_set_slot_reset;
> > @@ -301,7 +303,7 @@ void pseries_eeh_init_edev(struct pci_dn *pdn)
> > eeh_edev_dbg(edev, "EEH failed to enable on device (code %d)\n", ret);
> > } else {
> > /* Retrieve PE address */
> > - edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
> > + edev->pe_config_addr = pseries_eeh_get_pe_addr(pdn);
> > pe.addr = edev->pe_config_addr;
> >
> > /* Some older systems (Power4) allow the ibm,set-eeh-option
> > @@ -431,8 +433,10 @@ static int pseries_eeh_set_option(struct eeh_pe *pe, int option)
> > * It's notable that zero'ed return value means invalid PE config
> > * address.
> > */
> > -static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
> > +static int pseries_eeh_get_pe_addr(struct pci_dn *pdn)
> > {
> > + int config_addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
>
> Why not use pe->config_addr
I wanted to get rid of the PE argument. The only caller
(pseries_eeh_init_edev()) doesn't even pass a real PE, just the "fake"
PE which only has one initialised field which is... sketch IMO. The
other reason is for Wen's post-kdump pseries PHB reset patch. In that
situation we want the reset to be done before we've done any PCI setup
so there won't be any eeh_pe structures available. We will however
have pci_dn's since they're set up before we start scanning PHBs. I
also think some of the "fake pe" stuff in pseries_eeh_init_edev() is
broken so the fewer users of that we have the better.
> (and why we have two addresses in eeh_pe anyway)?
I don't know :(
It's one of those things I've been meaning to look at but haven't
found the will to jump down that particular rabbit hole.
I did take a cursory look and there's some comments about pe->addr
being zero in some cases so EEH falls back to matching on
pe->config_addr when searching for a PE. IIRC when I looked I couldn't
work out why pe->config_addr would ever be zero. On PowerNV zero is a
valid PE address and we set the EEH_VALID_PE_ZERO flag to disable that
fallback logic so the reason is probably some weird pseries thing.
> Ah, I guess I just trust you with this one :)
>
>
> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
>
>
>
>
> > + int buid = pdn->phb->buid;
> > int ret = 0;
> > int rets[3];
> >
> > @@ -443,18 +447,16 @@ static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
> > * meaningless.
> > */
> > ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
> > - pe->config_addr, BUID_HI(pe->phb->buid),
> > - BUID_LO(pe->phb->buid), 1);
> > + config_addr, BUID_HI(buid), BUID_LO(buid), 1);
> > if (ret || (rets[0] == 0))
> > return 0;
> >
> > /* Retrieve the associated PE config address */
> > ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
> > - pe->config_addr, BUID_HI(pe->phb->buid),
> > - BUID_LO(pe->phb->buid), 0);
> > + config_addr, BUID_HI(buid), BUID_LO(buid), 0);
> > if (ret) {
> > pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
> > - __func__, pe->phb->global_number, pe->config_addr);
> > + __func__, pdn->phb->global_number, config_addr);
> > return 0;
> > }
> >
> > @@ -463,11 +465,10 @@ static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
> >
> > if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
> > ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
> > - pe->config_addr, BUID_HI(pe->phb->buid),
> > - BUID_LO(pe->phb->buid), 0);
> > + config_addr, BUID_HI(buid), BUID_LO(buid), 0);
> > if (ret) {
> > pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
> > - __func__, pe->phb->global_number, pe->config_addr);
> > + __func__, pdn->phb->global_number, config_addr);
> > return 0;
> > }
> >
> > @@ -839,7 +840,6 @@ static struct eeh_ops pseries_eeh_ops = {
> > .init = pseries_eeh_init,
> > .probe = pseries_eeh_probe,
> > .set_option = pseries_eeh_set_option,
> > - .get_pe_addr = pseries_eeh_get_pe_addr,
> > .get_state = pseries_eeh_get_state,
> > .reset = pseries_eeh_reset,
> > .get_log = pseries_eeh_get_log,
> >
>
> --
> Alexey
^ permalink raw reply
* Re: [PATCH 06/14] powerpc/eeh: Remove VF config space restoration
From: Oliver O'Halloran @ 2020-07-13 10:55 UTC (permalink / raw)
To: Alexey Kardashevskiy; +Cc: linuxppc-dev, Mahesh J Salgaonkar
In-Reply-To: <c808c6d8-b5ed-3256-5396-4300be9fa308@ozlabs.ru>
On Mon, Jul 13, 2020 at 8:32 PM Alexey Kardashevskiy <aik@ozlabs.ru> wrote:
>
> > #ifdef CONFIG_PCI_IOV
> > int pseries_send_allow_unfreeze(struct pci_dn *pdn,
> > u16 *vf_pe_array, int cur_vfs)
> > @@ -848,7 +824,7 @@ static struct eeh_ops pseries_eeh_ops = {
> > .read_config = pseries_eeh_read_config,
> > .write_config = pseries_eeh_write_config,
> > .next_error = NULL,
> > - .restore_config = pseries_eeh_restore_config,
> > + .restore_config = NULL, /* NB: configure_bridge() does this */
>
>
> configure_bridge() calls rtas_call(ibm_configure_pe, 3, 1, NULL...)
> which reconfigures the PE and which is quite different from what
> pseries_eeh_restore_config() used to do although the comment suggests it
> is about the same thing. I am pretty sure the new code produces a better
> result so I suggest ditching this comment and adding a note to the
> commit log may be. Thanks,
I put the comment there largely because the EEH core seems to think
that restore_config() is what should be called to reset the device's
config space to the defaults set be firmware. On PowerNV it does
actually do that and configure_bridge is this:
static int pnv_eeh_configure_bridge(struct eeh_pe *pe)
{
return 0;
}
So... there's definitely something strange going on there. I don't
remember the exact details, but I think the generic EEH code calls
into RTAS to collect debug data and apparently that requires the
device to be accessible via MMIO (i.e BARs need to be restored) which
is why the pseries .configure_bridge() calls configure_pe. It might
work out better, but having something called "restore_config" that
doesn't actually restore the config is uh... modern. It's something
that probably needs a rework at some point. Anyway, I think the
comment is more helpful than it is misleading. Especially if you
consider the PowerNV behaviour.
> > #ifdef CONFIG_PCI_IOV
> > .notify_resume = pseries_notify_resume
> > #endif
> >
>
> --
> Alexey
^ permalink raw reply
* Re: [PATCH 06/14] powerpc/eeh: Remove VF config space restoration
From: Alexey Kardashevskiy @ 2020-07-13 10:32 UTC (permalink / raw)
To: Oliver O'Halloran, linuxppc-dev; +Cc: mahesh
In-Reply-To: <20200706013619.459420-7-oohall@gmail.com>
On 06/07/2020 11:36, Oliver O'Halloran wrote:
> There's a bunch of strange things about this code. First up is that none of
> the fields being written to are functional for a VF. The SR-IOV
> specification lists then as "Reserved, but OS should preserve" so writing
> new values to them doesn't do anything and is clearly wrong from a
> correctness perspective.
>
> However, since VFs are designed to be managed by the OS there is an
> argument to be made that we should be saving and restoring some parts of
> config space. We already sort of do that by saving the first 64 bytes of
> config space in the eeh_dev (see eeh_dev->config_space[]). This is
> inadequate since it doesn't even consider saving and restoring the PCI
> capability structures. However, this is a problem with EEH in general and
> that needs to be fixed for non-VF devices too.
>
> There's no real reason to keep around this around so delete it.
>
> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> ---
> arch/powerpc/include/asm/eeh.h | 1 -
> arch/powerpc/kernel/eeh.c | 59 --------------------
> arch/powerpc/platforms/powernv/eeh-powernv.c | 20 ++-----
> arch/powerpc/platforms/pseries/eeh_pseries.c | 26 +--------
> 4 files changed, 7 insertions(+), 99 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
> index 1bddc0dfe099..046c5a2fe411 100644
> --- a/arch/powerpc/include/asm/eeh.h
> +++ b/arch/powerpc/include/asm/eeh.h
> @@ -314,7 +314,6 @@ int eeh_pe_reset(struct eeh_pe *pe, int option, bool include_passed);
> int eeh_pe_configure(struct eeh_pe *pe);
> int eeh_pe_inject_err(struct eeh_pe *pe, int type, int func,
> unsigned long addr, unsigned long mask);
> -int eeh_restore_vf_config(struct pci_dn *pdn);
>
> /**
> * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
> diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
> index 859f76020256..a4df6f6de0bd 100644
> --- a/arch/powerpc/kernel/eeh.c
> +++ b/arch/powerpc/kernel/eeh.c
> @@ -742,65 +742,6 @@ static void eeh_restore_dev_state(struct eeh_dev *edev, void *userdata)
> pci_restore_state(pdev);
> }
>
> -int eeh_restore_vf_config(struct pci_dn *pdn)
> -{
> - struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
> - u32 devctl, cmd, cap2, aer_capctl;
> - int old_mps;
> -
> - if (edev->pcie_cap) {
> - /* Restore MPS */
> - old_mps = (ffs(pdn->mps) - 8) << 5;
> - eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
> - 2, &devctl);
> - devctl &= ~PCI_EXP_DEVCTL_PAYLOAD;
> - devctl |= old_mps;
> - eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
> - 2, devctl);
> -
> - /* Disable Completion Timeout if possible */
> - eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCAP2,
> - 4, &cap2);
> - if (cap2 & PCI_EXP_DEVCAP2_COMP_TMOUT_DIS) {
> - eeh_ops->read_config(pdn,
> - edev->pcie_cap + PCI_EXP_DEVCTL2,
> - 4, &cap2);
> - cap2 |= PCI_EXP_DEVCTL2_COMP_TMOUT_DIS;
> - eeh_ops->write_config(pdn,
> - edev->pcie_cap + PCI_EXP_DEVCTL2,
> - 4, cap2);
> - }
> - }
> -
> - /* Enable SERR and parity checking */
> - eeh_ops->read_config(pdn, PCI_COMMAND, 2, &cmd);
> - cmd |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
> - eeh_ops->write_config(pdn, PCI_COMMAND, 2, cmd);
> -
> - /* Enable report various errors */
> - if (edev->pcie_cap) {
> - eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
> - 2, &devctl);
> - devctl &= ~PCI_EXP_DEVCTL_CERE;
> - devctl |= (PCI_EXP_DEVCTL_NFERE |
> - PCI_EXP_DEVCTL_FERE |
> - PCI_EXP_DEVCTL_URRE);
> - eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
> - 2, devctl);
> - }
> -
> - /* Enable ECRC generation and check */
> - if (edev->pcie_cap && edev->aer_cap) {
> - eeh_ops->read_config(pdn, edev->aer_cap + PCI_ERR_CAP,
> - 4, &aer_capctl);
> - aer_capctl |= (PCI_ERR_CAP_ECRC_GENE | PCI_ERR_CAP_ECRC_CHKE);
> - eeh_ops->write_config(pdn, edev->aer_cap + PCI_ERR_CAP,
> - 4, aer_capctl);
> - }
> -
> - return 0;
> -}
> -
> /**
> * pcibios_set_pcie_reset_state - Set PCI-E reset state
> * @dev: pci device struct
> diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
> index bcd0515d8f79..8f3a7611efc1 100644
> --- a/arch/powerpc/platforms/powernv/eeh-powernv.c
> +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
> @@ -1629,20 +1629,12 @@ static int pnv_eeh_restore_config(struct pci_dn *pdn)
> if (!edev)
> return -EEXIST;
>
> - /*
> - * We have to restore the PCI config space after reset since the
> - * firmware can't see SRIOV VFs.
> - *
> - * FIXME: The MPS, error routing rules, timeout setting are worthy
> - * to be exported by firmware in extendible way.
> - */
> - if (edev->physfn) {
> - ret = eeh_restore_vf_config(pdn);
> - } else {
> - phb = pdn->phb->private_data;
> - ret = opal_pci_reinit(phb->opal_id,
> - OPAL_REINIT_PCI_DEV, config_addr);
> - }
> + if (edev->physfn)
> + return 0;
> +
> + phb = edev->controller->private_data;
> + ret = opal_pci_reinit(phb->opal_id,
> + OPAL_REINIT_PCI_DEV, edev->bdfn);
>
> if (ret) {
> pr_warn("%s: Can't reinit PCI dev 0x%x (%lld)\n",
> diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
> index 088771fa38be..83122bf65a8c 100644
> --- a/arch/powerpc/platforms/pseries/eeh_pseries.c
> +++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
> @@ -718,30 +718,6 @@ static int pseries_eeh_write_config(struct pci_dn *pdn, int where, int size, u32
> return rtas_write_config(pdn, where, size, val);
> }
>
> -static int pseries_eeh_restore_config(struct pci_dn *pdn)
> -{
> - struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
> - s64 ret = 0;
> -
> - if (!edev)
> - return -EEXIST;
> -
> - /*
> - * FIXME: The MPS, error routing rules, timeout setting are worthy
> - * to be exported by firmware in extendible way.
> - */
> - if (edev->physfn)
> - ret = eeh_restore_vf_config(pdn);
> -
> - if (ret) {
> - pr_warn("%s: Can't reinit PCI dev 0x%x (%lld)\n",
> - __func__, edev->pe_config_addr, ret);
> - return -EIO;
> - }
> -
> - return ret;
> -}
> -
> #ifdef CONFIG_PCI_IOV
> int pseries_send_allow_unfreeze(struct pci_dn *pdn,
> u16 *vf_pe_array, int cur_vfs)
> @@ -848,7 +824,7 @@ static struct eeh_ops pseries_eeh_ops = {
> .read_config = pseries_eeh_read_config,
> .write_config = pseries_eeh_write_config,
> .next_error = NULL,
> - .restore_config = pseries_eeh_restore_config,
> + .restore_config = NULL, /* NB: configure_bridge() does this */
configure_bridge() calls rtas_call(ibm_configure_pe, 3, 1, NULL...)
which reconfigures the PE and which is quite different from what
pseries_eeh_restore_config() used to do although the comment suggests it
is about the same thing. I am pretty sure the new code produces a better
result so I suggest ditching this comment and adding a note to the
commit log may be. Thanks,
> #ifdef CONFIG_PCI_IOV
> .notify_resume = pseries_notify_resume
> #endif
>
--
Alexey
^ permalink raw reply
* Re: [PATCH v2 0/3] Power10 basic energy management
From: Pratik Sampat @ 2020-07-13 10:02 UTC (permalink / raw)
To: Nicholas Piggin, benh, ego, linux-kernel, linuxppc-dev, mikey,
mpe, paulus, pratik.r.sampat, ravi.bangoria, svaidy
In-Reply-To: <1594617564.57k8bsyfd0.astroid@bobo.none>
Thank you for your comments,
On 13/07/20 10:53 am, Nicholas Piggin wrote:
> Excerpts from Pratik Rajesh Sampat's message of July 10, 2020 3:22 pm:
>> Changelog v1 --> v2:
>> 1. Save-restore DAWR and DAWRX unconditionally as they are lost in
>> shallow idle states too
>> 2. Rename pnv_first_spr_loss_level to pnv_first_fullstate_loss_level to
>> correct naming terminology
>>
>> Pratik Rajesh Sampat (3):
>> powerpc/powernv/idle: Exclude mfspr on HID1,4,5 on P9 and above
>> powerpc/powernv/idle: save-restore DAWR0,DAWRX0 for P10
>> powerpc/powernv/idle: Rename pnv_first_spr_loss_level variable
>>
>> arch/powerpc/platforms/powernv/idle.c | 34 +++++++++++++++++----------
>> 1 file changed, 22 insertions(+), 12 deletions(-)
> These look okay to me, but the CPU_FTR_ARCH_300 test for
> pnv_power9_idle_init() is actually wrong, it should be a PVR test
> because idle is not completely architected (not even shallow stop
> states, unfortunately).
>
> It doesn't look like we support POWER10 idle correctly yet, and on older
> kernels it wouldn't work even if we fixed newer, so ideally the PVR
> check would be backported as a fix in the front of the series.
>
> Sadly, we have no OPAL idle driver yet. Hopefully we will before the
> next processor shows up :P
>
> Thanks,
> Nick
So if I understand this correctly, in powernv/idle.c where we check for
CPU_FTR_ARCH_300, we should rather be making a pvr_version_is(PVR_POWER9)
check instead?
Of course, the P10 PVR and its relevant checks will have to be added then too.
Thanks
Pratik
^ permalink raw reply
* Re: [PATCH 05/14] powerpc/eeh: Kill off eeh_ops->get_pe_addr()
From: Alexey Kardashevskiy @ 2020-07-13 9:54 UTC (permalink / raw)
To: Oliver O'Halloran, linuxppc-dev; +Cc: mahesh
In-Reply-To: <20200706013619.459420-6-oohall@gmail.com>
On 06/07/2020 11:36, Oliver O'Halloran wrote:
> This is used in precisely one place which is in pseries specific platform
> code. There's no need to have the callback in eeh_ops since the platform
> chooses the EEH PE addresses anyway. The PowerNV implementation has always
> been a stub too so remove it.
>
> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
> ---
> arch/powerpc/include/asm/eeh.h | 1 -
> arch/powerpc/platforms/powernv/eeh-powernv.c | 13 ------------
> arch/powerpc/platforms/pseries/eeh_pseries.c | 22 ++++++++++----------
> 3 files changed, 11 insertions(+), 25 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
> index 3d648e042835..1bddc0dfe099 100644
> --- a/arch/powerpc/include/asm/eeh.h
> +++ b/arch/powerpc/include/asm/eeh.h
> @@ -220,7 +220,6 @@ struct eeh_ops {
> int (*init)(void);
> struct eeh_dev *(*probe)(struct pci_dev *pdev);
> int (*set_option)(struct eeh_pe *pe, int option);
> - int (*get_pe_addr)(struct eeh_pe *pe);
> int (*get_state)(struct eeh_pe *pe, int *delay);
> int (*reset)(struct eeh_pe *pe, int option);
> int (*get_log)(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len);
> diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
> index 79409e005fcd..bcd0515d8f79 100644
> --- a/arch/powerpc/platforms/powernv/eeh-powernv.c
> +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
> @@ -535,18 +535,6 @@ static int pnv_eeh_set_option(struct eeh_pe *pe, int option)
> return 0;
> }
>
> -/**
> - * pnv_eeh_get_pe_addr - Retrieve PE address
> - * @pe: EEH PE
> - *
> - * Retrieve the PE address according to the given tranditional
> - * PCI BDF (Bus/Device/Function) address.
> - */
> -static int pnv_eeh_get_pe_addr(struct eeh_pe *pe)
> -{
> - return pe->addr;
> -}
> -
> static void pnv_eeh_get_phb_diag(struct eeh_pe *pe)
> {
> struct pnv_phb *phb = pe->phb->private_data;
> @@ -1670,7 +1658,6 @@ static struct eeh_ops pnv_eeh_ops = {
> .init = pnv_eeh_init,
> .probe = pnv_eeh_probe,
> .set_option = pnv_eeh_set_option,
> - .get_pe_addr = pnv_eeh_get_pe_addr,
> .get_state = pnv_eeh_get_state,
> .reset = pnv_eeh_reset,
> .get_log = pnv_eeh_get_log,
> diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
> index 18a2522b9b5e..088771fa38be 100644
> --- a/arch/powerpc/platforms/pseries/eeh_pseries.c
> +++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
> @@ -32,6 +32,8 @@
> #include <asm/ppc-pci.h>
> #include <asm/rtas.h>
>
> +static int pseries_eeh_get_pe_addr(struct pci_dn *pdn);
> +
> /* RTAS tokens */
> static int ibm_set_eeh_option;
> static int ibm_set_slot_reset;
> @@ -301,7 +303,7 @@ void pseries_eeh_init_edev(struct pci_dn *pdn)
> eeh_edev_dbg(edev, "EEH failed to enable on device (code %d)\n", ret);
> } else {
> /* Retrieve PE address */
> - edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
> + edev->pe_config_addr = pseries_eeh_get_pe_addr(pdn);
> pe.addr = edev->pe_config_addr;
>
> /* Some older systems (Power4) allow the ibm,set-eeh-option
> @@ -431,8 +433,10 @@ static int pseries_eeh_set_option(struct eeh_pe *pe, int option)
> * It's notable that zero'ed return value means invalid PE config
> * address.
> */
> -static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
> +static int pseries_eeh_get_pe_addr(struct pci_dn *pdn)
> {
> + int config_addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
Why not use pe->config_addr (and why we have two addresses in eeh_pe
anyway)?
Ah, I guess I just trust you with this one :)
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> + int buid = pdn->phb->buid;
> int ret = 0;
> int rets[3];
>
> @@ -443,18 +447,16 @@ static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
> * meaningless.
> */
> ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
> - pe->config_addr, BUID_HI(pe->phb->buid),
> - BUID_LO(pe->phb->buid), 1);
> + config_addr, BUID_HI(buid), BUID_LO(buid), 1);
> if (ret || (rets[0] == 0))
> return 0;
>
> /* Retrieve the associated PE config address */
> ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
> - pe->config_addr, BUID_HI(pe->phb->buid),
> - BUID_LO(pe->phb->buid), 0);
> + config_addr, BUID_HI(buid), BUID_LO(buid), 0);
> if (ret) {
> pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
> - __func__, pe->phb->global_number, pe->config_addr);
> + __func__, pdn->phb->global_number, config_addr);
> return 0;
> }
>
> @@ -463,11 +465,10 @@ static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
>
> if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
> ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
> - pe->config_addr, BUID_HI(pe->phb->buid),
> - BUID_LO(pe->phb->buid), 0);
> + config_addr, BUID_HI(buid), BUID_LO(buid), 0);
> if (ret) {
> pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
> - __func__, pe->phb->global_number, pe->config_addr);
> + __func__, pdn->phb->global_number, config_addr);
> return 0;
> }
>
> @@ -839,7 +840,6 @@ static struct eeh_ops pseries_eeh_ops = {
> .init = pseries_eeh_init,
> .probe = pseries_eeh_probe,
> .set_option = pseries_eeh_set_option,
> - .get_pe_addr = pseries_eeh_get_pe_addr,
> .get_state = pseries_eeh_get_state,
> .reset = pseries_eeh_reset,
> .get_log = pseries_eeh_get_log,
>
--
Alexey
^ permalink raw reply
* Re: [v3 4/5] KVM: PPC: Book3S HV: retry page migration before erroring-out H_SVM_PAGE_IN
From: Bharata B Rao @ 2020-07-13 9:50 UTC (permalink / raw)
To: Ram Pai
Cc: ldufour, cclaudio, kvm-ppc, sathnaga, aneesh.kumar, sukadev,
linuxppc-dev, bauerman, david
In-Reply-To: <1594458827-31866-5-git-send-email-linuxram@us.ibm.com>
On Sat, Jul 11, 2020 at 02:13:46AM -0700, Ram Pai wrote:
> The page requested for page-in; sometimes, can have transient
> references, and hence cannot migrate immediately. Retry a few times
> before returning error.
As I noted in the previous patch, we need to understand what are these
transient errors and they occur on what type of pages?
The previous patch also introduced a bit of retry logic in the
page-in path. Can you consolidate the retry logic into a separate
patch?
>
> H_SVM_PAGE_IN interface is enhanced to return H_BUSY if the page is
> not in a migratable state.
>
> Cc: Paul Mackerras <paulus@ozlabs.org>
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Michael Ellerman <mpe@ellerman.id.au>
> Cc: Bharata B Rao <bharata@linux.ibm.com>
> Cc: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
> Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
> Cc: Laurent Dufour <ldufour@linux.ibm.com>
> Cc: Thiago Jung Bauermann <bauerman@linux.ibm.com>
> Cc: David Gibson <david@gibson.dropbear.id.au>
> Cc: Claudio Carvalho <cclaudio@linux.ibm.com>
> Cc: kvm-ppc@vger.kernel.org
> Cc: linuxppc-dev@lists.ozlabs.org
>
> Signed-off-by: Ram Pai <linuxram@us.ibm.com>
> ---
> Documentation/powerpc/ultravisor.rst | 1 +
> arch/powerpc/kvm/book3s_hv_uvmem.c | 54 +++++++++++++++++++++---------------
> 2 files changed, 33 insertions(+), 22 deletions(-)
>
> diff --git a/Documentation/powerpc/ultravisor.rst b/Documentation/powerpc/ultravisor.rst
> index d98fc85..638d1a7 100644
> --- a/Documentation/powerpc/ultravisor.rst
> +++ b/Documentation/powerpc/ultravisor.rst
> @@ -1034,6 +1034,7 @@ Return values
> * H_PARAMETER if ``guest_pa`` is invalid.
> * H_P2 if ``flags`` is invalid.
> * H_P3 if ``order`` of page is invalid.
> + * H_BUSY if ``page`` is not in a state to pagein
>
> Description
> ~~~~~~~~~~~
> diff --git a/arch/powerpc/kvm/book3s_hv_uvmem.c b/arch/powerpc/kvm/book3s_hv_uvmem.c
> index 12ed52a..c9bdef6 100644
> --- a/arch/powerpc/kvm/book3s_hv_uvmem.c
> +++ b/arch/powerpc/kvm/book3s_hv_uvmem.c
> @@ -843,7 +843,7 @@ unsigned long kvmppc_h_svm_page_in(struct kvm *kvm, unsigned long gpa,
> struct vm_area_struct *vma;
> int srcu_idx;
> unsigned long gfn = gpa >> page_shift;
> - int ret;
> + int ret, repeat_count = REPEAT_COUNT;
>
> if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START))
> return H_UNSUPPORTED;
> @@ -857,34 +857,44 @@ unsigned long kvmppc_h_svm_page_in(struct kvm *kvm, unsigned long gpa,
> if (flags & H_PAGE_IN_SHARED)
> return kvmppc_share_page(kvm, gpa, page_shift);
>
> - ret = H_PARAMETER;
> srcu_idx = srcu_read_lock(&kvm->srcu);
> - down_write(&kvm->mm->mmap_sem);
>
> - start = gfn_to_hva(kvm, gfn);
> - if (kvm_is_error_hva(start))
> - goto out;
> -
> - mutex_lock(&kvm->arch.uvmem_lock);
> /* Fail the page-in request of an already paged-in page */
> - if (kvmppc_gfn_is_uvmem_pfn(gfn, kvm, NULL))
> - goto out_unlock;
> + mutex_lock(&kvm->arch.uvmem_lock);
> + ret = kvmppc_gfn_is_uvmem_pfn(gfn, kvm, NULL);
> + mutex_unlock(&kvm->arch.uvmem_lock);
> + if (ret) {
> + srcu_read_unlock(&kvm->srcu, srcu_idx);
> + return H_PARAMETER;
> + }
>
> - end = start + (1UL << page_shift);
> - vma = find_vma_intersection(kvm->mm, start, end);
> - if (!vma || vma->vm_start > start || vma->vm_end < end)
> - goto out_unlock;
> + do {
> + ret = H_PARAMETER;
> + down_write(&kvm->mm->mmap_sem);
Again with ksm_madvise() moved to init time, check if you still need
write mmap_sem here.
Regards,
Bharata.
^ permalink raw reply
* Re: [v3 3/5] KVM: PPC: Book3S HV: migrate remaining normal-GFNs to secure-GFNs in H_SVM_INIT_DONE
From: Bharata B Rao @ 2020-07-13 9:45 UTC (permalink / raw)
To: Ram Pai
Cc: ldufour, cclaudio, kvm-ppc, sathnaga, aneesh.kumar, sukadev,
linuxppc-dev, bauerman, david
In-Reply-To: <1594458827-31866-4-git-send-email-linuxram@us.ibm.com>
On Sat, Jul 11, 2020 at 02:13:45AM -0700, Ram Pai wrote:
> The Ultravisor is expected to explicitly call H_SVM_PAGE_IN for all the pages
> of the SVM before calling H_SVM_INIT_DONE. This causes a huge delay in
> tranistioning the VM to SVM. The Ultravisor is interested in the pages that
> contain the kernel, initrd and other important data structures. The rest of the
> pages contain throw-away content. Hence requesting just the necessary and
> sufficient pages from the Hypervisor is sufficient.
>
> However if not all pages are requested by the Ultravisor, the Hypervisor
> continues to consider the GFNs corresponding to the non-requested pages as
> normal GFNs. This can lead to data-corruption and undefined behavior.
>
> Move all the PFNs associated with the SVM's GFNs to secure-PFNs, in
> H_SVM_INIT_DONE. Skip the GFNs that are already Paged-in or Shared or
> Paged-in followed by a Paged-out.
>
> Cc: Paul Mackerras <paulus@ozlabs.org>
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Michael Ellerman <mpe@ellerman.id.au>
> Cc: Bharata B Rao <bharata@linux.ibm.com>
> Cc: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
> Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
> Cc: Laurent Dufour <ldufour@linux.ibm.com>
> Cc: Thiago Jung Bauermann <bauerman@linux.ibm.com>
> Cc: David Gibson <david@gibson.dropbear.id.au>
> Cc: Claudio Carvalho <cclaudio@linux.ibm.com>
> Cc: kvm-ppc@vger.kernel.org
> Cc: linuxppc-dev@lists.ozlabs.org
> Signed-off-by: Ram Pai <linuxram@us.ibm.com>
> ---
> Documentation/powerpc/ultravisor.rst | 2 +
> arch/powerpc/include/asm/kvm_book3s_uvmem.h | 2 +
> arch/powerpc/kvm/book3s_hv_uvmem.c | 166 +++++++++++++++++++++++++---
> 3 files changed, 156 insertions(+), 14 deletions(-)
>
> diff --git a/Documentation/powerpc/ultravisor.rst b/Documentation/powerpc/ultravisor.rst
> index df136c8..d98fc85 100644
> --- a/Documentation/powerpc/ultravisor.rst
> +++ b/Documentation/powerpc/ultravisor.rst
> @@ -933,6 +933,8 @@ Return values
> * H_UNSUPPORTED if called from the wrong context (e.g.
> from an SVM or before an H_SVM_INIT_START
> hypercall).
> + * H_STATE if the hypervisor could not successfully
> + transition the VM to Secure VM.
>
> Description
> ~~~~~~~~~~~
> diff --git a/arch/powerpc/include/asm/kvm_book3s_uvmem.h b/arch/powerpc/include/asm/kvm_book3s_uvmem.h
> index 9cb7d8b..f229ab5 100644
> --- a/arch/powerpc/include/asm/kvm_book3s_uvmem.h
> +++ b/arch/powerpc/include/asm/kvm_book3s_uvmem.h
> @@ -23,6 +23,8 @@ unsigned long kvmppc_h_svm_page_out(struct kvm *kvm,
> unsigned long kvmppc_h_svm_init_abort(struct kvm *kvm);
> void kvmppc_uvmem_drop_pages(const struct kvm_memory_slot *free,
> struct kvm *kvm, bool skip_page_out);
> +int kvmppc_uv_migrate_mem_slot(struct kvm *kvm,
> + const struct kvm_memory_slot *memslot);
> #else
> static inline int kvmppc_uvmem_init(void)
> {
> diff --git a/arch/powerpc/kvm/book3s_hv_uvmem.c b/arch/powerpc/kvm/book3s_hv_uvmem.c
> index 6d6c256..12ed52a 100644
> --- a/arch/powerpc/kvm/book3s_hv_uvmem.c
> +++ b/arch/powerpc/kvm/book3s_hv_uvmem.c
> @@ -93,6 +93,7 @@
> #include <asm/ultravisor.h>
> #include <asm/mman.h>
> #include <asm/kvm_ppc.h>
> +#include <asm/kvm_book3s_uvmem.h>
>
> static struct dev_pagemap kvmppc_uvmem_pgmap;
> static unsigned long *kvmppc_uvmem_bitmap;
> @@ -348,6 +349,43 @@ static bool kvmppc_gfn_is_uvmem_pfn(unsigned long gfn, struct kvm *kvm,
> return false;
> }
>
> +/*
> + * starting from *gfn search for the next available GFN that is not yet
> + * transitioned to a secure GFN. return the value of that GFN in *gfn. If a
> + * GFN is found, return true, else return false
> + */
> +static bool kvmppc_next_nontransitioned_gfn(const struct kvm_memory_slot *memslot,
> + struct kvm *kvm, unsigned long *gfn)
> +{
> + struct kvmppc_uvmem_slot *p;
> + bool ret = false;
> + unsigned long i;
> +
> + mutex_lock(&kvm->arch.uvmem_lock);
> +
> + list_for_each_entry(p, &kvm->arch.uvmem_pfns, list)
> + if (*gfn >= p->base_pfn && *gfn < p->base_pfn + p->nr_pfns)
> + break;
> + if (!p)
> + goto out;
> + /*
> + * The code below assumes, one to one correspondence between
> + * kvmppc_uvmem_slot and memslot.
> + */
> + for (i = *gfn; i < p->base_pfn + p->nr_pfns; i++) {
> + unsigned long index = i - p->base_pfn;
> +
> + if (!(p->pfns[index] & KVMPPC_GFN_FLAG_MASK)) {
> + *gfn = i;
> + ret = true;
> + break;
> + }
> + }
> +out:
> + mutex_unlock(&kvm->arch.uvmem_lock);
> + return ret;
> +}
> +
> static int kvmppc_memslot_page_merge(struct kvm *kvm,
> struct kvm_memory_slot *memslot, bool merge)
> {
> @@ -461,12 +499,31 @@ unsigned long kvmppc_h_svm_init_start(struct kvm *kvm)
>
> unsigned long kvmppc_h_svm_init_done(struct kvm *kvm)
> {
> + struct kvm_memslots *slots;
> + struct kvm_memory_slot *memslot;
> + int srcu_idx;
> + long ret = H_SUCCESS;
> +
> if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START))
> return H_UNSUPPORTED;
>
> + /* migrate any unmoved normal pfn to device pfns*/
> + srcu_idx = srcu_read_lock(&kvm->srcu);
> + slots = kvm_memslots(kvm);
> + kvm_for_each_memslot(memslot, slots) {
> + ret = kvmppc_uv_migrate_mem_slot(kvm, memslot);
> + if (ret) {
> + ret = H_STATE;
> + goto out;
> + }
> + }
> +
> kvm->arch.secure_guest |= KVMPPC_SECURE_INIT_DONE;
> pr_info("LPID %d went secure\n", kvm->arch.lpid);
> - return H_SUCCESS;
> +
> +out:
> + srcu_read_unlock(&kvm->srcu, srcu_idx);
> + return ret;
> }
>
> /*
> @@ -587,12 +644,14 @@ static struct page *kvmppc_uvmem_get_page(unsigned long gpa, struct kvm *kvm)
> }
>
> /*
> - * Alloc a PFN from private device memory pool and copy page from normal
> - * memory to secure memory using UV_PAGE_IN uvcall.
> + * Alloc a PFN from private device memory pool. If @pagein is true,
> + * copy page from normal memory to secure memory using UV_PAGE_IN uvcall.
> */
> -static int kvmppc_svm_page_in(struct vm_area_struct *vma, unsigned long start,
> - unsigned long end, unsigned long gpa, struct kvm *kvm,
> - unsigned long page_shift)
> +static int kvmppc_svm_migrate_page(struct vm_area_struct *vma,
> + unsigned long start,
> + unsigned long end, unsigned long gpa, struct kvm *kvm,
> + unsigned long page_shift,
> + bool pagein)
> {
> unsigned long src_pfn, dst_pfn = 0;
> struct migrate_vma mig;
> @@ -613,7 +672,7 @@ static int kvmppc_svm_page_in(struct vm_area_struct *vma, unsigned long start,
> return ret;
>
> if (!(*mig.src & MIGRATE_PFN_MIGRATE)) {
> - ret = -1;
> + ret = -2;
migrate_vma_setup() has marked that this pfn can't be migrated. What
transient errors are you observing which will disappear within 10
retries?
Also till now when UV used to pull in all the pages, we never seemed to
have hit these transient errors. But now when HV is pushing the same
pages, we see these errors which are disappearing after 10 retries.
Can you explain this more please? What sort of pages are these?
> goto out_finalize;
> }
>
> @@ -623,11 +682,16 @@ static int kvmppc_svm_page_in(struct vm_area_struct *vma, unsigned long start,
> goto out_finalize;
> }
>
> - pfn = *mig.src >> MIGRATE_PFN_SHIFT;
> - spage = migrate_pfn_to_page(*mig.src);
> - if (spage)
> - uv_page_in(kvm->arch.lpid, pfn << page_shift, gpa, 0,
> - page_shift);
> + if (pagein) {
> + pfn = *mig.src >> MIGRATE_PFN_SHIFT;
> + spage = migrate_pfn_to_page(*mig.src);
> + if (spage) {
> + ret = uv_page_in(kvm->arch.lpid, pfn << page_shift,
> + gpa, 0, page_shift);
> + if (ret)
> + goto out_finalize;
> + }
> + }
>
> *mig.dst = migrate_pfn(page_to_pfn(dpage)) | MIGRATE_PFN_LOCKED;
> migrate_vma_pages(&mig);
> @@ -637,6 +701,77 @@ static int kvmppc_svm_page_in(struct vm_area_struct *vma, unsigned long start,
> }
>
> /*
> + * return 1, if some page migration failed because of transient error,
> + * while the remaining pages migrated successfully.
> + * The caller can use this as a hint to retry.
> + *
> + * return 0 otherwise. *ret indicates the success status
> + * of this call.
> + */
> +static int __kvmppc_uv_migrate_mem_slot(struct kvm *kvm,
> + const struct kvm_memory_slot *memslot, int *ret)
> +{
> + unsigned long gfn = memslot->base_gfn;
> + struct vm_area_struct *vma;
> + unsigned long start, end;
> + bool retry = 0;
> +
> + *ret = 0;
> + while (kvmppc_next_nontransitioned_gfn(memslot, kvm, &gfn)) {
> +
> + down_write(&kvm->mm->mmap_sem);
Acquiring and releasing mmap_sem in a loop? Any reason?
Now that you have moved ksm_madvise() calls to init time, any specific
reason to take write mmap_sem here?
> + start = gfn_to_hva(kvm, gfn);
> + if (kvm_is_error_hva(start)) {
> + *ret = H_STATE;
> + goto next;
> + }
> +
> + end = start + (1UL << PAGE_SHIFT);
> + vma = find_vma_intersection(kvm->mm, start, end);
> + if (!vma || vma->vm_start > start || vma->vm_end < end) {
> + *ret = H_STATE;
> + goto next;
> + }
> +
> + mutex_lock(&kvm->arch.uvmem_lock);
> + *ret = kvmppc_svm_migrate_page(vma, start, end,
> + (gfn << PAGE_SHIFT), kvm, PAGE_SHIFT, false);
> + mutex_unlock(&kvm->arch.uvmem_lock);
> +
> +next:
> + up_write(&kvm->mm->mmap_sem);
> +
> + if (*ret == -2) {
> + retry = 1;
Using true or false assignment makes it easy to understand the intention
of this 'retry' variable.
> + continue;
> + }
> +
> + if (*ret)
> + return 0;
> + }
> + return retry;
The function is supposed to return an int, but you are returning a bool.
Regards,
Bharata.
^ permalink raw reply
* Re: [PATCH 13/20] Documentation: mips/ingenic-tcu: eliminate duplicated word
From: Thomas Bogendoerfer @ 2020-07-13 9:28 UTC (permalink / raw)
To: Randy Dunlap
Cc: kvm, linux-doc, David Airlie, kgdb-bugreport, linux-fpga,
Liviu Dudau, dri-devel, Douglas Anderson, Paul Cercueil, keyrings,
Paul Mackerras, linux-i2c, Pavel Machek, Srinivas Pandruvada,
Mihail Atanassov, linux-leds, linux-s390, Daniel Thompson,
linux-scsi, Jonathan Corbet, Masahiro Yamada, Matthew Wilcox,
Halil Pasic, Jarkko Sakkinen, James Wang, linux-input,
Mali DP Maintainers, Derek Kiernan, linux-mips, Dragan Cvetic,
Wu Hao, Tony Krowiak, linux-kbuild, James E.J. Bottomley,
Jiri Kosina, Hannes Reinecke, linux-block, Jacek Anaszewski,
linux-mm, Dan Williams, Andrew Morton, Mimi Zohar, Jens Axboe,
Michal Marek, Martin K. Petersen, Pierre Morel, linux-kernel,
Wolfram Sang, Daniel Vetter, Jason Wessel, Paolo Bonzini,
linux-integrity, linuxppc-dev, Mike Rapoport, Dan Murphy
In-Reply-To: <20200707180414.10467-14-rdunlap@infradead.org>
On Tue, Jul 07, 2020 at 11:04:07AM -0700, Randy Dunlap wrote:
> Drop the doubled word "to".
>
> Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
> Cc: Jonathan Corbet <corbet@lwn.net>
> Cc: linux-doc@vger.kernel.org
> Cc: Paul Cercueil <paul@crapouillou.net>
> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> Cc: linux-mips@vger.kernel.org
> ---
> Documentation/mips/ingenic-tcu.rst | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
^ permalink raw reply
* Re: [PATCH 03/14] powerpc/eeh: Move vf_index out of pci_dn and into eeh_dev
From: Oliver O'Halloran @ 2020-07-13 9:02 UTC (permalink / raw)
To: Alexey Kardashevskiy; +Cc: linuxppc-dev, Mahesh J Salgaonkar
In-Reply-To: <7853bbc2-715b-110a-2d96-8d32e6141261@ozlabs.ru>
On Mon, Jul 13, 2020 at 6:56 PM Alexey Kardashevskiy <aik@ozlabs.ru> wrote:
>
>
>
> On 06/07/2020 11:36, Oliver O'Halloran wrote:
> > Drivers that do not support the PCI error handling callbacks are handled by
> > tearing down the device and re-probing them. If the device to be removed is
> > a virtual function we need to know the index of the index of the VF so that
>
> Too many indexes in "the index of the index of "?
I'll index you!
(yes)
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