* Re: [PATCH v2] powerpc/pci: unmap legacy INTx interrupts when a PHB is removed
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Cédric Le Goater
Cc: Alexey Kardashevskiy, Oliver O'Halloran, linuxppc-dev
In-Reply-To: <20200807101854.844619-1-clg@kaod.org>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 793 bytes --]
On Fri, 7 Aug 2020 12:18:54 +0200, Cédric Le Goater wrote:
> When a passthrough IO adapter is removed from a pseries machine using
> hash MMU and the XIVE interrupt mode, the POWER hypervisor expects the
> guest OS to clear all page table entries related to the adapter. If
> some are still present, the RTAS call which isolates the PCI slot
> returns error 9001 "valid outstanding translations" and the removal of
> the IO adapter fails. This is because when the PHBs are scanned, Linux
> maps automatically the INTx interrupts in the Linux interrupt number
> space but these are never removed.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/pci: unmap legacy INTx interrupts when a PHB is removed
https://git.kernel.org/powerpc/c/3a3181e16fbde752007759f8759d25e0ff1fc425
cheers
^ permalink raw reply
* Re: [PATCH v2] powerpc/powermac: Fix low_sleep_handler with KUAP and KUEP
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <21b05f7298c1b18f73e6e5b4cd5005aafa24b6da.1599820109.git.christophe.leroy@csgroup.eu>
On Fri, 11 Sep 2020 10:29:15 +0000 (UTC), Christophe Leroy wrote:
> low_sleep_handler() has an hardcoded restore of segment registers
> that doesn't take KUAP and KUEP into account.
>
> Use head_32's load_segment_registers() routine instead.
Applied to powerpc/next.
[1/1] powerpc/powermac: Fix low_sleep_handler with KUAP and KUEP
https://git.kernel.org/powerpc/c/2c637d2df4ee4830e9d3eb2bd5412250522ce96e
cheers
^ permalink raw reply
* Re: [PATCH v1] powerpc/process: Tag an #endif to help locate the matching #ifdef.
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <3612a8f8aaca16de3fc414a7e66293319d6e213c.1597643147.git.christophe.leroy@csgroup.eu>
On Mon, 17 Aug 2020 05:46:45 +0000 (UTC), Christophe Leroy wrote:
> That #endif is more than 100 lines after the matching #ifdef,
> and there are several #ifdef/#else/#endif inbetween.
>
> Tag it as /* CONFIG_PPC_BOOK3S_64 */ to help locate the
> matching #ifdef.
Applied to powerpc/next.
[1/1] powerpc/process: Tag an #endif to help locate the matching #ifdef.
https://git.kernel.org/powerpc/c/60d62bfd24efce1a595d259100b8a4e7a489e834
cheers
^ permalink raw reply
* Re: [PATCH v1] powerpc/process: Replace #ifdef CONFIG_KALLSYMS by IS_ENABLED()
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <2d89732a9062b2cf2651728804e4b8f6c9b9358e.1597643164.git.christophe.leroy@csgroup.eu>
On Mon, 17 Aug 2020 05:46:44 +0000 (UTC), Christophe Leroy wrote:
> The #ifdef CONFIG_KALLSYMS encloses some printk which can
> compile in all cases.
>
> Replace by IS_ENABLED().
Applied to powerpc/next.
[1/1] powerpc/process: Replace #ifdef CONFIG_KALLSYMS by IS_ENABLED()
https://git.kernel.org/powerpc/c/8f020c7ca300fd60374f0347814c92ea513c24da
cheers
^ permalink raw reply
* Re: [PATCH v1] powerpc/process: Replace an #ifdef CONFIG_PPC_BOOK3S_64 by IS_ENABLED()
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <d31506ca9bac9def68cf7424eded63fdc4fb6660.1597643167.git.christophe.leroy@csgroup.eu>
On Mon, 17 Aug 2020 05:46:42 +0000 (UTC), Christophe Leroy wrote:
> This #ifdef CONFIG_PPC_BOOK3S_64 calls preload_new_slb_context()
> when radix is not enabled.
>
> radix_enabled() is always defined, and the prototype for
> preload_new_slb_context() is always present, so the #ifdef
> is unneeded.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/process: Replace an #ifdef CONFIG_PPC_BOOK3S_64 by IS_ENABLED()
https://git.kernel.org/powerpc/c/bfac2799301c19d81122af04a8a3ad5ecae3737e
cheers
^ permalink raw reply
* Re: [PATCH v1] powerpc/process: Replace an #ifdef CONFIG_PPC_47x by IS_ENABLED()
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <ac8da0e3baa91dda805e1e492fd65aecd90c1fb5.1597643156.git.christophe.leroy@csgroup.eu>
On Mon, 17 Aug 2020 05:46:41 +0000 (UTC), Christophe Leroy wrote:
> isync() is always defined, no need for an #ifdef.
>
> Replace it by IS_ENABLED(CONFIG_PPC_47x).
Applied to powerpc/next.
[1/1] powerpc/process: Replace an #ifdef CONFIG_PPC_47x by IS_ENABLED()
https://git.kernel.org/powerpc/c/04d476bfbb06426fef2985c8e53578bb04596a6f
cheers
^ permalink raw reply
* Re: [PATCH v1] powerpc/process: Replace an #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) by IS_ENABLED()
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <a1b6ef3d657c8f249193442f56868fc358ea5b6c.1597643160.git.christophe.leroy@csgroup.eu>
On Mon, 17 Aug 2020 05:46:43 +0000 (UTC), Christophe Leroy wrote:
> The #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) encloses some
> printk which can be compiled in all cases.
>
> Replace by IS_ENABLED().
Applied to powerpc/next.
[1/1] powerpc/process: Replace an #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) by IS_ENABLED()
https://git.kernel.org/powerpc/c/2ec42996f5b12826466300a755413577b6913206
cheers
^ permalink raw reply
* Re: [PATCH v1 1/4] powerpc/process: Remove useless #ifdef CONFIG_VSX
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <0eb61cf0dc66d781d47deb2228498cd61d03a754.1597643221.git.christophe.leroy@csgroup.eu>
On Mon, 17 Aug 2020 05:47:55 +0000 (UTC), Christophe Leroy wrote:
> cpu_has_feature(CPU_FTR_VSX) returns false when CONFIG_VSX is
> not set.
>
> There is no need to enclose the test in an #ifdef CONFIG_VSX.
> Remove it.
Applied to powerpc/next.
[1/4] powerpc/process: Remove useless #ifdef CONFIG_VSX
https://git.kernel.org/powerpc/c/80739c2bd29133715d6828e333649a55095f4747
[2/4] powerpc/process: Remove useless #ifdef CONFIG_ALTIVEC
https://git.kernel.org/powerpc/c/e3667ee427e224f9951eb3940a97477285548134
[3/4] powerpc/process: Remove useless #ifdef CONFIG_SPE
https://git.kernel.org/powerpc/c/532ed1900d37a47c821718a0d8d28eb05b2c4d28
[4/4] powerpc/process: Remove useless #ifdef CONFIG_PPC_FPU
https://git.kernel.org/powerpc/c/c83c192a6fbb1d4db4144c40296ed059f5eca384
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/uaccess: Add pre-update addressing to __put_user_asm_goto()
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <346f65d677adb11865f7762c25a1ca3c64404ba5.1599216023.git.christophe.leroy@csgroup.eu>
On Fri, 4 Sep 2020 10:46:47 +0000 (UTC), Christophe Leroy wrote:
> Enable pre-update addressing mode in __put_user_asm_goto()
Applied to powerpc/next.
[1/1] powerpc/uaccess: Add pre-update addressing to __put_user_asm_goto()
https://git.kernel.org/powerpc/c/fcf1f26895a4f14618b0dc04e0801b123c55e4a3
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/kasan: Fix CONFIG_KASAN_VMALLOC for 8xx
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <8ae4554357da4882612644a74387ae05525b2aaa.1599800716.git.christophe.leroy@csgroup.eu>
On Fri, 11 Sep 2020 05:05:38 +0000 (UTC), Christophe Leroy wrote:
> Before the commit identified below, pages tables allocation was
> performed after the allocation of final shadow area for linear memory.
> But that commit switched the order, leading to page tables being
> already allocated at the time 8xx kasan_init_shadow_8M() is called.
> Due to this, kasan_init_shadow_8M() doesn't map the needed
> shadow entries because there are already page tables.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/kasan: Fix CONFIG_KASAN_VMALLOC for 8xx
https://git.kernel.org/powerpc/c/4c42dc5c69a8f24c467a6c997909d2f1d4efdc7f
cheers
^ permalink raw reply
* Re: [PATCH] powerpc: Fix random segfault when freeing hugetlb range
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <f0cb2a5477cd87d1eaadb128042e20aeb2bc2859.1598860677.git.christophe.leroy@csgroup.eu>
On Mon, 31 Aug 2020 07:58:19 +0000 (UTC), Christophe Leroy wrote:
> The following random segfault is observed from time to time with
> map_hugetlb selftest:
>
> root@localhost:~# ./map_hugetlb 1 19
> 524288 kB hugepages
> Mapping 1 Mbytes
> Segmentation fault
>
> [...]
Applied to powerpc/next.
[1/1] powerpc: Fix random segfault when freeing hugetlb range
https://git.kernel.org/powerpc/c/542db12a9c42d1ce70c45091765e02f74c129f43
cheers
^ permalink raw reply
* Re: [PATCH 1/3] powerpc/uaccess: Switch __put_user_size_allowed() to __put_user_asm_goto()
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <94ba5a5138f99522e1562dbcdb38d31aa790dc89.1599216721.git.christophe.leroy@csgroup.eu>
On Fri, 4 Sep 2020 11:01:30 +0000 (UTC), Christophe Leroy wrote:
> __put_user_asm_goto() provides more flexibility to GCC and avoids using
> a local variable to tell if the write succeeded or not.
> GCC can then avoid implementing a cmp in the fast path.
>
> See the difference for a small function like the PPC64 version of
> save_general_regs() in arch/powerpc/kernel/signal_32.c:
>
> [...]
Applied to powerpc/next.
[1/3] powerpc/uaccess: Switch __put_user_size_allowed() to __put_user_asm_goto()
https://git.kernel.org/powerpc/c/ee0a49a6870ea75e25b4d4984c1bb6b3b7c65f2b
[2/3] powerpc/uaccess: Switch __patch_instruction() to __put_user_asm_goto()
https://git.kernel.org/powerpc/c/e64ac41ab0c510b3f85199a585eb886cad92fb19
[3/3] powerpc/uaccess: Remove __put_user_asm() and __put_user_asm2()
https://git.kernel.org/powerpc/c/7fdf966bed155b214f4f1f9b67825a40b2e9b998
cheers
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/8xx: Refactor calculation of number of entries per PTE in page tables
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <f6ea2483c2c389567b007945948f704d18cfaeea.1598862623.git.christophe.leroy@csgroup.eu>
On Mon, 31 Aug 2020 08:30:43 +0000 (UTC), Christophe Leroy wrote:
> On 8xx, the number of entries occupied by a PTE in the page tables
> depends on the size of the page. At the time being, this calculation
> is done in two places: in pte_update() and in set_huge_pte_at()
>
> Refactor this calculation into a helper called
> number_of_cells_per_pte(). For the time being, the val param is
> unused. It will be used by following patch.
>
> [...]
Applied to powerpc/next.
[1/2] powerpc/8xx: Refactor calculation of number of entries per PTE in page tables
https://git.kernel.org/powerpc/c/175a99991511fed16108dcb823f0af8e72325a1f
[2/2] powerpc/8xx: Support 16k hugepages with 4k pages
https://git.kernel.org/powerpc/c/e47168f3d1b14af5281cf50c59561d59d28201f9
cheers
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/32: Fix vmap stack - Do not activate MMU before reading task struct
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras,
Christophe Leroy
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <a027d447022a006c9c4958ac734128e577a3c5c1.1599486108.git.christophe.leroy@csgroup.eu>
On Mon, 7 Sep 2020 13:42:09 +0000 (UTC), Christophe Leroy wrote:
> We need r1 to be properly set before activating MMU, so
> reading task_struct->stack must be done with MMU off.
>
> This means we need an additional register to play with MSR
> bits while r11 now points to the stack. For that, move r10
> back to CR (As is already done for hash MMU) and use r10.
>
> [...]
Applied to powerpc/next.
[1/2] powerpc/32: Fix vmap stack - Do not activate MMU before reading task struct
https://git.kernel.org/powerpc/c/c118c7303ad528be8ff2aea8cd1ee15452c763f0
[2/2] powerpc/32: Fix vmap stack - Properly set r1 before activating MMU
https://git.kernel.org/powerpc/c/da7bb43ab9da39bcfed0d146ce94e1f0cbae4ca0
cheers
^ permalink raw reply
* Re: [PATCH v3] powerpc/pseries/svm: Allocate SWIOTLB buffer anywhere in memory
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Thiago Jung Bauermann, iommu
Cc: Konrad Rzeszutek Wilk, Ram Pai, Robin Murphy, linux-kernel,
Satheesh Rajendran, linuxppc-dev, Christoph Hellwig
In-Reply-To: <20200818221126.391073-1-bauerman@linux.ibm.com>
On Tue, 18 Aug 2020 19:11:26 -0300, Thiago Jung Bauermann wrote:
> POWER secure guests (i.e., guests which use the Protection Execution
> Facility) need to use SWIOTLB to be able to do I/O with the hypervisor, but
> they don't need the SWIOTLB memory to be in low addresses since the
> hypervisor doesn't have any addressing limitation.
>
> This solves a SWIOTLB initialization problem we are seeing in secure guests
> with 128 GB of RAM: they are configured with 4 GB of crashkernel reserved
> memory, which leaves no space for SWIOTLB in low addresses.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/pseries/svm: Allocate SWIOTLB buffer anywhere in memory
https://git.kernel.org/powerpc/c/eae9eec476d13fad9af6da1f44a054ee02b7b161
cheers
^ permalink raw reply
* Re: [PATCH v2 1/4] powerpc/percpu: Update percpu bootmem allocator
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Aneesh Kumar K.V, linuxppc-dev, mpe; +Cc: cam
In-Reply-To: <20200608070904.387440-1-aneesh.kumar@linux.ibm.com>
On Mon, 8 Jun 2020 12:39:01 +0530, Aneesh Kumar K.V wrote:
> This update the ppc64 version to be closer to x86/sparc.
Applied to powerpc/next.
[1/4] powerpc/percpu: Update percpu bootmem allocator
https://git.kernel.org/powerpc/c/2a32abac8860aa1c3a1fc99973ce67179575b36c
[2/4] powerpc/64/mm: implement page mapping percpu first chunk allocator
https://git.kernel.org/powerpc/c/eb553f16973ade990d05946af9ae191394712c8a
[3/4] powerpc/book3s64/hash/4k: Support large linear mapping range with 4K
https://git.kernel.org/powerpc/c/7746406baa3bc9e23fdd7b7da2f04d86e25ab837
[4/4] powerpc/mm/book3s: Split radix and hash MAX_PHYSMEM limit
https://git.kernel.org/powerpc/c/b32d5d7e920a364287f6206af2d20179978a617d
cheers
^ permalink raw reply
* Re: [PATCH] powerepc/book3s64/hash: Align start/end address correctly with bolt mapping
From: Michael Ellerman @ 2020-09-17 11:27 UTC (permalink / raw)
To: Aneesh Kumar K.V, linuxppc-dev, mpe
In-Reply-To: <20200907072539.67310-1-aneesh.kumar@linux.ibm.com>
On Mon, 7 Sep 2020 12:55:39 +0530, Aneesh Kumar K.V wrote:
> This ensures we don't do a partial mapping of memory. With nvdimm, when
> creating namespaces with size not aligned to 16MB, the kernel ends up partially
> mapping the pages. This can result in kernel adding multiple hash page table
> entries for the same range. A new namespace will result in
> create_section_mapping() with start and end overlapping an already existing
> bolted hash page table entry.
>
> [...]
Applied to powerpc/next.
[1/1] powerepc/book3s64/hash: Align start/end address correctly with bolt mapping
https://git.kernel.org/powerpc/c/79b123cdf9cf0d4a1620baa8c611962626323a08
cheers
^ permalink raw reply
* Re: [PATCH v2 0/3] ASoC: fsl_sai: update the register list
From: Fabio Estevam @ 2020-09-17 9:40 UTC (permalink / raw)
To: Shengjiu Wang
Cc: Linux-ALSA, Timur Tabi, Xiubo Li, Liam Girdwood, Takashi Iwai,
Jaroslav Kysela, Nicolin Chen, Mark Brown, linuxppc-dev,
linux-kernel
In-Reply-To: <1600323079-5317-1-git-send-email-shengjiu.wang@nxp.com>
Hi Shengjiu,
On Thu, Sep 17, 2020 at 3:18 AM Shengjiu Wang <shengjiu.wang@nxp.com> wrote:
>
> As sai ip is upgraded, so update sai register list.
>
> Shengjiu Wang (3):
> ASoC: fsl_sai: Add new added registers and new bit definition
> ASoC: fsl_sai: Add fsl_sai_check_version function
> ASoC: fsl_sai: Set MCLK input or output direction
>
> changes in v2:
> - update commit message for first commit
> - Add acked-by Nicolin
For the whole series:
Reviewed-by: Fabio Estevam <festevam@gmail.com>
^ permalink raw reply
* [PATCH v2 2/2] powerpc/64s: Convert some cpu_setup() and cpu_restore() functions to C
From: Jordan Niethe @ 2020-09-17 9:17 UTC (permalink / raw)
To: linuxppc-dev; +Cc: oohall, npiggin, Jordan Niethe
In-Reply-To: <20200917091716.4631-1-jniethe5@gmail.com>
The only thing keeping the cpu_setup() and cpu_restore() functions used
in the cputable entries for Power7, Power8, Power9 and Power10 in
assembly was cpu_restore() being called before there was a stack in
generic_secondary_smp_init(). Commit ("powerpc/64: Set up a kernel stack
for secondaries before cpu_restore()") means that it is now possible to
use C.
Rewrite the functions in C so they are a little bit easier to read. This
is not changing their functionality.
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
---
arch/powerpc/include/asm/cpu_setup_power.h | 12 +
arch/powerpc/kernel/cpu_setup_power.S | 252 -------------------
arch/powerpc/kernel/cpu_setup_power.c | 269 +++++++++++++++++++++
arch/powerpc/kernel/cputable.c | 9 +-
4 files changed, 282 insertions(+), 260 deletions(-)
create mode 100644 arch/powerpc/include/asm/cpu_setup_power.h
delete mode 100644 arch/powerpc/kernel/cpu_setup_power.S
create mode 100644 arch/powerpc/kernel/cpu_setup_power.c
diff --git a/arch/powerpc/include/asm/cpu_setup_power.h b/arch/powerpc/include/asm/cpu_setup_power.h
new file mode 100644
index 000000000000..24be9131f803
--- /dev/null
+++ b/arch/powerpc/include/asm/cpu_setup_power.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (C) 2020 IBM Corporation
+ */
+void __setup_cpu_power7(unsigned long offset, struct cpu_spec *spec);
+void __restore_cpu_power7(void);
+void __setup_cpu_power8(unsigned long offset, struct cpu_spec *spec);
+void __restore_cpu_power8(void);
+void __setup_cpu_power9(unsigned long offset, struct cpu_spec *spec);
+void __restore_cpu_power9(void);
+void __setup_cpu_power10(unsigned long offset, struct cpu_spec *spec);
+void __restore_cpu_power10(void);
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
deleted file mode 100644
index 704e8b9501ee..000000000000
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ /dev/null
@@ -1,252 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * This file contains low level CPU setup functions.
- * Copyright (C) 2003 Benjamin Herrenschmidt (benh@kernel.crashing.org)
- */
-
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/cputable.h>
-#include <asm/ppc_asm.h>
-#include <asm/asm-offsets.h>
-#include <asm/cache.h>
-#include <asm/book3s/64/mmu-hash.h>
-
-/* Entry: r3 = crap, r4 = ptr to cputable entry
- *
- * Note that we can be called twice for pseudo-PVRs
- */
-_GLOBAL(__setup_cpu_power7)
- mflr r11
- bl __init_hvmode_206
- mtlr r11
- beqlr
- li r0,0
- mtspr SPRN_LPID,r0
- LOAD_REG_IMMEDIATE(r0, PCR_MASK)
- mtspr SPRN_PCR,r0
- mfspr r3,SPRN_LPCR
- li r4,(LPCR_LPES1 >> LPCR_LPES_SH)
- bl __init_LPCR_ISA206
- mtlr r11
- blr
-
-_GLOBAL(__restore_cpu_power7)
- mflr r11
- mfmsr r3
- rldicl. r0,r3,4,63
- beqlr
- li r0,0
- mtspr SPRN_LPID,r0
- LOAD_REG_IMMEDIATE(r0, PCR_MASK)
- mtspr SPRN_PCR,r0
- mfspr r3,SPRN_LPCR
- li r4,(LPCR_LPES1 >> LPCR_LPES_SH)
- bl __init_LPCR_ISA206
- mtlr r11
- blr
-
-_GLOBAL(__setup_cpu_power8)
- mflr r11
- bl __init_FSCR
- bl __init_PMU
- bl __init_PMU_ISA207
- bl __init_hvmode_206
- mtlr r11
- beqlr
- li r0,0
- mtspr SPRN_LPID,r0
- LOAD_REG_IMMEDIATE(r0, PCR_MASK)
- mtspr SPRN_PCR,r0
- mfspr r3,SPRN_LPCR
- ori r3, r3, LPCR_PECEDH
- li r4,0 /* LPES = 0 */
- bl __init_LPCR_ISA206
- bl __init_HFSCR
- bl __init_PMU_HV
- bl __init_PMU_HV_ISA207
- mtlr r11
- blr
-
-_GLOBAL(__restore_cpu_power8)
- mflr r11
- bl __init_FSCR
- bl __init_PMU
- bl __init_PMU_ISA207
- mfmsr r3
- rldicl. r0,r3,4,63
- mtlr r11
- beqlr
- li r0,0
- mtspr SPRN_LPID,r0
- LOAD_REG_IMMEDIATE(r0, PCR_MASK)
- mtspr SPRN_PCR,r0
- mfspr r3,SPRN_LPCR
- ori r3, r3, LPCR_PECEDH
- li r4,0 /* LPES = 0 */
- bl __init_LPCR_ISA206
- bl __init_HFSCR
- bl __init_PMU_HV
- bl __init_PMU_HV_ISA207
- mtlr r11
- blr
-
-_GLOBAL(__setup_cpu_power10)
- mflr r11
- bl __init_FSCR_power10
- bl __init_PMU
- bl __init_PMU_ISA31
- b 1f
-
-_GLOBAL(__setup_cpu_power9)
- mflr r11
- bl __init_FSCR_power9
- bl __init_PMU
-1: bl __init_hvmode_206
- mtlr r11
- beqlr
- li r0,0
- mtspr SPRN_PSSCR,r0
- mtspr SPRN_LPID,r0
- mtspr SPRN_PID,r0
- LOAD_REG_IMMEDIATE(r0, PCR_MASK)
- mtspr SPRN_PCR,r0
- mfspr r3,SPRN_LPCR
- LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE | LPCR_HEIC)
- or r3, r3, r4
- LOAD_REG_IMMEDIATE(r4, LPCR_UPRT | LPCR_HR)
- andc r3, r3, r4
- li r4,0 /* LPES = 0 */
- bl __init_LPCR_ISA300
- bl __init_HFSCR
- bl __init_PMU_HV
- mtlr r11
- blr
-
-_GLOBAL(__restore_cpu_power10)
- mflr r11
- bl __init_FSCR_power10
- bl __init_PMU
- bl __init_PMU_ISA31
- b 1f
-
-_GLOBAL(__restore_cpu_power9)
- mflr r11
- bl __init_FSCR_power9
- bl __init_PMU
-1: mfmsr r3
- rldicl. r0,r3,4,63
- mtlr r11
- beqlr
- li r0,0
- mtspr SPRN_PSSCR,r0
- mtspr SPRN_LPID,r0
- mtspr SPRN_PID,r0
- LOAD_REG_IMMEDIATE(r0, PCR_MASK)
- mtspr SPRN_PCR,r0
- mfspr r3,SPRN_LPCR
- LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE | LPCR_HEIC)
- or r3, r3, r4
- LOAD_REG_IMMEDIATE(r4, LPCR_UPRT | LPCR_HR)
- andc r3, r3, r4
- li r4,0 /* LPES = 0 */
- bl __init_LPCR_ISA300
- bl __init_HFSCR
- bl __init_PMU_HV
- mtlr r11
- blr
-
-__init_hvmode_206:
- /* Disable CPU_FTR_HVMODE and exit if MSR:HV is not set */
- mfmsr r3
- rldicl. r0,r3,4,63
- bnelr
- ld r5,CPU_SPEC_FEATURES(r4)
- LOAD_REG_IMMEDIATE(r6,CPU_FTR_HVMODE | CPU_FTR_P9_TM_HV_ASSIST)
- andc r5,r5,r6
- std r5,CPU_SPEC_FEATURES(r4)
- blr
-
-__init_LPCR_ISA206:
- /* Setup a sane LPCR:
- * Called with initial LPCR in R3 and desired LPES 2-bit value in R4
- *
- * LPES = 0b01 (HSRR0/1 used for 0x500)
- * PECE = 0b111
- * DPFD = 4
- * HDICE = 0
- * VC = 0b100 (VPM0=1, VPM1=0, ISL=0)
- * VRMASD = 0b10000 (L=1, LP=00)
- *
- * Other bits untouched for now
- */
- li r5,0x10
- rldimi r3,r5, LPCR_VRMASD_SH, 64-LPCR_VRMASD_SH-5
-
- /* POWER9 has no VRMASD */
-__init_LPCR_ISA300:
- rldimi r3,r4, LPCR_LPES_SH, 64-LPCR_LPES_SH-2
- ori r3,r3,(LPCR_PECE0|LPCR_PECE1|LPCR_PECE2)
- li r5,4
- rldimi r3,r5, LPCR_DPFD_SH, 64-LPCR_DPFD_SH-3
- clrrdi r3,r3,1 /* clear HDICE */
- li r5,4
- rldimi r3,r5, LPCR_VC_SH, 0
- mtspr SPRN_LPCR,r3
- isync
- blr
-
-__init_FSCR_power10:
- mfspr r3, SPRN_FSCR
- ori r3, r3, FSCR_PREFIX
- mtspr SPRN_FSCR, r3
- // fall through
-
-__init_FSCR_power9:
- mfspr r3, SPRN_FSCR
- ori r3, r3, FSCR_SCV
- mtspr SPRN_FSCR, r3
- // fall through
-
-__init_FSCR:
- mfspr r3,SPRN_FSCR
- ori r3,r3,FSCR_TAR|FSCR_EBB
- mtspr SPRN_FSCR,r3
- blr
-
-__init_HFSCR:
- mfspr r3,SPRN_HFSCR
- ori r3,r3,HFSCR_TAR|HFSCR_TM|HFSCR_BHRB|HFSCR_PM|\
- HFSCR_DSCR|HFSCR_VECVSX|HFSCR_FP|HFSCR_EBB|HFSCR_MSGP
- mtspr SPRN_HFSCR,r3
- blr
-
-__init_PMU_HV:
- li r5,0
- mtspr SPRN_MMCRC,r5
- blr
-
-__init_PMU_HV_ISA207:
- li r5,0
- mtspr SPRN_MMCRH,r5
- blr
-
-__init_PMU:
- li r5,0
- mtspr SPRN_MMCRA,r5
- mtspr SPRN_MMCR0,r5
- mtspr SPRN_MMCR1,r5
- mtspr SPRN_MMCR2,r5
- blr
-
-__init_PMU_ISA207:
- li r5,0
- mtspr SPRN_MMCRS,r5
- blr
-
-__init_PMU_ISA31:
- li r5,0
- mtspr SPRN_MMCR3,r5
- LOAD_REG_IMMEDIATE(r5, MMCRA_BHRB_DISABLE)
- mtspr SPRN_MMCRA,r5
- blr
diff --git a/arch/powerpc/kernel/cpu_setup_power.c b/arch/powerpc/kernel/cpu_setup_power.c
new file mode 100644
index 000000000000..cf5201b0579d
--- /dev/null
+++ b/arch/powerpc/kernel/cpu_setup_power.c
@@ -0,0 +1,269 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2020 IBM Corporation
+ * This file contains low level CPU setup functions.
+ * Originally written in assembly by
+ * Benjamin Herrenschmidt (benh@kernel.crashing.org)
+ */
+#include <asm/reg.h>
+#include <asm/synch.h>
+#include <linux/bitops.h>
+#include <asm/cputable.h>
+#include <asm/cpu_setup_power.h>
+
+/* Disable CPU_FTR_HVMODE and return false if MSR:HV is not set */
+static bool init_hvmode_206(struct cpu_spec *t)
+{
+ u64 msr;
+
+ msr = mfmsr();
+ if (msr & MSR_HV)
+ return true;
+
+ t->cpu_features &= ~(CPU_FTR_HVMODE | CPU_FTR_P9_TM_HV_ASSIST);
+ return false;
+}
+
+static void init_LPCR_ISA300(u64 lpcr, u64 lpes)
+{
+ /* POWER9 has no VRMASD */
+ lpcr |= (lpes << LPCR_LPES_SH) & LPCR_LPES;
+ lpcr |= LPCR_PECE0|LPCR_PECE1|LPCR_PECE2;
+ lpcr |= (4ull << LPCR_DPFD_SH) & LPCR_DPFD;
+ lpcr &= ~LPCR_HDICE; /* clear HDICE */
+ lpcr |= (4ull << LPCR_VC_SH);
+ mtspr(SPRN_LPCR, lpcr);
+ isync();
+}
+
+/*
+ * Setup a sane LPCR:
+ * Called with initial LPCR and desired LPES 2-bit value
+ *
+ * LPES = 0b01 (HSRR0/1 used for 0x500)
+ * PECE = 0b111
+ * DPFD = 4
+ * HDICE = 0
+ * VC = 0b100 (VPM0=1, VPM1=0, ISL=0)
+ * VRMASD = 0b10000 (L=1, LP=00)
+ *
+ * Other bits untouched for now
+ */
+static void init_LPCR_ISA206(u64 lpcr, u64 lpes)
+{
+ lpcr |= (0x10ull << LPCR_VRMASD_SH) & LPCR_VRMASD;
+ init_LPCR_ISA300(lpcr, lpes);
+}
+
+static void init_FSCR(void)
+{
+ u64 fscr;
+
+ fscr = mfspr(SPRN_FSCR);
+ fscr |= FSCR_TAR|FSCR_EBB;
+ mtspr(SPRN_FSCR, fscr);
+}
+
+static void init_FSCR_power9(void)
+{
+ u64 fscr;
+
+ fscr = mfspr(SPRN_FSCR);
+ fscr |= FSCR_SCV;
+ mtspr(SPRN_FSCR, fscr);
+ init_FSCR();
+}
+
+static void init_FSCR_power10(void)
+{
+ u64 fscr;
+
+ fscr = mfspr(SPRN_FSCR);
+ fscr |= FSCR_PREFIX;
+ mtspr(SPRN_FSCR, fscr);
+ init_FSCR_power9();
+}
+
+static void init_HFSCR(void)
+{
+ u64 hfscr;
+
+ hfscr = mfspr(SPRN_HFSCR);
+ hfscr |= HFSCR_TAR|HFSCR_TM|HFSCR_BHRB|HFSCR_PM|HFSCR_DSCR|\
+ HFSCR_VECVSX|HFSCR_FP|HFSCR_EBB|HFSCR_MSGP;
+ mtspr(SPRN_HFSCR, hfscr);
+}
+
+static void init_PMU_HV(void)
+{
+ mtspr(SPRN_MMCRC, 0);
+}
+
+static void init_PMU_HV_ISA207(void)
+{
+ mtspr(SPRN_MMCRH, 0);
+}
+
+static void init_PMU(void)
+{
+ mtspr(SPRN_MMCRA, 0);
+ mtspr(SPRN_MMCR0, 0);
+ mtspr(SPRN_MMCR1, 0);
+ mtspr(SPRN_MMCR2, 0);
+}
+
+static void init_PMU_ISA207(void)
+{
+ mtspr(SPRN_MMCRS, 0);
+}
+
+static void init_PMU_ISA31(void)
+{
+ mtspr(SPRN_MMCR3, 0);
+ mtspr(SPRN_MMCRA, MMCRA_BHRB_DISABLE);
+}
+
+/*
+ * Note that we can be called twice of pseudo-PVRs.
+ * The parameter offset is not used.
+ */
+
+void __setup_cpu_power7(unsigned long offset, struct cpu_spec *t)
+{
+ if (!init_hvmode_206(t))
+ return;
+
+ mtspr(SPRN_LPID, 0);
+ mtspr(SPRN_PCR, PCR_MASK);
+ init_LPCR_ISA206(mfspr(SPRN_LPCR), LPCR_LPES1 >> LPCR_LPES_SH);
+}
+
+void __restore_cpu_power7(void)
+{
+ u64 msr;
+
+ msr = mfmsr();
+ if (!(msr & MSR_HV))
+ return;
+
+ mtspr(SPRN_LPID, 0);
+ mtspr(SPRN_PCR, PCR_MASK);
+ init_LPCR_ISA206(mfspr(SPRN_LPCR), LPCR_LPES1 >> LPCR_LPES_SH);
+}
+
+void __setup_cpu_power8(unsigned long offset, struct cpu_spec *t)
+{
+ init_FSCR();
+ init_PMU();
+ init_PMU_ISA207();
+
+ if (!init_hvmode_206(t))
+ return;
+
+ mtspr(SPRN_LPID, 0);
+ mtspr(SPRN_PCR, PCR_MASK);
+ init_LPCR_ISA206(mfspr(SPRN_LPCR) | LPCR_PECEDH, 0); /* LPES = 0 */
+ init_HFSCR();
+ init_PMU_HV();
+ init_PMU_HV_ISA207();
+}
+
+void __restore_cpu_power8(void)
+{
+ u64 msr;
+
+ init_FSCR();
+ init_PMU();
+ init_PMU_ISA207();
+
+ msr = mfmsr();
+ if (!(msr & MSR_HV))
+ return;
+
+ mtspr(SPRN_LPID, 0);
+ mtspr(SPRN_PCR, PCR_MASK);
+ init_LPCR_ISA206(mfspr(SPRN_LPCR) | LPCR_PECEDH, 0); /* LPES = 0 */
+ init_HFSCR();
+ init_PMU_HV();
+ init_PMU_HV_ISA207();
+}
+
+void __setup_cpu_power9(unsigned long offset, struct cpu_spec *t)
+{
+ init_FSCR_power9();
+ init_PMU();
+
+ if (!init_hvmode_206(t))
+ return;
+
+ mtspr(SPRN_PSSCR, 0);
+ mtspr(SPRN_LPID, 0);
+ mtspr(SPRN_PID, 0);
+ mtspr(SPRN_PCR, PCR_MASK);
+ init_LPCR_ISA300((mfspr(SPRN_LPCR) | LPCR_PECEDH | LPCR_PECE_HVEE |\
+ LPCR_HVICE | LPCR_HEIC) & ~(LPCR_UPRT | LPCR_HR), 0);
+ init_HFSCR();
+ init_PMU_HV();
+}
+
+void __restore_cpu_power9(void)
+{
+ u64 msr;
+
+ init_FSCR_power9();
+ init_PMU();
+
+ msr = mfmsr();
+ if (!(msr & MSR_HV))
+ return;
+
+ mtspr(SPRN_PSSCR, 0);
+ mtspr(SPRN_LPID, 0);
+ mtspr(SPRN_PID, 0);
+ mtspr(SPRN_PCR, PCR_MASK);
+ init_LPCR_ISA300((mfspr(SPRN_LPCR) | LPCR_PECEDH | LPCR_PECE_HVEE |\
+ LPCR_HVICE | LPCR_HEIC) & ~(LPCR_UPRT | LPCR_HR), 0);
+ init_HFSCR();
+ init_PMU_HV();
+}
+
+void __setup_cpu_power10(unsigned long offset, struct cpu_spec *t)
+{
+ init_FSCR_power10();
+ init_PMU();
+ init_PMU_ISA31();
+
+ if (!init_hvmode_206(t))
+ return;
+
+ mtspr(SPRN_PSSCR, 0);
+ mtspr(SPRN_LPID, 0);
+ mtspr(SPRN_PID, 0);
+ mtspr(SPRN_PCR, PCR_MASK);
+ init_LPCR_ISA300((mfspr(SPRN_LPCR) | LPCR_PECEDH | LPCR_PECE_HVEE |\
+ LPCR_HVICE | LPCR_HEIC) & ~(LPCR_UPRT | LPCR_HR), 0);
+ init_HFSCR();
+ init_PMU_HV();
+}
+
+void __restore_cpu_power10(void)
+{
+ u64 msr;
+
+ init_FSCR_power10();
+ init_PMU();
+ init_PMU_ISA31();
+
+ msr = mfmsr();
+ if (!(msr & MSR_HV))
+ return;
+
+ mtspr(SPRN_PSSCR, 0);
+ mtspr(SPRN_LPID, 0);
+ mtspr(SPRN_PID, 0);
+ mtspr(SPRN_PCR, PCR_MASK);
+ init_LPCR_ISA300((mfspr(SPRN_LPCR) | LPCR_PECEDH | LPCR_PECE_HVEE |\
+ LPCR_HVICE | LPCR_HEIC) & ~(LPCR_UPRT | LPCR_HR), 0);
+ init_HFSCR();
+ init_PMU_HV();
+}
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 3d406a9626e8..bce545280056 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -59,19 +59,12 @@ extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
#endif /* CONFIG_PPC32 */
#ifdef CONFIG_PPC64
+#include <asm/cpu_setup_power.h>
extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_pa6t(void);
extern void __restore_cpu_ppc970(void);
-extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
-extern void __restore_cpu_power7(void);
-extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
-extern void __restore_cpu_power8(void);
-extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec);
-extern void __restore_cpu_power9(void);
-extern void __setup_cpu_power10(unsigned long offset, struct cpu_spec* spec);
-extern void __restore_cpu_power10(void);
extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
extern long __machine_check_early_realmode_p9(struct pt_regs *regs);
--
2.17.1
^ permalink raw reply related
* [PATCH v2 1/2] powerpc/64: Set up a kernel stack for secondaries before cpu_restore()
From: Jordan Niethe @ 2020-09-17 9:17 UTC (permalink / raw)
To: linuxppc-dev; +Cc: oohall, npiggin, Jordan Niethe
Currently in generic_secondary_smp_init(), cur_cpu_spec->cpu_restore()
is called before a stack has been set up in r1. This was previously fine
as the cpu_restore() functions were implemented in assembly and did not
use a stack. However commit 5a61ef74f269 ("powerpc/64s: Support new
device tree binding for discovering CPU features") used
__restore_cpu_cpufeatures() as the cpu_restore() function for a
device-tree features based cputable entry. This is a C function and
hence uses a stack in r1.
generic_secondary_smp_init() is entered on the secondary cpus via the
primary cpu using the OPAL call opal_start_cpu(). In OPAL, each hardware
thread has its own stack. The OPAL call is ran in the primary's hardware
thread. During the call, a job is scheduled on a secondary cpu that will
start executing at the address of generic_secondary_smp_init(). Hence
the value that will be left in r1 when the secondary cpu enters the
kernel is part of that secondary cpu's individual OPAL stack. This means
that __restore_cpu_cpufeatures() will write to that OPAL stack. This is
not horribly bad as each hardware thread has its own stack and the call
that enters the kernel from OPAL never returns, but it is still wrong
and should be corrected.
Create the temp kernel stack before calling cpu_restore().
Fixes: 5a61ef74f269 ("powerpc/64s: Support new device tree binding for discovering CPU features")
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
---
v2: Add more detail to the commit message
---
arch/powerpc/kernel/head_64.S | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 0e05a9a47a4b..4b7f4c6c2600 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -420,6 +420,10 @@ generic_secondary_common_init:
/* From now on, r24 is expected to be logical cpuid */
mr r24,r5
+ /* Create a temp kernel stack for use before relocation is on. */
+ ld r1,PACAEMERGSP(r13)
+ subi r1,r1,STACK_FRAME_OVERHEAD
+
/* See if we need to call a cpu state restore handler */
LOAD_REG_ADDR(r23, cur_cpu_spec)
ld r23,0(r23)
@@ -448,10 +452,6 @@ generic_secondary_common_init:
sync /* order paca.run and cur_cpu_spec */
isync /* In case code patching happened */
- /* Create a temp kernel stack for use before relocation is on. */
- ld r1,PACAEMERGSP(r13)
- subi r1,r1,STACK_FRAME_OVERHEAD
-
b __secondary_start
#endif /* SMP */
--
2.17.1
^ permalink raw reply related
* linux-next: manual merge of the akpm-current tree with the powerpc tree
From: Stephen Rothwell @ 2020-09-17 8:57 UTC (permalink / raw)
To: Andrew Morton, Michael Ellerman, PowerPC
Cc: Linux Next Mailing List, Linux Kernel Mailing List, Mike Rapoport
[-- Attachment #1: Type: text/plain, Size: 1440 bytes --]
Hi all,
Today's linux-next merge of the akpm-current tree got a conflict in:
arch/powerpc/mm/kasan/kasan_init_32.c
between commit:
4c42dc5c69a8 ("powerpc/kasan: Fix CONFIG_KASAN_VMALLOC for 8xx")
from the powerpc tree and commit:
76713c119a9d ("arch, drivers: replace for_each_membock() with for_each_mem_range()")
from the akpm-current tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc arch/powerpc/mm/kasan/kasan_init_32.c
index 929716ea21e9,26fda3203320..000000000000
--- a/arch/powerpc/mm/kasan/kasan_init_32.c
+++ b/arch/powerpc/mm/kasan/kasan_init_32.c
@@@ -137,12 -138,12 +137,12 @@@ void __init kasan_mmu_init(void
void __init kasan_init(void)
{
- struct memblock_region *reg;
+ phys_addr_t base, end;
+ int ret;
+ u64 i;
- for_each_memblock(memory, reg) {
- phys_addr_t base = reg->base;
- phys_addr_t top = min(base + reg->size, total_lowmem);
+ for_each_mem_range(i, &base, &end) {
+ phys_addr_t top = min(end, total_lowmem);
- int ret;
if (base >= top)
continue;
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [PATCH 2/3] powerpc/mce: Add debugfs interface to inject MCE
From: kernel test robot @ 2020-09-17 8:36 UTC (permalink / raw)
To: Ganesh Goudar, linuxppc-dev, mpe
Cc: mahesh, msuchanek, kbuild-all, npiggin, Ganesh Goudar
In-Reply-To: <20200916172228.83271-3-ganeshgr@linux.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 2709 bytes --]
Hi Ganesh,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on powerpc/next]
[also build test WARNING on v5.9-rc5 next-20200916]
[cannot apply to scottwood/next mpe/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Ganesh-Goudar/powerpc-mce-Fix-mce-handler-and-add-selftest/20200917-092355
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-allyesconfig (attached as .config)
compiler: powerpc64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=powerpc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
arch/powerpc/sysdev/mce_error_inject.c: In function 'insert_slb_entry':
>> arch/powerpc/sysdev/mce_error_inject.c:52:22: warning: variable 'paca' set but not used [-Wunused-but-set-variable]
52 | struct paca_struct *paca;
| ^~~~
# https://github.com/0day-ci/linux/commit/4ab1196e8e542fdf0e7cda8638dfb0e5771fd98e
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Ganesh-Goudar/powerpc-mce-Fix-mce-handler-and-add-selftest/20200917-092355
git checkout 4ab1196e8e542fdf0e7cda8638dfb0e5771fd98e
vim +/paca +52 arch/powerpc/sysdev/mce_error_inject.c
48
49 static void insert_slb_entry(char *p, int ssize)
50 {
51 unsigned long flags, entry;
> 52 struct paca_struct *paca;
53
54 flags = SLB_VSID_KERNEL | mmu_psize_defs[MMU_PAGE_64K].sllp;
55
56 preempt_disable();
57
58 paca = get_paca();
59
60 entry = get_slb_index();
61 asm volatile("slbmte %0,%1" :
62 : "r" (mk_vsid_data((unsigned long)p, ssize, flags)),
63 "r" (mk_esid_data((unsigned long)p, ssize, entry))
64 : "memory");
65
66 entry = get_slb_index();
67 asm volatile("slbmte %0,%1" :
68 : "r" (mk_vsid_data((unsigned long)p, ssize, flags)),
69 "r" (mk_esid_data((unsigned long)p, ssize, entry))
70 : "memory");
71 preempt_enable();
72 p[0] = '!';
73 }
74
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 70430 bytes --]
^ permalink raw reply
* Re: [PATCH 2/3] powerpc/mce: Add debugfs interface to inject MCE
From: kernel test robot @ 2020-09-17 8:24 UTC (permalink / raw)
To: Ganesh Goudar, linuxppc-dev, mpe
Cc: mahesh, msuchanek, kbuild-all, npiggin, Ganesh Goudar
In-Reply-To: <20200916172228.83271-3-ganeshgr@linux.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 10308 bytes --]
Hi Ganesh,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on v5.9-rc5 next-20200916]
[cannot apply to scottwood/next mpe/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Ganesh-Goudar/powerpc-mce-Fix-mce-handler-and-add-selftest/20200917-092355
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-randconfig-r021-20200917 (attached as .config)
compiler: powerpc-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=powerpc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
arch/powerpc/sysdev/mce_error_inject.c: In function 'get_slb_index':
>> arch/powerpc/sysdev/mce_error_inject.c:17:10: error: implicit declaration of function 'get_paca' [-Werror=implicit-function-declaration]
17 | index = get_paca()->stab_rr;
| ^~~~~~~~
>> arch/powerpc/sysdev/mce_error_inject.c:17:20: error: invalid type argument of '->' (have 'int')
17 | index = get_paca()->stab_rr;
| ^~
>> arch/powerpc/sysdev/mce_error_inject.c:22:15: error: 'mmu_slb_size' undeclared (first use in this function)
22 | if (index < (mmu_slb_size - 1))
| ^~~~~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c:22:15: note: each undeclared identifier is reported only once for each function it appears in
>> arch/powerpc/sysdev/mce_error_inject.c:25:11: error: 'SLB_NUM_BOLTED' undeclared (first use in this function)
25 | index = SLB_NUM_BOLTED;
| ^~~~~~~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c:26:12: error: invalid type argument of '->' (have 'int')
26 | get_paca()->stab_rr = index;
| ^~
arch/powerpc/sysdev/mce_error_inject.c: In function 'mk_esid_data':
>> arch/powerpc/sysdev/mce_error_inject.c:31:15: error: 'MMU_SEGSIZE_256M' undeclared (first use in this function); did you mean 'MMU_PAGE_256M'?
31 | (((ssize) == MMU_SEGSIZE_256M) ? ESID_MASK : ESID_MASK_1T)
| ^~~~~~~~~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c:36:15: note: in expansion of macro 'slb_esid_mask'
36 | return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | slot;
| ^~~~~~~~~~~~~
>> arch/powerpc/sysdev/mce_error_inject.c:31:35: error: 'ESID_MASK' undeclared (first use in this function); did you mean 'NMI_MASK'?
31 | (((ssize) == MMU_SEGSIZE_256M) ? ESID_MASK : ESID_MASK_1T)
| ^~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c:36:15: note: in expansion of macro 'slb_esid_mask'
36 | return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | slot;
| ^~~~~~~~~~~~~
>> arch/powerpc/sysdev/mce_error_inject.c:31:47: error: 'ESID_MASK_1T' undeclared (first use in this function)
31 | (((ssize) == MMU_SEGSIZE_256M) ? ESID_MASK : ESID_MASK_1T)
| ^~~~~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c:36:15: note: in expansion of macro 'slb_esid_mask'
36 | return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | slot;
| ^~~~~~~~~~~~~
>> arch/powerpc/sysdev/mce_error_inject.c:36:39: error: 'SLB_ESID_V' undeclared (first use in this function)
36 | return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | slot;
| ^~~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c: In function 'mk_vsid_data':
>> arch/powerpc/sysdev/mce_error_inject.c:45:10: error: implicit declaration of function 'get_kernel_vsid' [-Werror=implicit-function-declaration]
45 | return (get_kernel_vsid(ea, ssize) << slb_vsid_shift(ssize)) | flags |
| ^~~~~~~~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c:40:14: error: 'MMU_SEGSIZE_256M' undeclared (first use in this function); did you mean 'MMU_PAGE_256M'?
40 | ((ssize) == MMU_SEGSIZE_256M ? SLB_VSID_SHIFT : SLB_VSID_SHIFT_1T)
| ^~~~~~~~~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c:45:40: note: in expansion of macro 'slb_vsid_shift'
45 | return (get_kernel_vsid(ea, ssize) << slb_vsid_shift(ssize)) | flags |
| ^~~~~~~~~~~~~~
>> arch/powerpc/sysdev/mce_error_inject.c:40:33: error: 'SLB_VSID_SHIFT' undeclared (first use in this function)
40 | ((ssize) == MMU_SEGSIZE_256M ? SLB_VSID_SHIFT : SLB_VSID_SHIFT_1T)
| ^~~~~~~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c:45:40: note: in expansion of macro 'slb_vsid_shift'
45 | return (get_kernel_vsid(ea, ssize) << slb_vsid_shift(ssize)) | flags |
| ^~~~~~~~~~~~~~
>> arch/powerpc/sysdev/mce_error_inject.c:40:50: error: 'SLB_VSID_SHIFT_1T' undeclared (first use in this function)
40 | ((ssize) == MMU_SEGSIZE_256M ? SLB_VSID_SHIFT : SLB_VSID_SHIFT_1T)
| ^~~~~~~~~~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c:45:40: note: in expansion of macro 'slb_vsid_shift'
45 | return (get_kernel_vsid(ea, ssize) << slb_vsid_shift(ssize)) | flags |
| ^~~~~~~~~~~~~~
>> arch/powerpc/sysdev/mce_error_inject.c:46:28: error: 'SLB_VSID_SSIZE_SHIFT' undeclared (first use in this function)
46 | ((unsigned long)ssize << SLB_VSID_SSIZE_SHIFT);
| ^~~~~~~~~~~~~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c: In function 'insert_slb_entry':
>> arch/powerpc/sysdev/mce_error_inject.c:54:10: error: 'SLB_VSID_KERNEL' undeclared (first use in this function)
54 | flags = SLB_VSID_KERNEL | mmu_psize_defs[MMU_PAGE_64K].sllp;
| ^~~~~~~~~~~~~~~
>> arch/powerpc/sysdev/mce_error_inject.c:54:28: error: 'mmu_psize_defs' undeclared (first use in this function)
54 | flags = SLB_VSID_KERNEL | mmu_psize_defs[MMU_PAGE_64K].sllp;
| ^~~~~~~~~~~~~~
>> arch/powerpc/sysdev/mce_error_inject.c:58:7: error: assignment to 'struct paca_struct *' from 'int' makes pointer from integer without a cast [-Werror=int-conversion]
58 | paca = get_paca();
| ^
>> arch/powerpc/sysdev/mce_error_inject.c:52:22: error: variable 'paca' set but not used [-Werror=unused-but-set-variable]
52 | struct paca_struct *paca;
| ^~~~
arch/powerpc/sysdev/mce_error_inject.c: In function 'inject_vmalloc_slb_multihit':
>> arch/powerpc/sysdev/mce_error_inject.c:83:22: error: 'MMU_SEGSIZE_1T' undeclared (first use in this function)
83 | insert_slb_entry(p, MMU_SEGSIZE_1T);
| ^~~~~~~~~~~~~~
arch/powerpc/sysdev/mce_error_inject.c: In function 'inject_kmalloc_slb_multihit':
arch/powerpc/sysdev/mce_error_inject.c:95:22: error: 'MMU_SEGSIZE_1T' undeclared (first use in this function)
95 | insert_slb_entry(p, MMU_SEGSIZE_1T);
| ^~~~~~~~~~~~~~
cc1: all warnings being treated as errors
# https://github.com/0day-ci/linux/commit/4ab1196e8e542fdf0e7cda8638dfb0e5771fd98e
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Ganesh-Goudar/powerpc-mce-Fix-mce-handler-and-add-selftest/20200917-092355
git checkout 4ab1196e8e542fdf0e7cda8638dfb0e5771fd98e
vim +/get_paca +17 arch/powerpc/sysdev/mce_error_inject.c
12
13 static inline unsigned long get_slb_index(void)
14 {
15 unsigned long index;
16
> 17 index = get_paca()->stab_rr;
18
19 /*
20 * simple round-robin replacement of slb starting at SLB_NUM_BOLTED.
21 */
> 22 if (index < (mmu_slb_size - 1))
23 index++;
24 else
> 25 index = SLB_NUM_BOLTED;
26 get_paca()->stab_rr = index;
27 return index;
28 }
29
30 #define slb_esid_mask(ssize) \
> 31 (((ssize) == MMU_SEGSIZE_256M) ? ESID_MASK : ESID_MASK_1T)
32
33 static inline unsigned long mk_esid_data(unsigned long ea, int ssize,
34 unsigned long slot)
35 {
> 36 return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | slot;
37 }
38
39 #define slb_vsid_shift(ssize) \
> 40 ((ssize) == MMU_SEGSIZE_256M ? SLB_VSID_SHIFT : SLB_VSID_SHIFT_1T)
41
42 static inline unsigned long mk_vsid_data(unsigned long ea, int ssize,
43 unsigned long flags)
44 {
> 45 return (get_kernel_vsid(ea, ssize) << slb_vsid_shift(ssize)) | flags |
> 46 ((unsigned long)ssize << SLB_VSID_SSIZE_SHIFT);
47 }
48
49 static void insert_slb_entry(char *p, int ssize)
50 {
51 unsigned long flags, entry;
> 52 struct paca_struct *paca;
53
> 54 flags = SLB_VSID_KERNEL | mmu_psize_defs[MMU_PAGE_64K].sllp;
55
56 preempt_disable();
57
> 58 paca = get_paca();
59
60 entry = get_slb_index();
61 asm volatile("slbmte %0,%1" :
62 : "r" (mk_vsid_data((unsigned long)p, ssize, flags)),
63 "r" (mk_esid_data((unsigned long)p, ssize, entry))
64 : "memory");
65
66 entry = get_slb_index();
67 asm volatile("slbmte %0,%1" :
68 : "r" (mk_vsid_data((unsigned long)p, ssize, flags)),
69 "r" (mk_esid_data((unsigned long)p, ssize, entry))
70 : "memory");
71 preempt_enable();
72 p[0] = '!';
73 }
74
75 static void inject_vmalloc_slb_multihit(void)
76 {
77 char *p;
78
79 p = vmalloc(2048);
80 if (!p)
81 return;
82
> 83 insert_slb_entry(p, MMU_SEGSIZE_1T);
84 vfree(p);
85 }
86
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 32054 bytes --]
^ permalink raw reply
* Re: [oss-drivers] [trivial PATCH] treewide: Convert switch/case fallthrough; to break;
From: Simon Horman @ 2020-09-17 8:03 UTC (permalink / raw)
To: Joe Perches
Cc: linux-wireless, linux-fbdev, oss-drivers, nouveau, alsa-devel,
dri-devel, linux-mips, linux-ide, dm-devel, linux-mtd, linux-i2c,
sparclinux, kvmarm, linux-rtc, linux-s390, linux-scsi, dccp,
linux-rdma, linux-atm-general, linux-afs, coreteam,
intel-wired-lan, linux-serial, linux-input, linux-mmc, Kees Cook,
linux-media, linux-pm, intel-gfx, linux-sctp, linux-mediatek,
linux-nvme, storagedev, ceph-devel, linux-arm-kernel, linux-nfs,
Jiri Kosina, linux-parisc, netdev, linux-usb, Nick Desaulniers,
LKML, iommu, netfilter-devel, linux-crypto, bpf, linuxppc-dev
In-Reply-To: <e6387578c75736d61b2fe70d9783d91329a97eb4.camel@perches.com>
On Wed, Sep 09, 2020 at 01:06:39PM -0700, Joe Perches wrote:
> fallthrough to a separate case/default label break; isn't very readable.
>
> Convert pseudo-keyword fallthrough; statements to a simple break; when
> the next label is case or default and the only statement in the next
> label block is break;
>
> Found using:
>
> $ grep-2.5.4 -rP --include=*.[ch] -n "fallthrough;(\s*(case\s+\w+|default)\s*:\s*){1,7}break;" *
>
> Miscellanea:
>
> o Move or coalesce a couple label blocks above a default: block.
>
> Signed-off-by: Joe Perches <joe@perches.com>
...
> diff --git a/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c b/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c
> index 252fe06f58aa..1d5b87079104 100644
> --- a/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c
> +++ b/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c
> @@ -345,7 +345,7 @@ static int matching_bar(struct nfp_bar *bar, u32 tgt, u32 act, u32 tok,
> baract = NFP_CPP_ACTION_RW;
> if (act == 0)
> act = NFP_CPP_ACTION_RW;
> - fallthrough;
> + break;
> case NFP_PCIE_BAR_PCIE2CPP_MapType_FIXED:
> break;
> default:
This is a cascading fall-through handling all map types.
I don't think this change improves readability.
...
^ permalink raw reply
* [powerpc:next-test] BUILD SUCCESS 10ea0d6512bcf308ed3d00b93571452448cea06c
From: kernel test robot @ 2020-09-17 7:40 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next-test
branch HEAD: 10ea0d6512bcf308ed3d00b93571452448cea06c powerpc/pseries: convert to use DEFINE_SEQ_ATTRIBUTE macro
elapsed time: 723m
configs tested: 172
configs skipped: 2
The following configs have been built successfully.
More configs may be tested in the coming days.
gcc tested configs:
arm defconfig
arm64 allyesconfig
arm64 defconfig
arm allyesconfig
arm allmodconfig
arm vt8500_v6_v7_defconfig
arm omap2plus_defconfig
arc haps_hs_smp_defconfig
sparc defconfig
m68k mvme16x_defconfig
sh espt_defconfig
mips omega2p_defconfig
arm lubbock_defconfig
arm spitz_defconfig
powerpc warp_defconfig
sh dreamcast_defconfig
m68k hp300_defconfig
powerpc mgcoge_defconfig
powerpc mpc832x_mds_defconfig
arm u300_defconfig
m68k allyesconfig
powerpc pcm030_defconfig
arm lart_defconfig
powerpc mvme5100_defconfig
powerpc sbc8548_defconfig
sparc sparc64_defconfig
arm milbeaut_m10v_defconfig
arm netwinder_defconfig
arm spear13xx_defconfig
um kunit_defconfig
arm ebsa110_defconfig
openrisc alldefconfig
arm tct_hammer_defconfig
openrisc simple_smp_defconfig
arm jornada720_defconfig
mips decstation_defconfig
mips malta_kvm_defconfig
sh sh7763rdp_defconfig
arm pcm027_defconfig
powerpc storcenter_defconfig
mips cobalt_defconfig
nds32 defconfig
mips bigsur_defconfig
sh sdk7780_defconfig
sh secureedge5410_defconfig
ia64 generic_defconfig
arm s3c2410_defconfig
arm efm32_defconfig
arm mxs_defconfig
arc hsdk_defconfig
arm u8500_defconfig
arm integrator_defconfig
powerpc sam440ep_defconfig
arm axm55xx_defconfig
arm at91_dt_defconfig
powerpc kilauea_defconfig
arm imote2_defconfig
parisc allyesconfig
mips rt305x_defconfig
powerpc mpc866_ads_defconfig
alpha alldefconfig
m68k apollo_defconfig
alpha defconfig
powerpc mpc836x_mds_defconfig
mips ip28_defconfig
sh urquell_defconfig
arm s3c6400_defconfig
mips maltasmvp_defconfig
arc axs103_smp_defconfig
powerpc lite5200b_defconfig
sh se7343_defconfig
powerpc mpc85xx_cds_defconfig
arm imx_v6_v7_defconfig
arc tb10x_defconfig
arm ezx_defconfig
arm multi_v5_defconfig
sh apsh4a3a_defconfig
powerpc eiger_defconfig
powerpc mpc7448_hpc2_defconfig
arm mainstone_defconfig
arm mini2440_defconfig
ia64 bigsur_defconfig
sh hp6xx_defconfig
powerpc64 alldefconfig
ia64 allmodconfig
ia64 defconfig
ia64 allyesconfig
m68k allmodconfig
m68k defconfig
nios2 defconfig
arc allyesconfig
nds32 allnoconfig
c6x allyesconfig
nios2 allyesconfig
csky defconfig
alpha allyesconfig
xtensa allyesconfig
h8300 allyesconfig
arc defconfig
sh allmodconfig
parisc defconfig
s390 allyesconfig
s390 defconfig
i386 allyesconfig
sparc allyesconfig
i386 defconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
x86_64 randconfig-a006-20200916
x86_64 randconfig-a004-20200916
x86_64 randconfig-a003-20200916
x86_64 randconfig-a002-20200916
x86_64 randconfig-a001-20200916
x86_64 randconfig-a005-20200916
i386 randconfig-a004-20200916
i386 randconfig-a006-20200916
i386 randconfig-a003-20200916
i386 randconfig-a001-20200916
i386 randconfig-a002-20200916
i386 randconfig-a005-20200916
i386 randconfig-a004-20200917
i386 randconfig-a006-20200917
i386 randconfig-a003-20200917
i386 randconfig-a001-20200917
i386 randconfig-a002-20200917
i386 randconfig-a005-20200917
x86_64 randconfig-a014-20200917
x86_64 randconfig-a011-20200917
x86_64 randconfig-a016-20200917
x86_64 randconfig-a012-20200917
x86_64 randconfig-a015-20200917
x86_64 randconfig-a013-20200917
i386 randconfig-a015-20200917
i386 randconfig-a014-20200917
i386 randconfig-a011-20200917
i386 randconfig-a013-20200917
i386 randconfig-a016-20200917
i386 randconfig-a012-20200917
i386 randconfig-a015-20200916
i386 randconfig-a014-20200916
i386 randconfig-a011-20200916
i386 randconfig-a013-20200916
i386 randconfig-a016-20200916
i386 randconfig-a012-20200916
riscv allyesconfig
riscv allnoconfig
riscv defconfig
riscv allmodconfig
riscv nommu_k210_defconfig
riscv nommu_virt_defconfig
riscv rv32_defconfig
x86_64 rhel
x86_64 allyesconfig
x86_64 rhel-7.6-kselftests
x86_64 defconfig
x86_64 rhel-8.3
x86_64 kexec
clang tested configs:
x86_64 randconfig-a006-20200917
x86_64 randconfig-a004-20200917
x86_64 randconfig-a003-20200917
x86_64 randconfig-a002-20200917
x86_64 randconfig-a001-20200917
x86_64 randconfig-a005-20200917
x86_64 randconfig-a014-20200916
x86_64 randconfig-a011-20200916
x86_64 randconfig-a016-20200916
x86_64 randconfig-a012-20200916
x86_64 randconfig-a015-20200916
x86_64 randconfig-a013-20200916
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox