* [PATCH] powerpc/boot: Fix build of dts/fsl
From: Michael Ellerman @ 2020-12-15 3:29 UTC (permalink / raw)
To: masahiroy; +Cc: linuxppc-dev
The lkp robot reported that some configs fail to build, for example
mpc85xx_smp_defconfig, with:
cc1: fatal error: opening output file arch/powerpc/boot/dts/fsl/.mpc8540ads.dtb.dts.tmp: No such file or directory
This bisects to:
cc8a51ca6f05 ("kbuild: always create directories of targets")
Although that commit claims to be about in-tree builds, it somehow
breaks out-of-tree builds. But presumably it's just exposing a latent
bug in our Makefiles.
We can fix it by adding to targets for dts/fsl in the same way that we
do for dts.
Fixes: cc8a51ca6f05 ("kbuild: always create directories of targets")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/boot/Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 68a7534454cd..c3e084cceaed 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -372,6 +372,8 @@ initrd-y := $(filter-out $(image-y), $(initrd-y))
targets += $(image-y) $(initrd-y)
targets += $(foreach x, dtbImage uImage cuImage simpleImage treeImage, \
$(patsubst $(x).%, dts/%.dtb, $(filter $(x).%, $(image-y))))
+targets += $(foreach x, dtbImage uImage cuImage simpleImage treeImage, \
+ $(patsubst $(x).%, dts/fsl/%.dtb, $(filter $(x).%, $(image-y))))
$(addprefix $(obj)/, $(initrd-y)): $(obj)/ramdisk.image.gz
--
2.25.1
^ permalink raw reply related
* Re: [PATCH] powerpc: Inline setup_kup()
From: Christophe Leroy @ 2020-12-15 5:41 UTC (permalink / raw)
To: Michael Ellerman, linuxppc-dev
In-Reply-To: <87czzbzvyg.fsf@mpe.ellerman.id.au>
Le 15/12/2020 à 02:42, Michael Ellerman a écrit :
> Christophe Leroy <christophe.leroy@csgroup.eu> writes:
>> Le 14/12/2020 à 13:30, Michael Ellerman a écrit :
>>> setup_kup() is used by both 64-bit and 32-bit code. However on 64-bit
>>> it must not be __init, because it's used for CPU hotplug, whereas on
>>> 32-bit it should be __init because it calls setup_kuap/kuep() which
>>> are __init.
>>>
>>> We worked around that problem in the past by marking it __ref, see
>>> commit 67d53f30e23e ("powerpc/mm: fix section mismatch for
>>> setup_kup()").
>>>
>>> Marking it __ref basically just omits it from section mismatch
>>> checking, which can lead to bugs, and in fact it did, see commit
>>> 44b4c4450f8d ("powerpc/64s: Mark the kuap/kuep functions non __init")
>>>
>>> We can avoid all these problems by just making it static inline.
>>> Because all it does is call other functions, making it inline actually
>>> shrinks the 32-bit vmlinux by ~76 bytes.
>>>
>>> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
>>> ---
>>> arch/powerpc/include/asm/kup.h | 8 ++++++--
>>> arch/powerpc/mm/init-common.c | 6 ------
>>> 2 files changed, 6 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/arch/powerpc/include/asm/kup.h b/arch/powerpc/include/asm/kup.h
>>> index 5a9820c54da9..46b12c6dc728 100644
>>> --- a/arch/powerpc/include/asm/kup.h
>>> +++ b/arch/powerpc/include/asm/kup.h
>>> @@ -49,8 +49,6 @@ extern bool disable_kuap;
>>>
>>> #include <linux/pgtable.h>
>>>
>>> -void setup_kup(void);
>>> -
>>> #ifdef CONFIG_PPC_KUEP
>>> void setup_kuep(bool disabled);
>>> #else
>>> @@ -85,6 +83,12 @@ static inline void restore_user_access(unsigned long flags) { }
>>> #endif /* CONFIG_PPC_BOOK3S_64 */
>>> #endif /* CONFIG_PPC_KUAP */
>>>
>>> +static inline void setup_kup(void)
>>
>> Should it be __always_inline ?
>
> Yes I guess so, will fix. Thanks for reviewing.
>
While we are talking about __always_inline, do you plan to take the following patch this cycle ?
https://patchwork.ozlabs.org/project/linuxppc-dev/patch/a1d31f84ddb0926813b17fcd5cc7f3fa7b4deac2.1602759123.git.christophe.leroy@csgroup.eu/
Christophe
^ permalink raw reply
* Re: [PATCH v3 2/5] powerpc/smp: Rename cpu_l1_cache_map as thread_group_l1_cache_map
From: Srikar Dronamraju @ 2020-12-15 8:42 UTC (permalink / raw)
To: Gautham R. Shenoy
Cc: Nathan Lynch, Michael Neuling, Vaidyanathan Srinivasan,
Peter Zijlstra, linux-kernel, Nicholas Piggin, linuxppc-dev,
Valentin Schneider
In-Reply-To: <1607596739-32439-3-git-send-email-ego@linux.vnet.ibm.com>
* Gautham R. Shenoy <ego@linux.vnet.ibm.com> [2020-12-10 16:08:56]:
> From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
>
> On platforms which have the "ibm,thread-groups" property, the per-cpu
> variable cpu_l1_cache_map keeps a track of which group of threads
> within the same core share the L1 cache, Instruction and Data flow.
>
> This patch renames the variable to "thread_group_l1_cache_map" to make
> it consistent with a subsequent patch which will introduce
> thread_group_l2_cache_map.
>
> This patch introduces no functional change.
>
Looks good to me.
Reviewed-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
> Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
--
Thanks and Regards
Srikar Dronamraju
^ permalink raw reply
* Re: [PATCH v3 3/5] powerpc/smp: Rename init_thread_group_l1_cache_map() to make it generic
From: Srikar Dronamraju @ 2020-12-15 8:43 UTC (permalink / raw)
To: Gautham R. Shenoy
Cc: Nathan Lynch, Michael Neuling, Vaidyanathan Srinivasan,
Peter Zijlstra, linux-kernel, Nicholas Piggin, linuxppc-dev,
Valentin Schneider
In-Reply-To: <1607596739-32439-4-git-send-email-ego@linux.vnet.ibm.com>
* Gautham R. Shenoy <ego@linux.vnet.ibm.com> [2020-12-10 16:08:57]:
> From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
>
> init_thread_group_l1_cache_map() initializes the per-cpu cpumask
> thread_group_l1_cache_map with the core-siblings which share L1 cache
> with the CPU. Make this function generic to the cache-property (L1 or
> L2) and update a suitable mask. This is a preparatory patch for the
> next patch where we will introduce discovery of thread-groups that
> share L2-cache.
>
> No functional change.
>
Looks good to me.
Reviewed-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
> Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
--
Thanks and Regards
Srikar Dronamraju
^ permalink raw reply
* Re: [PATCH v3 4/5] powerpc/smp: Add support detecting thread-groups sharing L2 cache
From: Srikar Dronamraju @ 2020-12-15 8:43 UTC (permalink / raw)
To: Gautham R. Shenoy
Cc: Nathan Lynch, Michael Neuling, Vaidyanathan Srinivasan,
Peter Zijlstra, linux-kernel, Nicholas Piggin, linuxppc-dev,
Valentin Schneider
In-Reply-To: <1607596739-32439-5-git-send-email-ego@linux.vnet.ibm.com>
* Gautham R. Shenoy <ego@linux.vnet.ibm.com> [2020-12-10 16:08:58]:
> From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
>
> On POWER systems, groups of threads within a core sharing the L2-cache
> can be indicated by the "ibm,thread-groups" property array with the
> identifier "2".
>
> This patch adds support for detecting this, and when present, populate
> the populating the cpu_l2_cache_mask of every CPU to the core-siblings
> which share L2 with the CPU as specified in the by the
> "ibm,thread-groups" property array.
>
> On a platform with the following "ibm,thread-group" configuration
> 00000001 00000002 00000004 00000000
> 00000002 00000004 00000006 00000001
> 00000003 00000005 00000007 00000002
> 00000002 00000004 00000000 00000002
> 00000004 00000006 00000001 00000003
> 00000005 00000007
>
Looks good to me.
Reviewed-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
--
Thanks and Regards
Srikar Dronamraju
^ permalink raw reply
* Re: [PATCH v3 5/5] powerpc/cacheinfo: Print correct cache-sibling map/list for L2 cache
From: Srikar Dronamraju @ 2020-12-15 8:44 UTC (permalink / raw)
To: Gautham R. Shenoy
Cc: Nathan Lynch, Michael Neuling, Vaidyanathan Srinivasan,
Peter Zijlstra, linux-kernel, Nicholas Piggin, linuxppc-dev,
Valentin Schneider
In-Reply-To: <1607596739-32439-6-git-send-email-ego@linux.vnet.ibm.com>
* Gautham R. Shenoy <ego@linux.vnet.ibm.com> [2020-12-10 16:08:59]:
> From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
>
> On POWER platforms where only some groups of threads within a core
> share the L2-cache (indicated by the ibm,thread-groups device-tree
> property), we currently print the incorrect shared_cpu_map/list for
> L2-cache in the sysfs.
>
> This patch reports the correct shared_cpu_map/list on such platforms.
>
> Example:
> On a platform with "ibm,thread-groups" set to
> 00000001 00000002 00000004 00000000
> 00000002 00000004 00000006 00000001
> 00000003 00000005 00000007 00000002
> 00000002 00000004 00000000 00000002
> 00000004 00000006 00000001 00000003
> 00000005 00000007
>
Looks good to me.
Reviewed-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
--
Thanks and Regards
Srikar Dronamraju
^ permalink raw reply
* Re: [PATCH v3 1/5] powerpc/smp: Parse ibm,thread-groups with multiple properties
From: Srikar Dronamraju @ 2020-12-15 8:42 UTC (permalink / raw)
To: Gautham R. Shenoy
Cc: Nathan Lynch, Michael Neuling, Vaidyanathan Srinivasan,
Peter Zijlstra, linux-kernel, Nicholas Piggin, linuxppc-dev,
Valentin Schneider
In-Reply-To: <1607596739-32439-2-git-send-email-ego@linux.vnet.ibm.com>
* Gautham R. Shenoy <ego@linux.vnet.ibm.com> [2020-12-10 16:08:55]:
> From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
>
> The "ibm,thread-groups" device-tree property is an array that is used
> to indicate if groups of threads within a core share certain
> properties. It provides details of which property is being shared by
> which groups of threads. This array can encode information about
> multiple properties being shared by different thread-groups within the
> core.
>
Looks good to me.
Reviewed-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
--
Thanks and Regards
Srikar Dronamraju
^ permalink raw reply
* [PATCH V3] powerpc/perf: Fix Threshold Event Counter Multiplier width for P10
From: Athira Rajeev @ 2020-12-15 8:56 UTC (permalink / raw)
To: mpe; +Cc: maddy, linuxppc-dev
From: Madhavan Srinivasan <maddy@linux.ibm.com>
Threshold Event Counter Multiplier (TECM) is part of Monitor Mode
Control Register A (MMCRA). This field along with Threshold Event
Counter Exponent (TECE) is used to get threshould counter value.
In Power10, this is a 8bit field, so patch fixes the
current code to modify the MMCRA[TECM] extraction macro to
handle this change. ISA v3.1 says this is a 7 bit field but
POWER10 it's actually 8 bits which will hopefully be fixed
in ISA v3.1 update.
Fixes: 170a315f41c64 ('powerpc/perf: Support to export MMCRA[TEC*] field to userspace')
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
---
Changelog v2 -> v3:
- Since in POWER10 it's actually 8 bits which will hopefully be
fixed in ISA3.1 update, bring back the cpu feature check which
is the appropriate one.
Changelog v1 -> v2:
- Fixed the commit message
- Fixed the condition check to use PVR check for power10
instead of ISA v3.1 cpu feature check.
arch/powerpc/perf/isa207-common.c | 3 +++
arch/powerpc/perf/isa207-common.h | 4 ++++
2 files changed, 7 insertions(+)
diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c
index 24f0a90..6ab5b27 100644
--- a/arch/powerpc/perf/isa207-common.c
+++ b/arch/powerpc/perf/isa207-common.c
@@ -247,6 +247,9 @@ void isa207_get_mem_weight(u64 *weight)
u64 sier = mfspr(SPRN_SIER);
u64 val = (sier & ISA207_SIER_TYPE_MASK) >> ISA207_SIER_TYPE_SHIFT;
+ if (cpu_has_feature(CPU_FTR_ARCH_31))
+ mantissa = P10_MMCRA_THR_CTR_MANT(mmcra);
+
if (val == 0 || val == 7)
*weight = 0;
else
diff --git a/arch/powerpc/perf/isa207-common.h b/arch/powerpc/perf/isa207-common.h
index 4208764..454b32c 100644
--- a/arch/powerpc/perf/isa207-common.h
+++ b/arch/powerpc/perf/isa207-common.h
@@ -231,6 +231,10 @@
#define MMCRA_THR_CTR_EXP(v) (((v) >> MMCRA_THR_CTR_EXP_SHIFT) &\
MMCRA_THR_CTR_EXP_MASK)
+#define P10_MMCRA_THR_CTR_MANT_MASK 0xFFul
+#define P10_MMCRA_THR_CTR_MANT(v) (((v) >> MMCRA_THR_CTR_MANT_SHIFT) &\
+ P10_MMCRA_THR_CTR_MANT_MASK)
+
/* MMCRA Threshold Compare bit constant for power9 */
#define p9_MMCRA_THR_CMP_SHIFT 45
--
1.8.3.1
^ permalink raw reply related
* Re: [PATCH] powerpc: Inline setup_kup()
From: Michael Ellerman @ 2020-12-15 10:20 UTC (permalink / raw)
To: Christophe Leroy, linuxppc-dev
In-Reply-To: <1ff11fdc-3274-5be3-6968-14084874e212@csgroup.eu>
Christophe Leroy <christophe.leroy@csgroup.eu> writes:
> Le 15/12/2020 à 02:42, Michael Ellerman a écrit :
>> Christophe Leroy <christophe.leroy@csgroup.eu> writes:
>>> Le 14/12/2020 à 13:30, Michael Ellerman a écrit :
>>>> setup_kup() is used by both 64-bit and 32-bit code. However on 64-bit
>>>> it must not be __init, because it's used for CPU hotplug, whereas on
>>>> 32-bit it should be __init because it calls setup_kuap/kuep() which
>>>> are __init.
>>>>
>>>> We worked around that problem in the past by marking it __ref, see
>>>> commit 67d53f30e23e ("powerpc/mm: fix section mismatch for
>>>> setup_kup()").
>>>>
>>>> Marking it __ref basically just omits it from section mismatch
>>>> checking, which can lead to bugs, and in fact it did, see commit
>>>> 44b4c4450f8d ("powerpc/64s: Mark the kuap/kuep functions non __init")
>>>>
>>>> We can avoid all these problems by just making it static inline.
>>>> Because all it does is call other functions, making it inline actually
>>>> shrinks the 32-bit vmlinux by ~76 bytes.
>>>>
>>>> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
>>>> ---
>>>> arch/powerpc/include/asm/kup.h | 8 ++++++--
>>>> arch/powerpc/mm/init-common.c | 6 ------
>>>> 2 files changed, 6 insertions(+), 8 deletions(-)
>>>>
>>>> diff --git a/arch/powerpc/include/asm/kup.h b/arch/powerpc/include/asm/kup.h
>>>> index 5a9820c54da9..46b12c6dc728 100644
>>>> --- a/arch/powerpc/include/asm/kup.h
>>>> +++ b/arch/powerpc/include/asm/kup.h
>>>> @@ -49,8 +49,6 @@ extern bool disable_kuap;
>>>>
>>>> #include <linux/pgtable.h>
>>>>
>>>> -void setup_kup(void);
>>>> -
>>>> #ifdef CONFIG_PPC_KUEP
>>>> void setup_kuep(bool disabled);
>>>> #else
>>>> @@ -85,6 +83,12 @@ static inline void restore_user_access(unsigned long flags) { }
>>>> #endif /* CONFIG_PPC_BOOK3S_64 */
>>>> #endif /* CONFIG_PPC_KUAP */
>>>>
>>>> +static inline void setup_kup(void)
>>>
>>> Should it be __always_inline ?
>>
>> Yes I guess so, will fix. Thanks for reviewing.
>>
>
> While we are talking about __always_inline, do you plan to take the following patch this cycle ?
>
> https://patchwork.ozlabs.org/project/linuxppc-dev/patch/a1d31f84ddb0926813b17fcd5cc7f3fa7b4deac2.1602759123.git.christophe.leroy@csgroup.eu/
I intended to, will grab it now.
cheers
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/64s: Trim offlined CPUs from mm_cpumasks
From: Michael Ellerman @ 2020-12-15 10:33 UTC (permalink / raw)
To: Nicholas Piggin, Geert Uytterhoeven
Cc: Peter Zijlstra, Aneesh Kumar K.V, Linux Kernel Mailing List,
Anton Vorontsov, Thomas Gleixner, linuxppc-dev
In-Reply-To: <1607943765.29hccd2b8p.astroid@bobo.none>
Nicholas Piggin <npiggin@gmail.com> writes:
> Excerpts from Michael Ellerman's message of December 14, 2020 8:43 pm:
>> Nicholas Piggin <npiggin@gmail.com> writes:
>>> Excerpts from Geert Uytterhoeven's message of December 10, 2020 7:06 pm:
>>>> Hi Nicholas,
>>>>
>>>> On Fri, Nov 20, 2020 at 4:01 AM Nicholas Piggin <npiggin@gmail.com> wrote:
>>>>>
>>>>> When offlining a CPU, powerpc/64s does not flush TLBs, rather it just
>>>>> leaves the CPU set in mm_cpumasks, so it continues to receive TLBIEs
>>>>> to manage its TLBs.
>>>>>
>>>>> However the exit_flush_lazy_tlbs() function expects that after
>>>>> returning, all CPUs (except self) have flushed TLBs for that mm, in
>>>>> which case TLBIEL can be used for this flush. This breaks for offline
>>>>> CPUs because they don't get the IPI to flush their TLB. This can lead
>>>>> to stale translations.
>>>>>
>>>>> Fix this by clearing the CPU from mm_cpumasks, then flushing all TLBs
>>>>> before going offline.
>>>>>
>>>>> These offlined CPU bits stuck in the cpumask also prevents the cpumask
>>>>> from being trimmed back to local mode, which means continual broadcast
>>>>> IPIs or TLBIEs are needed for TLB flushing. This patch prevents that
>>>>> situation too.
>>>>>
>>>>> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
>>>>
>>>> Thanks for your patch!
>>>>
>>>>> --- a/arch/powerpc/platforms/powermac/smp.c
>>>>> +++ b/arch/powerpc/platforms/powermac/smp.c
>>>>> @@ -911,6 +911,8 @@ static int smp_core99_cpu_disable(void)
>>>>>
>>>>> mpic_cpu_set_priority(0xf);
>>>>>
>>>>> + cleanup_cpu_mmu_context();
>>>>> +
>>>>
>>>> I guess this change broke pmac32_defconfig+SMP in v5.10-rc7?
>>>>
>>>> arch/powerpc/platforms/powermac/smp.c: error: implicit
>>>> declaration of function 'cleanup_cpu_mmu_context'
>>>> [-Werror=implicit-function-declaration]: => 914:2
>>>>
>>>> http://kisskb.ellerman.id.au/kisskb/buildresult/14423174/
>>>
>>> Hey, yeah it does thanks for catching it. This patch fixes it for me
>>>
>>> ---
>>> From a9b5ec92ffac975e81c6d7db6ff2b1486b2723f7 Mon Sep 17 00:00:00 2001
>>> From: Nicholas Piggin <npiggin@gmail.com>
>>> Date: Mon, 14 Dec 2020 13:52:39 +1000
>>> Subject: [PATCH] powerpc/32s: Fix cleanup_cpu_mmu_context() compile bug
>>>
>>> 32s has no tlbiel_all() defined, so just disable the cleanup with a
>>> comment.
>>
>> Or what about just:
>
> That works, I kind of wanted it in there explicit that we don't
> clean up on 32s. I don't mind if you prefer this though.
OK. I'll merge my version because I can do that without needing to merge
master in order to get the broken commit into my tree.
cheers
^ permalink raw reply
* Re: [PATCH v2] powerpc/book3s/kup: Mark the kuap/keup function non __init
From: Michael Ellerman @ 2020-12-15 10:48 UTC (permalink / raw)
To: mpe, linuxppc-dev, Aneesh Kumar K.V
In-Reply-To: <20201214080121.358567-1-aneesh.kumar@linux.ibm.com>
On Mon, 14 Dec 2020 13:31:21 +0530, Aneesh Kumar K.V wrote:
> The kernel call these functions on cpu online and hence they should
> not be marked __init.
Applied to powerpc/next.
[1/1] powerpc/64s: Mark the kuap/kuep functions non __init
https://git.kernel.org/powerpc/c/44b4c4450f8d31296ba633d74be753a85fd627bd
cheers
^ permalink raw reply
* Re: [PATCH V2] powerpc/perf: Exclude kernel samples while counting events in user space.
From: Michael Ellerman @ 2020-12-15 10:48 UTC (permalink / raw)
To: Athira Rajeev, mpe; +Cc: maddy, linuxppc-dev
In-Reply-To: <1606289215-1433-1-git-send-email-atrajeev@linux.vnet.ibm.com>
On Wed, 25 Nov 2020 02:26:55 -0500, Athira Rajeev wrote:
> Perf event attritube supports exclude_kernel flag
> to avoid sampling/profiling in supervisor state (kernel).
> Based on this event attr flag, Monitor Mode Control Register
> bit is set to freeze on supervisor state. But sometime (due
> to hardware limitation), Sampled Instruction Address
> Register (SIAR) locks on to kernel address even when
> freeze on supervisor is set. Patch here adds a check to
> drop those samples.
Applied to powerpc/next.
[1/1] powerpc/perf: Exclude kernel samples while counting events in user space.
https://git.kernel.org/powerpc/c/aa8e21c053d72b6639ea5a7f1d3a1d0209534c94
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/32s: Handle PROTFAULT in hash_page() also for CONFIG_PPC_KUAP
From: Michael Ellerman @ 2020-12-15 10:48 UTC (permalink / raw)
To: Christophe Leroy, Benjamin Herrenschmidt, Paul Mackerras,
Michael Ellerman
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <8a4ffe4798e9ea32aaaccdf85e411bb1beed3500.1605542955.git.christophe.leroy@csgroup.eu>
On Mon, 16 Nov 2020 16:09:31 +0000 (UTC), Christophe Leroy wrote:
> On hash 32 bits, handling minor protection faults like unsetting
> dirty flag is heavy if done from the normal page_fault processing,
> because it implies hash table software lookup for flushing the entry
> and then a DSI is taken anyway to add the entry back.
>
> When KUAP was implemented, as explained in commit a68c31fc01ef
> ("powerpc/32s: Implement Kernel Userspace Access Protection"),
> protection faults has been diverted from hash_page() because
> hash_page() was not able to identify a KUAP fault.
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/32s: Handle PROTFAULT in hash_page() also for CONFIG_PPC_KUAP
https://git.kernel.org/powerpc/c/1b03e71ff6f2bd10b45a0128ce76e0e42014a44c
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/8xx: Fix early debug when SMC1 is relocated
From: Michael Ellerman @ 2020-12-15 10:48 UTC (permalink / raw)
To: Christophe Leroy, Benjamin Herrenschmidt, Paul Mackerras,
Michael Ellerman
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <b2f71f39eca543f1e4ec06596f09a8b12235c701.1607076683.git.christophe.leroy@csgroup.eu>
On Fri, 4 Dec 2020 10:11:34 +0000 (UTC), Christophe Leroy wrote:
> When SMC1 is relocated and early debug is selected, the
> board hangs is ppc_md.setup_arch(). This is because ones
> the microcode has been loaded and SMC1 relocated, early
> debug writes in the weed.
>
> To allow smooth continuation, the SMC1 parameter RAM set up
> by the bootloader have to be copied into the new location.
Applied to powerpc/next.
[1/1] powerpc/8xx: Fix early debug when SMC1 is relocated
https://git.kernel.org/powerpc/c/1e78f723d6a52966bfe3804209dbf404fdc9d3bb
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/mm: Refactor the floor/ceiling check in hugetlb range freeing functions
From: Michael Ellerman @ 2020-12-15 10:48 UTC (permalink / raw)
To: Christophe Leroy, Benjamin Herrenschmidt, Paul Mackerras,
Michael Ellerman
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <16a571bb32eb6e8cd44bda484c8d81cd8a25e6d7.1604668827.git.christophe.leroy@csgroup.eu>
On Fri, 6 Nov 2020 13:20:54 +0000 (UTC), Christophe Leroy wrote:
> All hugetlb range freeing functions have a verification like the following,
> which only differs by the mask used, depending on the page table level.
>
> start &= MASK;
> if (start < floor)
> return;
> if (ceiling) {
> ceiling &= MASK;
> if (! ceiling)
> return;
> }
> if (end - 1 > ceiling - 1)
> return;
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/mm: Refactor the floor/ceiling check in hugetlb range freeing functions
https://git.kernel.org/powerpc/c/7bfe54b5f16561bb703de6482f880614ada8dbf2
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/process: Remove target specific __set_dabr()
From: Michael Ellerman @ 2020-12-15 10:48 UTC (permalink / raw)
To: Christophe Leroy, Benjamin Herrenschmidt, Paul Mackerras,
Michael Ellerman
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <c10b263668e137236c71d76648b03cf2cd1ee66f.1607076733.git.christophe.leroy@csgroup.eu>
On Fri, 4 Dec 2020 10:12:51 +0000 (UTC), Christophe Leroy wrote:
> __set_dabr() are simple functions that can be inline directly
> inside set_dabr() and using IS_ENABLED() instead of #ifdef
Applied to powerpc/next.
[1/1] powerpc/process: Remove target specific __set_dabr()
https://git.kernel.org/powerpc/c/ad3ed15cd04b96de7c38204ba7c698cbccd8fe88
cheers
^ permalink raw reply
* Re: [PATCH v1 1/3] powerpc/32s: Remove unused counters incremented by create_hpte()
From: Michael Ellerman @ 2020-12-15 10:48 UTC (permalink / raw)
To: Christophe Leroy, Benjamin Herrenschmidt, Paul Mackerras,
Michael Ellerman
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <6470ab99e58c84a5445af43ce4d1d772b0dc3e93.1606247495.git.christophe.leroy@csgroup.eu>
On Tue, 24 Nov 2020 19:51:55 +0000 (UTC), Christophe Leroy wrote:
> primary_pteg_full and htab_hash_searches are not used.
>
> Remove them.
Applied to powerpc/next.
[1/3] powerpc/32s: Remove unused counters incremented by create_hpte()
https://git.kernel.org/powerpc/c/c5ccb4e78968fbe64f938a5a012fc8ec25cafabf
[2/3] powerpc/32s: In add_hash_page(), calculate VSID later
https://git.kernel.org/powerpc/c/fec6166b44ded68e68144144a02e498580118f1a
[3/3] powerpc/32s: Cleanup around PTE_FLAGS_OFFSET in hash_low.S
https://git.kernel.org/powerpc/c/da481c4fe0e485cdab5cf4d2761be8b8fb38d3d1
cheers
^ permalink raw reply
* Re: [PATCH v1 1/6] powerpc/8xx: DEBUG_PAGEALLOC doesn't require an ITLB miss exception handler
From: Michael Ellerman @ 2020-12-15 10:48 UTC (permalink / raw)
To: Christophe Leroy, Benjamin Herrenschmidt, Paul Mackerras,
Michael Ellerman
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <e796c5fcb5898de827c803cf1ab8ba1d7a5d4b76.1606231483.git.christophe.leroy@csgroup.eu>
On Tue, 24 Nov 2020 15:24:54 +0000 (UTC), Christophe Leroy wrote:
> Since commit e611939fc8ec ("powerpc/mm: Ensure change_page_attr()
> doesn't invalidate pinned TLBs"), pinned TLBs are not anymore
> invalidated by __kernel_map_pages() when CONFIG_DEBUG_PAGEALLOC is
> selected.
>
> Remove the dependency on CONFIG_DEBUG_PAGEALLOC.
Applied to powerpc/next.
[1/6] powerpc/8xx: DEBUG_PAGEALLOC doesn't require an ITLB miss exception handler
https://git.kernel.org/powerpc/c/613df979da6c032cbe6fa273fb8ca21af022157e
[2/6] powerpc/8xx: Always pin kernel text TLB
https://git.kernel.org/powerpc/c/bccc58986a2f98e3af349c85c5f49aac7fb19ef2
[3/6] powerpc/8xx: Simplify INVALIDATE_ADJACENT_PAGES_CPU15
https://git.kernel.org/powerpc/c/576e02bbf1062b9118d5bbb96a40ed3b6b359f22
[4/6] powerpc/8xx: Use SPRN_SPRG_SCRATCH2 in ITLB miss exception
https://git.kernel.org/powerpc/c/a314ea5abf6dbaf35f14c9bd1d93105260fb9336
[5/6] powerpc/8xx: Use SPRN_SPRG_SCRATCH2 in DTLB miss exception
https://git.kernel.org/powerpc/c/89eecd938cab80f0da18abbd2ed997a521f83f01
[6/6] powerpc/ppc-opcode: Add PPC_RAW_MFSPR()
https://git.kernel.org/powerpc/c/70b588a068668dd7a92ed19cf0373ba92847957c
cheers
^ permalink raw reply
* Re: [PATCH v2] powerpc/powermac: Fix low_sleep_handler with CONFIG_VMAP_STACK
From: Michael Ellerman @ 2020-12-15 10:48 UTC (permalink / raw)
To: Paul Mackerras, Christophe Leroy, Benjamin Herrenschmidt,
giuseppe, Michael Ellerman
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <e3e0d8042a3ba75cb4a9546c19c408b5b5b28994.1607404931.git.christophe.leroy@csgroup.eu>
On Tue, 8 Dec 2020 05:24:19 +0000 (UTC), Christophe Leroy wrote:
> low_sleep_handler() can't restore the context from standard
> stack because the stack can hardly be accessed with MMU OFF.
>
> Store everything in a global storage area instead of storing
> a pointer to the stack in that global storage area.
>
> To avoid a complete churn of the function, still use r1 as
> the pointer to the storage area during restore.
Applied to powerpc/next.
[1/1] powerpc/powermac: Fix low_sleep_handler with CONFIG_VMAP_STACK
https://git.kernel.org/powerpc/c/db972a3787d12b1ce9ba7a31ec376d8a79e04c47
cheers
^ permalink raw reply
* Re: [PATCH v2 00/13] powerpc/xive: misc cleanups
From: Michael Ellerman @ 2020-12-15 10:48 UTC (permalink / raw)
To: Cédric Le Goater, linuxppc-dev; +Cc: Greg Kurz
In-Reply-To: <20201210171450.1933725-1-clg@kaod.org>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 2032 bytes --]
On Thu, 10 Dec 2020 18:14:37 +0100, Cédric Le Goater wrote:
> The most important change is the removal of support of OPAL flags
> required for P9 DD1. It provides a good cleanup of some complex
> routines.
>
> Thanks,
>
> C.
>
> [...]
Patches 1-3 and 5-13 applied to powerpc/next.
[01/13] KVM: PPC: Book3S HV: XIVE: Show detailed configuration in debug output
https://git.kernel.org/powerpc/c/98983675008ab3ae9b37fc7a4bfa083998079215
[02/13] powerpc/xive: Rename XIVE_IRQ_NO_EOI to show its a flag
https://git.kernel.org/powerpc/c/4f1c3f7b08187e6b97701c7fb2dc6f3749566c62
[03/13] powerpc/xive: Introduce XIVE_IPI_HW_IRQ
https://git.kernel.org/powerpc/c/e2cf43d59525477cfd030378c3c808187952c531
[05/13] powerpc/xive: Add a name to the IRQ domain
https://git.kernel.org/powerpc/c/9dfe4b14df93532da3dbf11952a17389ae3cdc67
[06/13] powerpc/xive: Add a debug_show handler to the XIVE irq_domain
https://git.kernel.org/powerpc/c/a5021abc48a0f44083a15a37b3e61378519cb00d
[07/13] powerpc: Increase NR_IRQS range to support more KVM guests
https://git.kernel.org/powerpc/c/7b3b3de3b04ecb7393cdfaa30a3468dd47b750cf
[08/13] powerpc/xive: Remove P9 DD1 flag XIVE_IRQ_FLAG_SHIFT_BUG
https://git.kernel.org/powerpc/c/4cc0e36df2c0a41fd38645ddde08d2bfba699b7a
[09/13] powerpc/xive: Remove P9 DD1 flag XIVE_IRQ_FLAG_MASK_FW
https://git.kernel.org/powerpc/c/b5277d18c65e31ce51f6733ebdca3985a962fab5
[10/13] powerpc/xive: Remove P9 DD1 flag XIVE_IRQ_FLAG_EOI_FW
https://git.kernel.org/powerpc/c/cf58b746665d0177b86d42d18e60985fa1fdb909
[11/13] powerpc/xive: Simplify xive_do_source_eoi()
https://git.kernel.org/powerpc/c/614546d56296380b59e94484813eeef62a7d2b6b
[12/13] powerpc/xive: Improve error reporting of OPAL calls
https://git.kernel.org/powerpc/c/07efbca11c1a985efa4d15bd76a637c6bffc253b
[13/13] KVM: PPC: Book3S HV: XIVE: Add a comment regarding VP numbering
https://git.kernel.org/powerpc/c/dddc4ef92d1ce92987da1d6926cdfa99e8acb622
cheers
^ permalink raw reply
* Re: [PATCH] powerpc: fix spelling mistake in Kconfig "seleted" -> "selected"
From: Michael Ellerman @ 2020-12-15 10:49 UTC (permalink / raw)
To: Colin King, Paul Mackerras, linuxppc-dev, Benjamin Herrenschmidt,
Michael Ellerman
Cc: kernel-janitors, linux-kernel
In-Reply-To: <20201207155420.172370-1-colin.king@canonical.com>
On Mon, 7 Dec 2020 15:54:20 +0000, Colin King wrote:
> There is a spelling mistake in the help text of the Kconfig. Fix it.
Applied to powerpc/next.
[1/1] powerpc: fix spelling mistake in Kconfig "seleted" -> "selected"
https://git.kernel.org/powerpc/c/f8a4b277c3cf39ec8efe50114924a7743cc84800
cheers
^ permalink raw reply
* Re: [PATCH v3 0/5] Extend Parsing "ibm, thread-groups" for Shared-L2 information
From: Michael Ellerman @ 2020-12-15 10:49 UTC (permalink / raw)
To: Srikar Dronamraju, Gautham R. Shenoy, Michael Neuling,
Peter Zijlstra, Valentin Schneider, Nicholas Piggin,
Michael Ellerman, Nathan Lynch, Vaidyanathan Srinivasan,
Anton Blanchard
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <1607596739-32439-1-git-send-email-ego@linux.vnet.ibm.com>
On Thu, 10 Dec 2020 16:08:54 +0530, Gautham R. Shenoy wrote:
> This is the v2 of the patchset to extend parsing of "ibm,thread-groups" property
> to discover the Shared-L2 cache information.
>
> The previous versions can be found here :
>
> v2 : https://lore.kernel.org/linuxppc-dev/1607533700-5546-1-git-send-email-ego@linux.vnet.ibm.com/T/#m043ea15d3832658527fca94765202b9cbefd330d
>
> [...]
Applied to powerpc/next.
[1/5] powerpc/smp: Parse ibm,thread-groups with multiple properties
https://git.kernel.org/powerpc/c/790a1662d3a26fe9fa5f691386d8fde6bb8b0dc2
[2/5] powerpc/smp: Rename cpu_l1_cache_map as thread_group_l1_cache_map
https://git.kernel.org/powerpc/c/1fdc1d6632ff3f6813a2f15b65586bde8fe0f0ba
[3/5] powerpc/smp: Rename init_thread_group_l1_cache_map() to make it generic
https://git.kernel.org/powerpc/c/fbd2b672e91d276b9fa5a729e4a823ba29fa2692
[4/5] powerpc/smp: Add support detecting thread-groups sharing L2 cache
https://git.kernel.org/powerpc/c/9538abee18cca70ffd03cef56027388b0c5084cc
[5/5] powerpc/cacheinfo: Print correct cache-sibling map/list for L2 cache
https://git.kernel.org/powerpc/c/0be47634db0baa9e91c7e635e7e73355d6a5cf43
cheers
^ permalink raw reply
* Re: [PATCH v2 00/28] partition suspend updates
From: Michael Ellerman @ 2020-12-15 10:49 UTC (permalink / raw)
To: linuxppc-dev, Nathan Lynch; +Cc: tyreld, ajd, mmc, cforno12, drt, brking
In-Reply-To: <20201207215200.1785968-1-nathanl@linux.ibm.com>
On Mon, 7 Dec 2020 15:51:32 -0600, Nathan Lynch wrote:
> This series aims to improve the pseries-specific partition migration
> and hibernation implementation, part of which has been living in
> kernel/rtas.c. Most of that code is eliminated or moved to
> platforms/pseries, and the following major functional changes are
> made:
>
> - Use stop_machine() instead of on_each_cpu() to avoid deadlock in the
> join/suspend sequence.
>
> [...]
Applied to powerpc/next.
[01/28] powerpc/rtas: prevent suspend-related sys_rtas use on LE
https://git.kernel.org/powerpc/c/de0f7349a0dd072e54b5fc04c305907b22d28a5f
[02/28] powerpc/rtas: complete ibm,suspend-me status codes
https://git.kernel.org/powerpc/c/970e453ea4ecdd7a16a46c229294547148d1c7b6
[03/28] powerpc/rtas: rtas_ibm_suspend_me -> rtas_ibm_suspend_me_unsafe
https://git.kernel.org/powerpc/c/7049b288ea8c95f270ec8fe643e3c3187938d5af
[04/28] powerpc/rtas: add rtas_ibm_suspend_me()
https://git.kernel.org/powerpc/c/701ba68342412ae9be99a7c7f3badebf95271403
[05/28] powerpc/rtas: add rtas_activate_firmware()
https://git.kernel.org/powerpc/c/5f485a66f4d0693a535e4ab38ffc3538716d2c2b
[06/28] powerpc/hvcall: add token and codes for H_VASI_SIGNAL
https://git.kernel.org/powerpc/c/9bae89f528c041f3117f0a6c21878dda5a55af60
[07/28] powerpc/pseries/mobility: don't error on absence of ibm, update-nodes
https://git.kernel.org/powerpc/c/b06a6717873560e9dd1c07357781fc2b27545701
[08/28] powerpc/pseries/mobility: add missing break to default case
https://git.kernel.org/powerpc/c/aa5e5c9b556a2e5f68a915e4b5dfa5c6bda47c64
[09/28] powerpc/pseries/mobility: error message improvements
https://git.kernel.org/powerpc/c/2d5be6f16c4ba5c27d06704976daf55f3236a236
[10/28] powerpc/pseries/mobility: use rtas_activate_firmware() on resume
https://git.kernel.org/powerpc/c/c3ae9781d5a64093f161e6cc5dfefb0773106ca9
[11/28] powerpc/pseries/mobility: extract VASI session polling logic
https://git.kernel.org/powerpc/c/d9213319b84ee8393475c38361c84151d5c33415
[12/28] powerpc/pseries/mobility: use stop_machine for join/suspend
https://git.kernel.org/powerpc/c/9327dc0aeef36a3cbb9d94f79b79cc4f91ff8a41
[13/28] powerpc/pseries/mobility: signal suspend cancellation to platform
https://git.kernel.org/powerpc/c/37cddc7d6cf4568a7fb69aeff6f26e4c8a3bc0f7
[14/28] powerpc/pseries/mobility: retry partition suspend after error
https://git.kernel.org/powerpc/c/aeca35b9a52b0e0d019a5244fbaab699f753b443
[15/28] powerpc/rtas: dispatch partition migration requests to pseries
https://git.kernel.org/powerpc/c/4d756894ba75f1afe7945ccafe9afebff50484b6
[16/28] powerpc/rtas: remove rtas_ibm_suspend_me_unsafe()
https://git.kernel.org/powerpc/c/5f6665e400569de479733677e77862542aebb6cc
[17/28] powerpc/pseries/hibernation: drop pseries_suspend_begin() from suspend ops
https://git.kernel.org/powerpc/c/52719fce3f4c7a8ac9eaa191e8d75a697f9fbcbc
[18/28] powerpc/pseries/hibernation: pass stream id via function arguments
https://git.kernel.org/powerpc/c/a10a5a17f4ac4f84fcc26162d43b53e2a4e1009a
[19/28] powerpc/pseries/hibernation: remove pseries_suspend_cpu()
https://git.kernel.org/powerpc/c/ed22bb8d39fa7f3980afc6e16d2a891847367d33
[20/28] powerpc/machdep: remove suspend_disable_cpu()
https://git.kernel.org/powerpc/c/796f9247b4fa9bec320d6b47ffde2ecf86cc71c0
[21/28] powerpc/rtas: remove rtas_suspend_cpu()
https://git.kernel.org/powerpc/c/395b2c090907975c627902ba8fda0bdb04c7cad3
[22/28] powerpc/pseries/hibernation: switch to rtas_ibm_suspend_me()
https://git.kernel.org/powerpc/c/366fb13bf13b029c4d43bf19382f7aea69bfa4b7
[23/28] powerpc/rtas: remove unused rtas_suspend_last_cpu()
https://git.kernel.org/powerpc/c/1b2488176ea56e299d2b084772daeb5ecbfc16d1
[24/28] powerpc/pseries/hibernation: remove redundant cacheinfo update
https://git.kernel.org/powerpc/c/b866459489fe8ef0e92cde3cbd6bbb1af6c4e99b
[25/28] powerpc/pseries/hibernation: perform post-suspend fixups later
https://git.kernel.org/powerpc/c/fa53bcdb7413e7c40170106781f6b5bb9d74db84
[26/28] powerpc/pseries/hibernation: remove prepare_late() callback
https://git.kernel.org/powerpc/c/d102f8312e1ea5e8bf84fceebf99186f22d16fc6
[27/28] powerpc/rtas: remove unused rtas_suspend_me_data
https://git.kernel.org/powerpc/c/87b57ea7e109520d3c6dfb01671a0cb134d3ccff
[28/28] powerpc/pseries/mobility: refactor node lookup during DT update
https://git.kernel.org/powerpc/c/2efd7f6eb9b7107e469837d8452e750d7d080a5d
cheers
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/64s: remplement power4_idle code in C
From: Michael Ellerman @ 2020-12-15 10:49 UTC (permalink / raw)
To: linuxppc-dev, Nicholas Piggin
In-Reply-To: <20190711022404.18132-1-npiggin@gmail.com>
On Thu, 11 Jul 2019 12:24:03 +1000, Nicholas Piggin wrote:
> This implements the tricky tracing and soft irq handling bits in C,
> leaving the low level bit to asm.
>
> A functional difference is that this redirects the interrupt exit to
> a return stub to execute blr, rather than the lr address itself. This
> is probably barely measurable on real hardware, but it keeps the link
> stack balanced.
>
> [...]
Patch 2 applied to powerpc/next.
[2/2] powerpc/64s: Remove idle workaround code from restore_cpu_cpufeatures
https://git.kernel.org/powerpc/c/02b02ee1b05ef225525835b2d45faf31b3420bdd
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/64s: Remove MSR[ISF] bit
From: Michael Ellerman @ 2020-12-15 10:49 UTC (permalink / raw)
To: linuxppc-dev, Nicholas Piggin
In-Reply-To: <20201106045340.1935841-1-npiggin@gmail.com>
On Fri, 6 Nov 2020 14:53:40 +1000, Nicholas Piggin wrote:
> No supported processor implements this mode. Setting the bit in
> MSR values can be a bit confusing (and would prevent the bit from
> ever being reused). Remove it.
Applied to powerpc/next.
[1/1] powerpc/64s: Remove MSR[ISF] bit
https://git.kernel.org/powerpc/c/e89a8ca94bf583f2577fe722483f0304b3390aa2
cheers
^ permalink raw reply
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