* [PATCH v1 05/15] powerpc: Remove address argument from bad_page_fault()
From: Christophe Leroy @ 2020-12-22 13:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, npiggin
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1608641532.git.christophe.leroy@csgroup.eu>
The address argument is not used by bad_page_fault().
Remove it.
Suggested-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/include/asm/bug.h | 4 ++--
arch/powerpc/kernel/entry_32.S | 4 +---
arch/powerpc/kernel/exceptions-64e.S | 3 +--
arch/powerpc/kernel/exceptions-64s.S | 8 +++-----
arch/powerpc/kernel/traps.c | 2 +-
arch/powerpc/mm/book3s64/hash_utils.c | 2 +-
arch/powerpc/mm/book3s64/slb.c | 2 +-
arch/powerpc/mm/fault.c | 6 +++---
arch/powerpc/platforms/8xx/machine_check.c | 2 +-
9 files changed, 14 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/include/asm/bug.h b/arch/powerpc/include/asm/bug.h
index 464f8ca8a5c9..af8c164254d0 100644
--- a/arch/powerpc/include/asm/bug.h
+++ b/arch/powerpc/include/asm/bug.h
@@ -112,8 +112,8 @@
struct pt_regs;
extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
-extern void bad_page_fault(struct pt_regs *, unsigned long, int);
-void __bad_page_fault(struct pt_regs *regs, unsigned long address, int sig);
+void bad_page_fault(struct pt_regs *regs, int sig);
+void __bad_page_fault(struct pt_regs *regs, int sig);
extern void _exception(int, struct pt_regs *, int, unsigned long);
extern void _exception_pkey(struct pt_regs *, unsigned long, int);
extern void die(const char *, struct pt_regs *, long);
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 238eacfda7b0..abd95aebe73a 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -671,15 +671,13 @@ ppc_swapcontext:
handle_page_fault:
addi r3,r1,STACK_FRAME_OVERHEAD
bl do_page_fault
- cmpwi r3,0
+ mr. r4,r3
beq+ ret_from_except
SAVE_NVGPRS(r1)
lwz r0,_TRAP(r1)
clrrwi r0,r0,1
stw r0,_TRAP(r1)
- mr r5,r3
addi r3,r1,STACK_FRAME_OVERHEAD
- lwz r4,_DAR(r1)
bl __bad_page_fault
b ret_from_except_full
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 74d07dc0bb48..e6fa10fc5d67 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -1020,9 +1020,8 @@ storage_fault_common:
bne- 1f
b ret_from_except_lite
1: bl save_nvgprs
- mr r5,r3
+ mr r4,r3
addi r3,r1,STACK_FRAME_OVERHEAD
- ld r4,_DAR(r1)
bl __bad_page_fault
b ret_from_except
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index e02ad6fefa46..cfbd1d690033 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -2137,8 +2137,7 @@ EXC_COMMON_BEGIN(h_data_storage_common)
GEN_COMMON h_data_storage
addi r3,r1,STACK_FRAME_OVERHEAD
BEGIN_MMU_FTR_SECTION
- ld r4,_DAR(r1)
- li r5,SIGSEGV
+ li r4,SIGSEGV
bl bad_page_fault
MMU_FTR_SECTION_ELSE
bl unknown_exception
@@ -3256,9 +3255,8 @@ handle_page_fault:
bl do_page_fault
cmpdi r3,0
beq+ interrupt_return
- mr r5,r3
+ mr r4,r3
addi r3,r1,STACK_FRAME_OVERHEAD
- ld r4,_DAR(r1)
bl __bad_page_fault
b interrupt_return
@@ -3295,6 +3293,6 @@ handle_dabr_fault:
* the access, or panic if there isn't a handler.
*/
77: addi r3,r1,STACK_FRAME_OVERHEAD
- li r5,SIGSEGV
+ li r4,SIGSEGV
bl bad_page_fault
b interrupt_return
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 3ec7b443fe6b..f3f6af3141ee 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1612,7 +1612,7 @@ void alignment_exception(struct pt_regs *regs)
if (user_mode(regs))
_exception(sig, regs, code, regs->dar);
else
- bad_page_fault(regs, regs->dar, sig);
+ bad_page_fault(regs, sig);
bail:
exception_exit(prev_state);
diff --git a/arch/powerpc/mm/book3s64/hash_utils.c b/arch/powerpc/mm/book3s64/hash_utils.c
index 73b06adb6eeb..a181eaba3349 100644
--- a/arch/powerpc/mm/book3s64/hash_utils.c
+++ b/arch/powerpc/mm/book3s64/hash_utils.c
@@ -1859,7 +1859,7 @@ void low_hash_fault(struct pt_regs *regs, unsigned long address, int rc)
#endif
_exception(SIGBUS, regs, BUS_ADRERR, address);
} else
- bad_page_fault(regs, address, SIGBUS);
+ bad_page_fault(regs, SIGBUS);
exception_exit(prev_state);
}
diff --git a/arch/powerpc/mm/book3s64/slb.c b/arch/powerpc/mm/book3s64/slb.c
index 584567970c11..8aa01c92e28b 100644
--- a/arch/powerpc/mm/book3s64/slb.c
+++ b/arch/powerpc/mm/book3s64/slb.c
@@ -871,7 +871,7 @@ void do_bad_slb_fault(struct pt_regs *regs, unsigned long ea, long err)
if (user_mode(regs))
_exception(SIGSEGV, regs, SEGV_BNDERR, ea);
else
- bad_page_fault(regs, ea, SIGSEGV);
+ bad_page_fault(regs, SIGSEGV);
} else if (err == -EINVAL) {
unrecoverable_exception(regs);
} else {
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 8961b44f350c..af1c7a6d09dc 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -567,7 +567,7 @@ NOKPROBE_SYMBOL(do_page_fault);
* It is called from the DSI and ISI handlers in head.S and from some
* of the procedures in traps.c.
*/
-void __bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
+void __bad_page_fault(struct pt_regs *regs, int sig)
{
int is_write = page_fault_is_write(regs->dsisr);
@@ -605,7 +605,7 @@ void __bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
die("Kernel access of bad area", regs, sig);
}
-void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
+void bad_page_fault(struct pt_regs *regs, int sig)
{
const struct exception_table_entry *entry;
@@ -614,5 +614,5 @@ void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
if (entry)
instruction_pointer_set(regs, extable_fixup(entry));
else
- __bad_page_fault(regs, address, sig);
+ __bad_page_fault(regs, sig);
}
diff --git a/arch/powerpc/platforms/8xx/machine_check.c b/arch/powerpc/platforms/8xx/machine_check.c
index 88dedf38eccd..656365975895 100644
--- a/arch/powerpc/platforms/8xx/machine_check.c
+++ b/arch/powerpc/platforms/8xx/machine_check.c
@@ -26,7 +26,7 @@ int machine_check_8xx(struct pt_regs *regs)
* to deal with that than having a wart in the mcheck handler.
* -- BenH
*/
- bad_page_fault(regs, regs->dar, SIGBUS);
+ bad_page_fault(regs, SIGBUS);
return 1;
#else
return 0;
--
2.25.0
^ permalink raw reply related
* [PATCH v1 08/15] powerpc/32: Split head_32.h into head_40x.h and head_6xx_8xx.h
From: Christophe Leroy @ 2020-12-22 13:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, npiggin
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1608641532.git.christophe.leroy@csgroup.eu>
book3s/32 (aka 6xx) and 8xx head will be reworked to re-enable MMU
earlier.
Split 40x head.h out so that we can keep 40x as is until it
is phased out.
There is no plan to implement VMAP stack on 40x on the near future
so remove everything related.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/kernel/entry_32.S | 6 +-
arch/powerpc/kernel/head_40x.S | 2 +-
arch/powerpc/kernel/{head_32.h => head_40x.h} | 185 +-----------------
.../kernel/{head_32.h => head_6xx_8xx.h} | 39 +---
arch/powerpc/kernel/head_8xx.S | 2 +-
arch/powerpc/kernel/head_book3s_32.S | 4 +-
6 files changed, 18 insertions(+), 220 deletions(-)
copy arch/powerpc/kernel/{head_32.h => head_40x.h} (52%)
rename arch/powerpc/kernel/{head_32.h => head_6xx_8xx.h} (89%)
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 05904334c0ff..c1687f3cd0ca 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -33,7 +33,11 @@
#include <asm/kup.h>
#include <asm/bug.h>
-#include "head_32.h"
+#ifdef CONFIG_40x
+#include "head_40x.h"
+#else
+#include "head_6xx_8xx.h"
+#endif
/*
* powerpc relies on return from interrupt/syscall being context synchronising
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index 16dc0eecbdf9..050b5fdc0438 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -37,7 +37,7 @@
#include <asm/ptrace.h>
#include <asm/export.h>
-#include "head_32.h"
+#include "head_40x.h"
/* As with the other PowerPC ports, it is expected that when code
* execution begins here, the following registers contain valid, yet
diff --git a/arch/powerpc/kernel/head_32.h b/arch/powerpc/kernel/head_40x.h
similarity index 52%
copy from arch/powerpc/kernel/head_32.h
copy to arch/powerpc/kernel/head_40x.h
index a2f72c966baf..9e27c07f5f2b 100644
--- a/arch/powerpc/kernel/head_32.h
+++ b/arch/powerpc/kernel/head_40x.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __HEAD_32_H__
-#define __HEAD_32_H__
+#ifndef __HEAD_40x_H__
+#define __HEAD_40x_H__
#include <asm/ptrace.h> /* for STACK_FRAME_REGS_MARKER */
@@ -10,69 +10,21 @@
* We assume sprg3 has the physical address of the current
* task's thread_struct.
*/
-.macro EXCEPTION_PROLOG handle_dar_dsisr=0
- EXCEPTION_PROLOG_0 handle_dar_dsisr=\handle_dar_dsisr
- EXCEPTION_PROLOG_1
- EXCEPTION_PROLOG_2 handle_dar_dsisr=\handle_dar_dsisr
-.endm
-
-.macro EXCEPTION_PROLOG_0 handle_dar_dsisr=0
+.macro EXCEPTION_PROLOG
mtspr SPRN_SPRG_SCRATCH0,r10
mtspr SPRN_SPRG_SCRATCH1,r11
-#ifdef CONFIG_VMAP_STACK
- mfspr r10, SPRN_SPRG_THREAD
- .if \handle_dar_dsisr
- mfspr r11, SPRN_DAR
- stw r11, DAR(r10)
- mfspr r11, SPRN_DSISR
- stw r11, DSISR(r10)
- .endif
- mfspr r11, SPRN_SRR0
- stw r11, SRR0(r10)
-#endif
mfspr r11, SPRN_SRR1 /* check whether user or kernel */
-#ifdef CONFIG_VMAP_STACK
- stw r11, SRR1(r10)
-#endif
mfcr r10
andi. r11, r11, MSR_PR
-.endm
-
-.macro EXCEPTION_PROLOG_1 for_rtas=0
-#ifdef CONFIG_VMAP_STACK
- mtspr SPRN_SPRG_SCRATCH2,r1
- subi r1, r1, INT_FRAME_SIZE /* use r1 if kernel */
- beq 1f
- mfspr r1,SPRN_SPRG_THREAD
- lwz r1,TASK_STACK-THREAD(r1)
- addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE
-1:
- mtcrf 0x7f, r1
- bt 32 - THREAD_ALIGN_SHIFT, stack_overflow
-#else
subi r11, r1, INT_FRAME_SIZE /* use r1 if kernel */
beq 1f
mfspr r11,SPRN_SPRG_THREAD
lwz r11,TASK_STACK-THREAD(r11)
addi r11, r11, THREAD_SIZE - INT_FRAME_SIZE
1: tophys(r11, r11)
-#endif
-.endm
-
-.macro EXCEPTION_PROLOG_2 handle_dar_dsisr=0
-#ifdef CONFIG_VMAP_STACK
- li r11, MSR_KERNEL & ~(MSR_IR | MSR_RI) /* can take DTLB miss */
- mtmsr r11
- isync
- mfspr r11, SPRN_SPRG_SCRATCH2
- stw r11,GPR1(r1)
- stw r11,0(r1)
- mr r11, r1
-#else
stw r1,GPR1(r11)
stw r1,0(r11)
tovirt(r1, r11) /* set new kernel sp */
-#endif
stw r10,_CCR(r11) /* save registers */
stw r12,GPR12(r11)
stw r9,GPR9(r11)
@@ -82,31 +34,9 @@
stw r12,GPR11(r11)
mflr r10
stw r10,_LINK(r11)
-#ifdef CONFIG_VMAP_STACK
- mfspr r12, SPRN_SPRG_THREAD
- tovirt(r12, r12)
- .if \handle_dar_dsisr
- lwz r10, DAR(r12)
- stw r10, _DAR(r11)
- lwz r10, DSISR(r12)
- stw r10, _DSISR(r11)
- .endif
- lwz r9, SRR1(r12)
- lwz r12, SRR0(r12)
-#else
mfspr r12,SPRN_SRR0
mfspr r9,SPRN_SRR1
-#endif
-#ifdef CONFIG_40x
rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
-#else
-#ifdef CONFIG_VMAP_STACK
- li r10, MSR_KERNEL & ~MSR_IR /* can take exceptions */
-#else
- li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR) /* can take exceptions */
-#endif
- mtmsr r10 /* (except for mach check in rtas) */
-#endif
stw r0,GPR0(r11)
lis r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
addi r10,r10,STACK_FRAME_REGS_MARKER@l
@@ -118,22 +48,6 @@
.macro SYSCALL_ENTRY trapno
mfspr r12,SPRN_SPRG_THREAD
mfspr r9, SPRN_SRR1
-#ifdef CONFIG_VMAP_STACK
- mfspr r11, SPRN_SRR0
- mtctr r11
- andi. r11, r9, MSR_PR
- mr r11, r1
- lwz r1,TASK_STACK-THREAD(r12)
- beq- 99f
- addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE
- li r10, MSR_KERNEL & ~(MSR_IR | MSR_RI) /* can take DTLB miss */
- mtmsr r10
- isync
- tovirt(r12, r12)
- stw r11,GPR1(r1)
- stw r11,0(r1)
- mr r11, r1
-#else
andi. r11, r9, MSR_PR
lwz r11,TASK_STACK-THREAD(r12)
beq- 99f
@@ -142,28 +56,14 @@
stw r1,GPR1(r11)
stw r1,0(r11)
tovirt(r1, r11) /* set new kernel sp */
-#endif
mflr r10
stw r10, _LINK(r11)
-#ifdef CONFIG_VMAP_STACK
- mfctr r10
-#else
mfspr r10,SPRN_SRR0
-#endif
stw r10,_NIP(r11)
mfcr r10
rlwinm r10,r10,0,4,2 /* Clear SO bit in CR */
stw r10,_CCR(r11) /* save registers */
-#ifdef CONFIG_40x
rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
-#else
-#ifdef CONFIG_VMAP_STACK
- LOAD_REG_IMMEDIATE(r10, MSR_KERNEL & ~MSR_IR) /* can take exceptions */
-#else
- LOAD_REG_IMMEDIATE(r10, MSR_KERNEL & ~(MSR_IR|MSR_DR)) /* can take exceptions */
-#endif
- mtmsr r10 /* (except for mach check in rtas) */
-#endif
lis r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
stw r2,GPR2(r11)
addi r10,r10,STACK_FRAME_REGS_MARKER@l
@@ -177,14 +77,11 @@
addi r11,r1,STACK_FRAME_OVERHEAD
addi r2,r12,-THREAD
stw r11,PT_REGS(r12)
-#if defined(CONFIG_40x)
/* Check to see if the dbcr0 register is set up to debug. Use the
internal debug mode bit to do this. */
lwz r12,THREAD_DBCR0(r12)
andis. r12,r12,DBCR0_IDM@h
-#endif
ACCOUNT_CPU_USER_ENTRY(r2, r11, r12)
-#if defined(CONFIG_40x)
beq+ 3f
/* From user and task is ptraced - load up global dbcr0 */
li r12,-1 /* clear all pending debug events */
@@ -197,10 +94,9 @@
lwz r12,4(r11)
addi r12,r12,-1
stw r12,4(r11)
-#endif
3:
- tovirt_novmstack r2, r2 /* set r2 to current */
+ tovirt(r2, r2) /* set r2 to current */
lis r11, transfer_to_syscall@h
ori r11, r11, transfer_to_syscall@l
#ifdef CONFIG_TRACE_IRQFLAGS
@@ -213,65 +109,26 @@
rlwimi r10, r9, 0, MSR_EE
#else
LOAD_REG_IMMEDIATE(r10, MSR_KERNEL | MSR_EE)
-#endif
-#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PERF_EVENTS)
- mtspr SPRN_NRI, r0
#endif
mtspr SPRN_SRR1,r10
mtspr SPRN_SRR0,r11
rfi /* jump to handler, enable MMU */
-#ifdef CONFIG_40x
b . /* Prevent prefetch past rfi */
-#endif
99: b ret_from_kernel_syscall
.endm
-.macro save_dar_dsisr_on_stack reg1, reg2, sp
-#ifndef CONFIG_VMAP_STACK
- mfspr \reg1, SPRN_DAR
- mfspr \reg2, SPRN_DSISR
- stw \reg1, _DAR(\sp)
- stw \reg2, _DSISR(\sp)
-#endif
-.endm
-
-.macro get_and_save_dar_dsisr_on_stack reg1, reg2, sp
-#ifdef CONFIG_VMAP_STACK
- lwz \reg1, _DAR(\sp)
- lwz \reg2, _DSISR(\sp)
-#else
- save_dar_dsisr_on_stack \reg1, \reg2, \sp
-#endif
-.endm
-
.macro tovirt_vmstack dst, src
-#ifdef CONFIG_VMAP_STACK
- tovirt(\dst, \src)
-#else
.ifnc \dst, \src
mr \dst, \src
.endif
-#endif
.endm
.macro tovirt_novmstack dst, src
-#ifndef CONFIG_VMAP_STACK
tovirt(\dst, \src)
-#else
- .ifnc \dst, \src
- mr \dst, \src
- .endif
-#endif
.endm
.macro tophys_novmstack dst, src
-#ifndef CONFIG_VMAP_STACK
tophys(\dst, \src)
-#else
- .ifnc \dst, \src
- mr \dst, \src
- .endif
-#endif
.endm
/*
@@ -285,18 +142,10 @@
/*
* Exception vectors.
*/
-#ifdef CONFIG_PPC_BOOK3S
-#define START_EXCEPTION(n, label) \
- . = n; \
- DO_KVM n; \
-label:
-
-#else
#define START_EXCEPTION(n, label) \
. = n; \
label:
-#endif
#define EXCEPTION(n, label, hdlr, xfer) \
START_EXCEPTION(n, label) \
@@ -319,28 +168,4 @@
#define EXC_XFER_LITE(n, hdlr) \
EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, transfer_to_handler, \
ret_from_except)
-
-.macro vmap_stack_overflow_exception
-#ifdef CONFIG_VMAP_STACK
-#ifdef CONFIG_SMP
- mfspr r1, SPRN_SPRG_THREAD
- lwz r1, TASK_CPU - THREAD(r1)
- slwi r1, r1, 3
- addis r1, r1, emergency_ctx@ha
-#else
- lis r1, emergency_ctx@ha
-#endif
- lwz r1, emergency_ctx@l(r1)
- cmpwi cr1, r1, 0
- bne cr1, 1f
- lis r1, init_thread_union@ha
- addi r1, r1, init_thread_union@l
-1: addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE
- EXCEPTION_PROLOG_2
- SAVE_NVGPRS(r11)
- addi r3, r1, STACK_FRAME_OVERHEAD
- EXC_XFER_STD(0, stack_overflow_exception)
-#endif
-.endm
-
-#endif /* __HEAD_32_H__ */
+#endif /* __HEAD_40x_H__ */
diff --git a/arch/powerpc/kernel/head_32.h b/arch/powerpc/kernel/head_6xx_8xx.h
similarity index 89%
rename from arch/powerpc/kernel/head_32.h
rename to arch/powerpc/kernel/head_6xx_8xx.h
index a2f72c966baf..0e4ce6746443 100644
--- a/arch/powerpc/kernel/head_32.h
+++ b/arch/powerpc/kernel/head_6xx_8xx.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __HEAD_32_H__
-#define __HEAD_32_H__
+#ifndef __HEAD_6xx_8xx_H__
+#define __HEAD_6xx_8xx_H__
#include <asm/ptrace.h> /* for STACK_FRAME_REGS_MARKER */
@@ -38,7 +38,7 @@
andi. r11, r11, MSR_PR
.endm
-.macro EXCEPTION_PROLOG_1 for_rtas=0
+.macro EXCEPTION_PROLOG_1
#ifdef CONFIG_VMAP_STACK
mtspr SPRN_SPRG_SCRATCH2,r1
subi r1, r1, INT_FRAME_SIZE /* use r1 if kernel */
@@ -97,16 +97,12 @@
mfspr r12,SPRN_SRR0
mfspr r9,SPRN_SRR1
#endif
-#ifdef CONFIG_40x
- rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
-#else
#ifdef CONFIG_VMAP_STACK
li r10, MSR_KERNEL & ~MSR_IR /* can take exceptions */
#else
li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR) /* can take exceptions */
#endif
mtmsr r10 /* (except for mach check in rtas) */
-#endif
stw r0,GPR0(r11)
lis r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
addi r10,r10,STACK_FRAME_REGS_MARKER@l
@@ -154,16 +150,12 @@
mfcr r10
rlwinm r10,r10,0,4,2 /* Clear SO bit in CR */
stw r10,_CCR(r11) /* save registers */
-#ifdef CONFIG_40x
- rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
-#else
#ifdef CONFIG_VMAP_STACK
LOAD_REG_IMMEDIATE(r10, MSR_KERNEL & ~MSR_IR) /* can take exceptions */
#else
LOAD_REG_IMMEDIATE(r10, MSR_KERNEL & ~(MSR_IR|MSR_DR)) /* can take exceptions */
#endif
mtmsr r10 /* (except for mach check in rtas) */
-#endif
lis r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
stw r2,GPR2(r11)
addi r10,r10,STACK_FRAME_REGS_MARKER@l
@@ -177,27 +169,7 @@
addi r11,r1,STACK_FRAME_OVERHEAD
addi r2,r12,-THREAD
stw r11,PT_REGS(r12)
-#if defined(CONFIG_40x)
- /* Check to see if the dbcr0 register is set up to debug. Use the
- internal debug mode bit to do this. */
- lwz r12,THREAD_DBCR0(r12)
- andis. r12,r12,DBCR0_IDM@h
-#endif
ACCOUNT_CPU_USER_ENTRY(r2, r11, r12)
-#if defined(CONFIG_40x)
- beq+ 3f
- /* From user and task is ptraced - load up global dbcr0 */
- li r12,-1 /* clear all pending debug events */
- mtspr SPRN_DBSR,r12
- lis r11,global_dbcr0@ha
- tophys(r11,r11)
- addi r11,r11,global_dbcr0@l
- lwz r12,0(r11)
- mtspr SPRN_DBCR0,r12
- lwz r12,4(r11)
- addi r12,r12,-1
- stw r12,4(r11)
-#endif
3:
tovirt_novmstack r2, r2 /* set r2 to current */
@@ -220,9 +192,6 @@
mtspr SPRN_SRR1,r10
mtspr SPRN_SRR0,r11
rfi /* jump to handler, enable MMU */
-#ifdef CONFIG_40x
- b . /* Prevent prefetch past rfi */
-#endif
99: b ret_from_kernel_syscall
.endm
@@ -343,4 +312,4 @@
#endif
.endm
-#endif /* __HEAD_32_H__ */
+#endif /* __HEAD_6xx_8xx_H__ */
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 7dce277c8a2a..9124ae889f9f 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -30,7 +30,7 @@
#include <asm/export.h>
#include <asm/code-patching-asm.h>
-#include "head_32.h"
+#include "head_6xx_8xx.h"
.macro compare_to_kernel_boundary scratch, addr
#if CONFIG_TASK_SIZE <= 0x80000000 && CONFIG_PAGE_OFFSET >= 0x80000000
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 0133a02d1d47..ccc691d67b0c 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -32,7 +32,7 @@
#include <asm/export.h>
#include <asm/feature-fixups.h>
-#include "head_32.h"
+#include "head_6xx_8xx.h"
#define LOAD_BAT(n, reg, RA, RB) \
/* see the comment for clear_bats() -- Cort */ \
@@ -272,7 +272,7 @@ MachineCheck:
#endif
bne cr1, 7f
#endif /* CONFIG_PPC_CHRP */
- EXCEPTION_PROLOG_1 for_rtas=1
+ EXCEPTION_PROLOG_1
7: EXCEPTION_PROLOG_2
addi r3,r1,STACK_FRAME_OVERHEAD
#ifdef CONFIG_PPC_CHRP
--
2.25.0
^ permalink raw reply related
* [PATCH v1 09/15] powerpc/32: Preserve cr1 in exception prolog stack check
From: Christophe Leroy @ 2020-12-22 13:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, npiggin
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1608641532.git.christophe.leroy@csgroup.eu>
THREAD_ALIGN_SHIFT = THREAD_SHIFT + 1 = PAGE_SHIFT + 1
Maximum PAGE_SHIFT is 18 for 256k pages so
THREAD_ALIGN_SHIFT is 19 at the maximum.
No need to clobber cr1, it can be preserved when moving r1
into CR when we check stack overflow.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/kernel/head_6xx_8xx.h | 2 +-
arch/powerpc/kernel/head_book3s_32.S | 6 ------
2 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/powerpc/kernel/head_6xx_8xx.h b/arch/powerpc/kernel/head_6xx_8xx.h
index 0e4ce6746443..b70d50efc961 100644
--- a/arch/powerpc/kernel/head_6xx_8xx.h
+++ b/arch/powerpc/kernel/head_6xx_8xx.h
@@ -47,7 +47,7 @@
lwz r1,TASK_STACK-THREAD(r1)
addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE
1:
- mtcrf 0x7f, r1
+ mtcrf 0x3f, r1
bt 32 - THREAD_ALIGN_SHIFT, stack_overflow
#else
subi r11, r1, INT_FRAME_SIZE /* use r1 if kernel */
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index ccc691d67b0c..89f38e9ec7cc 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -276,12 +276,6 @@ MachineCheck:
7: EXCEPTION_PROLOG_2
addi r3,r1,STACK_FRAME_OVERHEAD
#ifdef CONFIG_PPC_CHRP
-#ifdef CONFIG_VMAP_STACK
- mfspr r4, SPRN_SPRG_THREAD
- tovirt(r4, r4)
- lwz r4, RTAS_SP(r4)
- cmpwi cr1, r4, 0
-#endif
beq cr1, machine_check_tramp
twi 31, 0, 0
#else
--
2.25.0
^ permalink raw reply related
* [PATCH v1 07/15] powerpc: Remove address and errorcode arguments from do_page_fault()
From: Christophe Leroy @ 2020-12-22 13:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, npiggin
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1608641532.git.christophe.leroy@csgroup.eu>
Let do_page_fault() retrieve address and errorcode from regs.
This simplifies the code and shouldn't impeed performance as
address and errorcode are likely still hot in the cache.
Additional cleanup could be done in book3s/64 code once
the same changes have been applied to hash_fault() handling.
Suggested-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/include/asm/bug.h | 2 +-
arch/powerpc/kernel/entry_32.S | 7 +------
arch/powerpc/kernel/exceptions-64e.S | 2 --
arch/powerpc/kernel/head_40x.S | 6 +++---
arch/powerpc/kernel/head_8xx.S | 6 +++---
arch/powerpc/kernel/head_book3s_32.S | 5 ++---
arch/powerpc/kernel/head_booke.h | 4 +---
arch/powerpc/mm/fault.c | 10 +++++-----
8 files changed, 16 insertions(+), 26 deletions(-)
diff --git a/arch/powerpc/include/asm/bug.h b/arch/powerpc/include/asm/bug.h
index af8c164254d0..5a05f43b2984 100644
--- a/arch/powerpc/include/asm/bug.h
+++ b/arch/powerpc/include/asm/bug.h
@@ -111,7 +111,7 @@
#ifndef __ASSEMBLY__
struct pt_regs;
-extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
+int do_page_fault(struct pt_regs *regs);
void bad_page_fault(struct pt_regs *regs, int sig);
void __bad_page_fault(struct pt_regs *regs, int sig);
extern void _exception(int, struct pt_regs *, int, unsigned long);
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index abd95aebe73a..05904334c0ff 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -276,8 +276,7 @@ reenable_mmu:
* We save a bunch of GPRs,
* r3 can be different from GPR3(r1) at this point, r9 and r11
* contains the old MSR and handler address respectively,
- * r4 & r5 can contain page fault arguments that need to be passed
- * along as well. r0, r6-r8, r12, CCR, CTR, XER etc... are left
+ * r0, r4-r8, r12, CCR, CTR, XER etc... are left
* clobbered as they aren't useful past this point.
*/
@@ -285,15 +284,11 @@ reenable_mmu:
stw r9,8(r1)
stw r11,12(r1)
stw r3,16(r1)
- stw r4,20(r1)
- stw r5,24(r1)
/* If we are disabling interrupts (normal case), simply log it with
* lockdep
*/
1: bl trace_hardirqs_off
- lwz r5,24(r1)
- lwz r4,20(r1)
lwz r3,16(r1)
lwz r11,12(r1)
lwz r9,8(r1)
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index e6fa10fc5d67..52421042a020 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -1011,8 +1011,6 @@ storage_fault_common:
std r14,_DAR(r1)
std r15,_DSISR(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
- mr r4,r14
- mr r5,r15
ld r14,PACA_EXGEN+EX_R14(r13)
ld r15,PACA_EXGEN+EX_R15(r13)
bl do_page_fault
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index a1ae00689e0f..16dc0eecbdf9 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -191,9 +191,9 @@ _ENTRY(saved_ksp_limit)
*/
START_EXCEPTION(0x0400, InstructionAccess)
EXCEPTION_PROLOG
- mr r4,r12 /* Pass SRR0 as arg2 */
- stw r4, _DEAR(r11)
- li r5,0 /* Pass zero as arg3 */
+ stw r12, _DEAR(r11) /* SRR0 as DEAR */
+ li r5,0
+ stw r5, _ESR(r11) /* Zero ESR */
EXC_XFER_LITE(0x400, handle_page_fault)
/* 0x0500 - External Interrupt Exception */
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 81f3c984f50c..7dce277c8a2a 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -312,14 +312,14 @@ DataStoreTLBMiss:
. = 0x1300
InstructionTLBError:
EXCEPTION_PROLOG
- mr r4,r12
andis. r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
andis. r10,r9,SRR1_ISI_NOPT@h
beq+ .Litlbie
- tlbie r4
+ tlbie r12
/* 0x400 is InstructionAccess exception, needed by bad_page_fault() */
.Litlbie:
- stw r4, _DAR(r11)
+ stw r12, _DAR(r11)
+ stw r5, _DSISR(r11)
EXC_XFER_LITE(0x400, handle_page_fault)
/* This is the data TLB error on the MPC8xx. This could be due to
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 15e6003fd3b8..0133a02d1d47 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -369,9 +369,9 @@ BEGIN_MMU_FTR_SECTION
END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
#endif
#endif /* CONFIG_VMAP_STACK */
-1: mr r4,r12
andis. r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
- stw r4, _DAR(r11)
+ stw r12, _DAR(r11)
+ stw r5, _DSISR(r11)
EXC_XFER_LITE(0x400, handle_page_fault)
/* External interrupt */
@@ -693,7 +693,6 @@ handle_page_fault_tramp_1:
#ifdef CONFIG_VMAP_STACK
EXCEPTION_PROLOG_2 handle_dar_dsisr=1
#endif
- lwz r4, _DAR(r11)
lwz r5, _DSISR(r11)
/* fall through */
handle_page_fault_tramp_2:
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index 74e230c200fb..0fbdacc7fab7 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -476,9 +476,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
NORMAL_EXCEPTION_PROLOG(INST_STORAGE); \
mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \
stw r5,_ESR(r11); \
- mr r4,r12; /* Pass SRR0 as arg2 */ \
- stw r4, _DEAR(r11); \
- li r5,0; /* Pass zero as arg3 */ \
+ stw r12, _DEAR(r11); /* Pass SRR0 as arg2 */ \
EXC_XFER_LITE(0x0400, handle_page_fault)
#define ALIGNMENT_EXCEPTION \
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index af1c7a6d09dc..fafacf7019f9 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -388,9 +388,10 @@ static void sanity_check_fault(bool is_write, bool is_user,
* The return value is 0 if the fault was handled, or the signal
* number if this is a kernel fault that can't be handled here.
*/
-static int __do_page_fault(struct pt_regs *regs, unsigned long address,
- unsigned long error_code)
+static int __do_page_fault(struct pt_regs *regs)
{
+ unsigned long address = regs->dar;
+ unsigned long error_code = regs->dsisr;
struct vm_area_struct * vma;
struct mm_struct *mm = current->mm;
unsigned int flags = FAULT_FLAG_DEFAULT;
@@ -542,12 +543,11 @@ static int __do_page_fault(struct pt_regs *regs, unsigned long address,
}
NOKPROBE_SYMBOL(__do_page_fault);
-int do_page_fault(struct pt_regs *regs, unsigned long address,
- unsigned long error_code)
+int do_page_fault(struct pt_regs *regs)
{
const struct exception_table_entry *entry;
enum ctx_state prev_state = exception_enter();
- int rc = __do_page_fault(regs, address, error_code);
+ int rc = __do_page_fault(regs);
exception_exit(prev_state);
if (likely(!rc))
return 0;
--
2.25.0
^ permalink raw reply related
* [PATCH v1 06/15] powerpc: Remove address and errorcode arguments from do_break()
From: Christophe Leroy @ 2020-12-22 13:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, npiggin
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1608641532.git.christophe.leroy@csgroup.eu>
Let do_break() retrieve address and errorcode from regs.
This simplifies the code and shouldn't impeed performance as
address and errorcode are likely still hot in the cache.
Suggested-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/include/asm/debug.h | 3 +--
arch/powerpc/kernel/exceptions-64s.S | 2 --
arch/powerpc/kernel/head_8xx.S | 5 -----
arch/powerpc/kernel/process.c | 8 +++-----
4 files changed, 4 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/include/asm/debug.h b/arch/powerpc/include/asm/debug.h
index ec57daf87f40..0550eceab3ca 100644
--- a/arch/powerpc/include/asm/debug.h
+++ b/arch/powerpc/include/asm/debug.h
@@ -52,8 +52,7 @@ extern void do_send_trap(struct pt_regs *regs, unsigned long address,
unsigned long error_code, int brkpt);
#else
-extern void do_break(struct pt_regs *regs, unsigned long address,
- unsigned long error_code);
+void do_break(struct pt_regs *regs);
#endif
#endif /* _ASM_POWERPC_DEBUG_H */
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index cfbd1d690033..3ea067bcbb95 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -3262,8 +3262,6 @@ handle_page_fault:
/* We have a data breakpoint exception - handle it */
handle_dabr_fault:
- ld r4,_DAR(r1)
- ld r5,_DSISR(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
bl do_break
/*
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 52702f3db6df..81f3c984f50c 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -364,11 +364,6 @@ do_databreakpoint:
addi r3,r1,STACK_FRAME_OVERHEAD
mfspr r4,SPRN_BAR
stw r4,_DAR(r11)
-#ifdef CONFIG_VMAP_STACK
- lwz r5,_DSISR(r11)
-#else
- mfspr r5,SPRN_DSISR
-#endif
EXC_XFER_STD(0x1c00, do_break)
. = 0x1c00
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index a66f435dabbf..99c5e4fc5ff1 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -659,12 +659,10 @@ static void do_break_handler(struct pt_regs *regs)
}
}
-void do_break (struct pt_regs *regs, unsigned long address,
- unsigned long error_code)
+void do_break(struct pt_regs *regs)
{
current->thread.trap_nr = TRAP_HWBKPT;
- if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
- 11, SIGSEGV) == NOTIFY_STOP)
+ if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, regs->dsisr, 11, SIGSEGV) == NOTIFY_STOP)
return;
if (debugger_break_match(regs))
@@ -681,7 +679,7 @@ void do_break (struct pt_regs *regs, unsigned long address,
do_break_handler(regs);
/* Deliver the signal to userspace */
- force_sig_fault(SIGTRAP, TRAP_HWBKPT, (void __user *)address);
+ force_sig_fault(SIGTRAP, TRAP_HWBKPT, (void __user *)regs->dar);
}
#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
--
2.25.0
^ permalink raw reply related
* [PATCH v1 01/15] powerpc/32: Fix vmap stack - Properly set r1 before activating MMU on syscall too
From: Christophe Leroy @ 2020-12-22 13:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, npiggin
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1608641532.git.christophe.leroy@csgroup.eu>
We need r1 to be properly set before activating MMU, otherwise any new
exception taken while saving registers into the stack in syscall
prologs will use the user stack, which is wrong and will even lockup
or crash when KUAP is selected.
Do that by switching the meaning of r11 and r1 until we have saved r1
to the stack: copy r1 into r11 and setup the new stack pointer in r1.
To avoid complicating and impacting all generic and specific prolog
code (and more), copy back r1 into r11 once r11 is save onto
the stack.
We could get rid of copying r1 back and forth at the cost of rewriting
everything to use r1 instead of r11 all the way when CONFIG_VMAP_STACK
is set, but the effort is probably not worth it for now.
Fixes: da7bb43ab9da ("powerpc/32: Fix vmap stack - Properly set r1 before activating MMU")
Cc: stable@vger.kernel.org
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/kernel/head_32.h | 25 ++++++++++++++++---------
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/kernel/head_32.h b/arch/powerpc/kernel/head_32.h
index 541664d95702..a2f72c966baf 100644
--- a/arch/powerpc/kernel/head_32.h
+++ b/arch/powerpc/kernel/head_32.h
@@ -121,18 +121,28 @@
#ifdef CONFIG_VMAP_STACK
mfspr r11, SPRN_SRR0
mtctr r11
-#endif
andi. r11, r9, MSR_PR
- lwz r11,TASK_STACK-THREAD(r12)
+ mr r11, r1
+ lwz r1,TASK_STACK-THREAD(r12)
beq- 99f
- addi r11, r11, THREAD_SIZE - INT_FRAME_SIZE
-#ifdef CONFIG_VMAP_STACK
+ addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE
li r10, MSR_KERNEL & ~(MSR_IR | MSR_RI) /* can take DTLB miss */
mtmsr r10
isync
+ tovirt(r12, r12)
+ stw r11,GPR1(r1)
+ stw r11,0(r1)
+ mr r11, r1
+#else
+ andi. r11, r9, MSR_PR
+ lwz r11,TASK_STACK-THREAD(r12)
+ beq- 99f
+ addi r11, r11, THREAD_SIZE - INT_FRAME_SIZE
+ tophys(r11, r11)
+ stw r1,GPR1(r11)
+ stw r1,0(r11)
+ tovirt(r1, r11) /* set new kernel sp */
#endif
- tovirt_vmstack r12, r12
- tophys_novmstack r11, r11
mflr r10
stw r10, _LINK(r11)
#ifdef CONFIG_VMAP_STACK
@@ -140,9 +150,6 @@
#else
mfspr r10,SPRN_SRR0
#endif
- stw r1,GPR1(r11)
- stw r1,0(r11)
- tovirt_novmstack r1, r11 /* set new kernel sp */
stw r10,_NIP(r11)
mfcr r10
rlwinm r10,r10,0,4,2 /* Clear SO bit in CR */
--
2.25.0
^ permalink raw reply related
* [PATCH v1 03/15] powerpc/32s: Only build hash code when CONFIG_PPC_BOOK3S_604 is selected
From: Christophe Leroy @ 2020-12-22 13:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, npiggin
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1608641532.git.christophe.leroy@csgroup.eu>
It is now possible to only build book3s/32 kernel for
CPUs without hash table.
Opt out hash related code when CONFIG_PPC_BOOK3S_604 is not selected.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
v2: Rebased
---
arch/powerpc/kernel/head_book3s_32.S | 12 ++++++++++++
arch/powerpc/mm/book3s32/Makefile | 4 +++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index fbc48a500846..f6355fcca86a 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -293,6 +293,7 @@ MachineCheck:
DO_KVM 0x300
DataAccess:
#ifdef CONFIG_VMAP_STACK
+#ifdef CONFIG_PPC_BOOK3S_604
BEGIN_MMU_FTR_SECTION
mtspr SPRN_SPRG_SCRATCH2,r10
mfspr r10, SPRN_SPRG_THREAD
@@ -309,12 +310,14 @@ BEGIN_MMU_FTR_SECTION
MMU_FTR_SECTION_ELSE
b 1f
ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE)
+#endif
1: EXCEPTION_PROLOG_0 handle_dar_dsisr=1
EXCEPTION_PROLOG_1
b handle_page_fault_tramp_1
#else /* CONFIG_VMAP_STACK */
EXCEPTION_PROLOG handle_dar_dsisr=1
get_and_save_dar_dsisr_on_stack r4, r5, r11
+#ifdef CONFIG_PPC_BOOK3S_604
BEGIN_MMU_FTR_SECTION
andis. r0, r5, (DSISR_BAD_FAULT_32S | DSISR_DABRMATCH)@h
bne handle_page_fault_tramp_2 /* if not, try to put a PTE */
@@ -322,8 +325,11 @@ BEGIN_MMU_FTR_SECTION
bl hash_page
b handle_page_fault_tramp_1
MMU_FTR_SECTION_ELSE
+#endif
b handle_page_fault_tramp_2
+#ifdef CONFIG_PPC_BOOK3S_604
ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE)
+#endif
#endif /* CONFIG_VMAP_STACK */
/* Instruction access exception. */
@@ -339,12 +345,14 @@ InstructionAccess:
mfspr r11, SPRN_SRR1 /* check whether user or kernel */
stw r11, SRR1(r10)
mfcr r10
+#ifdef CONFIG_PPC_BOOK3S_604
BEGIN_MMU_FTR_SECTION
andis. r11, r11, SRR1_ISI_NOPT@h /* no pte found? */
bne hash_page_isi
.Lhash_page_isi_cont:
mfspr r11, SPRN_SRR1 /* check whether user or kernel */
END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
+#endif
andi. r11, r11, MSR_PR
EXCEPTION_PROLOG_1
@@ -355,9 +363,11 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
beq 1f /* if so, try to put a PTE */
li r3,0 /* into the hash table */
mr r4,r12 /* SRR0 is fault address */
+#ifdef CONFIG_PPC_BOOK3S_604
BEGIN_MMU_FTR_SECTION
bl hash_page
END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
+#endif
#endif /* CONFIG_VMAP_STACK */
1: mr r4,r12
andis. r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
@@ -690,6 +700,7 @@ handle_page_fault_tramp_2:
EXC_XFER_LITE(0x300, handle_page_fault)
#ifdef CONFIG_VMAP_STACK
+#ifdef CONFIG_PPC_BOOK3S_604
.macro save_regs_thread thread
stw r0, THR0(\thread)
stw r3, THR3(\thread)
@@ -761,6 +772,7 @@ fast_hash_page_return:
mfspr r11, SPRN_SPRG_SCRATCH1
mfspr r10, SPRN_SPRG_SCRATCH0
rfi
+#endif /* CONFIG_PPC_BOOK3S_604 */
stack_overflow:
vmap_stack_overflow_exception
diff --git a/arch/powerpc/mm/book3s32/Makefile b/arch/powerpc/mm/book3s32/Makefile
index 3f972db17761..446d9de88ce4 100644
--- a/arch/powerpc/mm/book3s32/Makefile
+++ b/arch/powerpc/mm/book3s32/Makefile
@@ -6,4 +6,6 @@ ifdef CONFIG_KASAN
CFLAGS_mmu.o += -DDISABLE_BRANCH_PROFILING
endif
-obj-y += mmu.o hash_low.o mmu_context.o tlb.o nohash_low.o
+obj-y += mmu.o mmu_context.o
+obj-$(CONFIG_PPC_BOOK3S_603) += nohash_low.o
+obj-$(CONFIG_PPC_BOOK3S_604) += hash_low.o tlb.o
--
2.25.0
^ permalink raw reply related
* [PATCH v1 04/15] powerpc/32s: Do DABR match out of handle_page_fault()
From: Christophe Leroy @ 2020-12-22 13:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, npiggin
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1608641532.git.christophe.leroy@csgroup.eu>
handle_page_fault() has some code dedicated to book3s/32 to
call do_break() when the DSI is a DABR match.
On other platforms, do_break() is handled separately.
Do the same for book3s/32, do it earlier in the process of DSI.
This change also avoid doing the test on ISI.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/kernel/entry_32.S | 15 ---------------
arch/powerpc/kernel/head_book3s_32.S | 3 +++
2 files changed, 3 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 1c9b0ccc2172..238eacfda7b0 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -670,10 +670,6 @@ ppc_swapcontext:
.globl handle_page_fault
handle_page_fault:
addi r3,r1,STACK_FRAME_OVERHEAD
-#ifdef CONFIG_PPC_BOOK3S_32
- andis. r0,r5,DSISR_DABRMATCH@h
- bne- handle_dabr_fault
-#endif
bl do_page_fault
cmpwi r3,0
beq+ ret_from_except
@@ -687,17 +683,6 @@ handle_page_fault:
bl __bad_page_fault
b ret_from_except_full
-#ifdef CONFIG_PPC_BOOK3S_32
- /* We have a data breakpoint exception - handle it */
-handle_dabr_fault:
- SAVE_NVGPRS(r1)
- lwz r0,_TRAP(r1)
- clrrwi r0,r0,1
- stw r0,_TRAP(r1)
- bl do_break
- b ret_from_except_full
-#endif
-
/*
* This routine switches between two different tasks. The process
* state of one is saved on its kernel stack. Then the state
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index f6355fcca86a..15e6003fd3b8 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -697,7 +697,10 @@ handle_page_fault_tramp_1:
lwz r5, _DSISR(r11)
/* fall through */
handle_page_fault_tramp_2:
+ andis. r0, r5, DSISR_DABRMATCH@h
+ bne- 1f
EXC_XFER_LITE(0x300, handle_page_fault)
+1: EXC_XFER_STD(0x300, do_break)
#ifdef CONFIG_VMAP_STACK
#ifdef CONFIG_PPC_BOOK3S_604
--
2.25.0
^ permalink raw reply related
* [PATCH v1 00/15] powerpc/32: Reduce head complexity and re-activate MMU earlier
From: Christophe Leroy @ 2020-12-22 13:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, npiggin
Cc: linuxppc-dev, linux-kernel
This series aims at reducing exception/syscall prologs complexity.
It also brings earlier MMU re-activation.
At the time being, we have two pathes in the prologs: one for
when we have CONFIG_VMAP stack and one when we don't.
Among 40x, 6xx and 8xx, only 40x doesn't support VMAP stack.
When VMAP stack is supported, there is special prolog code to
allow accessing stack with MMU on.
That code that access VM stack with MMU on is also able to access
linear memory, so it can also access non VM stack with MMU on.
CONFIG_VMAP_STACK as been on by default on 6xx and 8xx for some
kernel releases now, so it is known to work.
On the 8xx, null_syscall runs in 292 cycles with VMAP_STACK and in
296 cycles without VMAP stack.
On the 832x, null_syscall runs in 224 cycles with VMAP_STACK and in
213 cycles without VMAP stack.
By removing the old non VMAP stack code, and using the same prolog
regardless of the activation of VMAP stacks, we make the code a lot
simplier and open perspective to even more.
Once this is done, we can easily go one step further and re-activate
Instruction translation at the same time as data translation.
At the end, null_syscall runs in 286 cycles on the 8xx and in 216
cycles on the 832x
To do this, I splitted head_32.h in two files, one for 40x which
doesn't have VMAP stack and one for 6xx and 8xx that have VMAP stack.
Now that we have MMU back on earlier on the 6xx and 8xx, once the 40x is
gone it will be possible have more commonalities with book3e/32 which
has MMU always on.
Christophe Leroy (15):
powerpc/32: Fix vmap stack - Properly set r1 before activating MMU on
syscall too
powerpc/32s: Fix RTAS machine check with VMAP stack
powerpc/32s: Only build hash code when CONFIG_PPC_BOOK3S_604 is
selected
powerpc/32s: Do DABR match out of handle_page_fault()
powerpc: Remove address argument from bad_page_fault()
powerpc: Remove address and errorcode arguments from do_break()
powerpc: Remove address and errorcode arguments from do_page_fault()
powerpc/32: Split head_32.h into head_40x.h and head_6xx_8xx.h
powerpc/32: Preserve cr1 in exception prolog stack check
powerpc/32: Make VMAP stack code depend on HAVE_ARCH_VMAP_STACK
powerpc/32: Use r1 directly instead of r11 in syscall prolog
powerpc/32: Remove msr argument in EXC_XFER_TEMPLATE() on 6xx/8xx
powerpc/32: Enable instruction translation at the same time as data
translation
powerpc/32: Use r1 directly instead of r11 in exception prologs on
6xx/8xx
powerpc/32: Use r11 to store DSISR in prolog
arch/powerpc/include/asm/bug.h | 6 +-
arch/powerpc/include/asm/debug.h | 3 +-
arch/powerpc/include/asm/processor.h | 2 +-
arch/powerpc/kernel/asm-offsets.c | 2 +-
arch/powerpc/kernel/entry_32.S | 56 ++---
arch/powerpc/kernel/exceptions-64e.S | 5 +-
arch/powerpc/kernel/exceptions-64s.S | 10 +-
arch/powerpc/kernel/fpu.S | 2 +-
arch/powerpc/kernel/head_40x.S | 8 +-
arch/powerpc/kernel/{head_32.h => head_40x.h} | 186 +--------------
.../kernel/{head_32.h => head_6xx_8xx.h} | 222 +++++-------------
arch/powerpc/kernel/head_8xx.S | 33 +--
arch/powerpc/kernel/head_book3s_32.S | 64 ++---
arch/powerpc/kernel/head_booke.h | 4 +-
arch/powerpc/kernel/idle_6xx.S | 12 +-
arch/powerpc/kernel/process.c | 8 +-
arch/powerpc/kernel/traps.c | 2 +-
arch/powerpc/kernel/vector.S | 2 +-
arch/powerpc/mm/book3s32/Makefile | 4 +-
arch/powerpc/mm/book3s32/hash_low.S | 14 --
arch/powerpc/mm/book3s64/hash_utils.c | 2 +-
arch/powerpc/mm/book3s64/slb.c | 2 +-
arch/powerpc/mm/fault.c | 16 +-
arch/powerpc/platforms/8xx/machine_check.c | 2 +-
24 files changed, 154 insertions(+), 513 deletions(-)
copy arch/powerpc/kernel/{head_32.h => head_40x.h} (53%)
rename arch/powerpc/kernel/{head_32.h => head_6xx_8xx.h} (50%)
--
2.25.0
^ permalink raw reply
* [PATCH v1 02/15] powerpc/32s: Fix RTAS machine check with VMAP stack
From: Christophe Leroy @ 2020-12-22 13:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, npiggin
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <cover.1608641532.git.christophe.leroy@csgroup.eu>
When we have VMAP stack, exception prolog 1 sets r1, not r11.
Fixes: da7bb43ab9da ("powerpc/32: Fix vmap stack - Properly set r1 before activating MMU")
Fixes: d2e006036082 ("powerpc/32: Use SPRN_SPRG_SCRATCH2 in exception prologs")
Cc: stable@vger.kernel.org
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/kernel/head_book3s_32.S | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 349bf3f0c3af..fbc48a500846 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -260,9 +260,16 @@ __secondary_hold_acknowledge:
MachineCheck:
EXCEPTION_PROLOG_0
#ifdef CONFIG_PPC_CHRP
+#ifdef CONFIG_VMAP_STACK
+ mtspr SPRN_SPRG_SCRATCH2,r1
+ mfspr r1, SPRN_SPRG_THREAD
+ lwz r1, RTAS_SP(r1)
+ cmpwi cr1, r1, 0
+#else
mfspr r11, SPRN_SPRG_THREAD
lwz r11, RTAS_SP(r11)
cmpwi cr1, r11, 0
+#endif
bne cr1, 7f
#endif /* CONFIG_PPC_CHRP */
EXCEPTION_PROLOG_1 for_rtas=1
--
2.25.0
^ permalink raw reply related
* Re: GIT kernel with the PowerPC updates 5.11-1 doesn't boot on a FSL P5040 board and in a virtual e5500 QEMU machine
From: Michael Ellerman @ 2020-12-22 13:14 UTC (permalink / raw)
To: Christian Zigotzky, Christophe Leroy, Denis Kirjanov
Cc: Darren Stevens, linuxppc-dev, R.T.Dickinson, mad skateman
In-Reply-To: <8d25f58b-a7bf-4413-b8cc-ed3bd0107263@xenosoft.de>
Christian Zigotzky <chzigotzky@xenosoft.de> writes:
>
...
> Download: http://www.xenosoft.de/MintPPC32-X5000.tar.gz (md5sum:
> b31c1c1ca1fcf5d4cdf110c4bce11654) The password for both 'root' and
> 'mintppc' is 'mintppc'.
...
>
> QEMU command without KVM on macOS Intel: qemu-system-ppc64 -M ppce500
> -cpu e5500 -m 1024 -kernel uImage -drive
> format=raw,file=MintPPC32-X5000.img,index=0,if=virtio -netdev
> user,id=mynet0 -device virtio-net-pci,netdev=mynet0 -append "rw
> root=/dev/vda" -device virtio-vga -usb -device usb-ehci,id=ehci -device
> usb-tablet -device virtio-keyboard-pci -smp 4 -vnc :1
I was able to boot the above (on powerpc, but not using KVM), using my
fixes branch.
Please give that branch a test:
https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/log/?h=fixes
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/boot: Fix build of dts/fsl
From: Michael Ellerman @ 2020-12-22 13:11 UTC (permalink / raw)
To: Michael Ellerman, masahiroy; +Cc: linuxppc-dev
In-Reply-To: <20201215032906.473460-1-mpe@ellerman.id.au>
On Tue, 15 Dec 2020 14:29:06 +1100, Michael Ellerman wrote:
> The lkp robot reported that some configs fail to build, for example
> mpc85xx_smp_defconfig, with:
>
> cc1: fatal error: opening output file arch/powerpc/boot/dts/fsl/.mpc8540ads.dtb.dts.tmp: No such file or directory
>
> This bisects to:
> cc8a51ca6f05 ("kbuild: always create directories of targets")
>
> [...]
Applied to powerpc/fixes.
[1/1] powerpc/boot: Fix build of dts/fsl
https://git.kernel.org/powerpc/c/b36f835b636908e4122f2e17310b1dbc380a3b19
cheers
^ permalink raw reply
* Re: [PATCH 1/3] powerpc/vdso: Block R_PPC_REL24 relocations
From: Michael Ellerman @ 2020-12-22 13:11 UTC (permalink / raw)
To: Michael Ellerman, linuxppc-dev; +Cc: skirmisher
In-Reply-To: <20201218111619.1206391-1-mpe@ellerman.id.au>
On Fri, 18 Dec 2020 22:16:17 +1100, Michael Ellerman wrote:
> Add R_PPC_REL24 relocations to the list of relocations we do NOT
> support in the VDSO.
>
> These are generated in some cases and we do not support relocating
> them at runtime, so if they appear then the VDSO will not work at
> runtime, therefore it's preferable to break the build if we see them.
Applied to powerpc/fixes.
[1/3] powerpc/vdso: Block R_PPC_REL24 relocations
https://git.kernel.org/powerpc/c/42ed6d56ade21f367f27aa5915cc397510cfdef5
[2/3] powerpc/vdso: Don't pass 64-bit ABI cflags to 32-bit VDSO
https://git.kernel.org/powerpc/c/107521e8039688f7a9548f17919dfde670b911c1
[3/3] powerpc/vdso: Fix DOTSYM for 32-bit LE VDSO
https://git.kernel.org/powerpc/c/2eda7f11000646909a10298951c9defb2321b240
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/smp: Add __init to init_big_cores()
From: Michael Ellerman @ 2020-12-22 13:11 UTC (permalink / raw)
To: Cédric Le Goater, linuxppc-dev; +Cc: Gautham R . Shenoy
In-Reply-To: <20201221074154.403779-1-clg@kaod.org>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 679 bytes --]
On Mon, 21 Dec 2020 08:41:54 +0100, Cédric Le Goater wrote:
> It fixes this link warning:
>
> WARNING: modpost: vmlinux.o(.text.unlikely+0x2d98): Section mismatch in reference from the function init_big_cores.isra.0() to the function .init.text:init_thread_group_cache_map()
> The function init_big_cores.isra.0() references
> the function __init init_thread_group_cache_map().
> This is often because init_big_cores.isra.0 lacks a __init
> annotation or the annotation of init_thread_group_cache_map is wrong.
Applied to powerpc/fixes.
[1/1] powerpc/smp: Add __init to init_big_cores()
https://git.kernel.org/powerpc/c/9014eab6a38c60fd185bc92ed60f46cf99a462ab
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/time: Force inlining of get_tb()
From: Michael Ellerman @ 2020-12-22 13:11 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Christophe Leroy,
Paul Mackerras
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <df05d53eed1210cf1aa76d1fb44aa0fab29c018e.1608488286.git.christophe.leroy@csgroup.eu>
On Sun, 20 Dec 2020 18:18:26 +0000 (UTC), Christophe Leroy wrote:
> Force inlining of get_tb() in order to avoid getting
> following function in vdso32, leading to suboptimal
> performance in clock_gettime()
>
> 00000688 <.get_tb>:
> 688: 7c 6d 42 a6 mftbu r3
> 68c: 7c 8c 42 a6 mftb r4
> 690: 7d 2d 42 a6 mftbu r9
> 694: 7c 03 48 40 cmplw r3,r9
> 698: 40 e2 ff f0 bne+ 688 <.get_tb>
> 69c: 4e 80 00 20 blr
Applied to powerpc/fixes.
[1/1] powerpc/time: Force inlining of get_tb()
https://git.kernel.org/powerpc/c/0faa22f09caadc11af2aa7570870ebd2ac5b8170
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/32s: Fix RTAS machine check with VMAP stack
From: Michael Ellerman @ 2020-12-22 13:11 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Christophe Leroy,
Paul Mackerras
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <bc77d61d1c18940e456a2dee464f1e2eda65a3f0.1608621048.git.christophe.leroy@csgroup.eu>
On Tue, 22 Dec 2020 07:11:18 +0000 (UTC), Christophe Leroy wrote:
> When we have VMAP stack, exception prolog 1 sets r1, not r11.
Applied to powerpc/fixes.
[1/1] powerpc/32s: Fix RTAS machine check with VMAP stack
https://git.kernel.org/powerpc/c/9c7422b92cb27369653c371ad9c44a502e5eea8f
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/32: Fix vmap stack - Properly set r1 before activating MMU on syscall too
From: Michael Ellerman @ 2020-12-22 13:11 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Christophe Leroy,
Paul Mackerras
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <a3d819d5c348cee9783a311d5d3f3ba9b48fd219.1608531452.git.christophe.leroy@csgroup.eu>
On Mon, 21 Dec 2020 06:18:03 +0000 (UTC), Christophe Leroy wrote:
> We need r1 to be properly set before activating MMU, otherwise any new
> exception taken while saving registers into the stack in syscall
> prologs will use the user stack, which is wrong and will even lockup
> or crash when KUAP is selected.
>
> Do that by switching the meaning of r11 and r1 until we have saved r1
> to the stack: copy r1 into r11 and setup the new stack pointer in r1.
> To avoid complicating and impacting all generic and specific prolog
> code (and more), copy back r1 into r11 once r11 is save onto
> the stack.
>
> [...]
Applied to powerpc/fixes.
[1/1] powerpc/32: Fix vmap stack - Properly set r1 before activating MMU on syscall too
https://git.kernel.org/powerpc/c/d5c243989fb0cb03c74d7340daca3b819f706ee7
cheers
^ permalink raw reply
* Re: GIT kernel with the PowerPC updates 5.11-1 doesn't boot on a FSL P5040 board and in a virtual e5500 QEMU machine
From: Christian Zigotzky @ 2020-12-22 12:15 UTC (permalink / raw)
To: Christophe Leroy, Denis Kirjanov
Cc: Darren Stevens, linuxppc-dev, R.T.Dickinson, mad skateman
In-Reply-To: <8d25f58b-a7bf-4413-b8cc-ed3bd0107263@xenosoft.de>
Hello,
I compiled the latest Git kernel today and unfortunately the boot issue
still exists.
I was able to reduce the patch for reverting the changes. In this way we
know the problematic code now.
vdso-v2.patch:
diff -rupN a/arch/powerpc/kernel/vdso32/vgettimeofday.c
b/arch/powerpc/kernel/vdso32/vgettimeofday.c
--- a/arch/powerpc/kernel/vdso32/vgettimeofday.c 2020-12-19
00:01:16.829846652 +0100
+++ b/arch/powerpc/kernel/vdso32/vgettimeofday.c 2020-12-19
00:00:37.817369691 +0100
@@ -10,12 +10,6 @@ int __c_kernel_clock_gettime(clockid_t c
return __cvdso_clock_gettime32_data(vd, clock, ts);
}
-int __c_kernel_clock_gettime64(clockid_t clock, struct
__kernel_timespec *ts,
- const struct vdso_data *vd)
-{
- return __cvdso_clock_gettime_data(vd, clock, ts);
-}
-
int __c_kernel_gettimeofday(struct __kernel_old_timeval *tv, struct
timezone *tz,
const struct vdso_data *vd)
{
----
With this patch, the uImage boots without any problems on my FSL P5040
board and in a virtual e5500 QEMU machine. Please check the problematic
code.
Thanks,
Christian
On 19 December 2020 at 01:33pm, Christian Zigotzky wrote:
> On 19 December 2020 at 07:49am, Christophe Leroy wrote:
>>
>>
>> Le 18/12/2020 à 23:49, Christian Zigotzky a écrit :
>>> On 18 December 2020 at 10:25pm, Denis Kirjanov wrote:
>>> >
>>> >
>>> > On Friday, December 18, 2020, Christian Zigotzky
>>> <chzigotzky@xenosoft.de> wrote:
>>> >
>>> > Hello,
>>> >
>>> > I compiled the latest Git kernel with the new PowerPC updates
>>> 5.11-1 [1] today. Unfortunately this kernel doesn't boot on my FSL
>>> P5040 board [2] and in a virtual e5500 QEMU machine [3].
>>> >
>>> > I was able to revert the new PowerPC updates 5.11-1 [4] and
>>> after a new compiling, the kernel boots without any problems on my
>>> FSL P5040 board.
>>> >
>>> > Please check the new PowerPC updates 5.11-1.
>>> >
>>> >
>>> > Can you bisect the bad commit?
>>> >
>>> Hello Denis,
>>>
>>> I have bisected [5] and d0e3fc69d00d1f50d22d6b6acfc555ccda80ad1e
>>> (powerpc/vdso: Provide __kernel_clock_gettime64() on vdso32) [6] is
>>> the first bad commit.
>>>
>>> I was able to revert this bad commit and after a new compiling, the
>>> kernel boots without any problems.
>>
>> That's puzzling.
>>
>> Can you describe the symptoms exactly ? What do you mean by "the
>> kernel doesn't boot" ? Where and how does it stops booting ?
> It stops during the disk initialisation.
>>
>> This commit only adds a new VDSO call, for getting y2038 compliant
>> time. At the time I implemented it there was no libc using it yet. Is
>> your libc using it ?
> I tested it with ubuntu MATE 16.04.7 LTS (32-bit userland + 64-bit
> kernel) and with Debian Sid (MintPPC and Fienix 32-bit userland +
> 64-bit kernel) on my FSL P5040 board and in a virtual e5500 QEMU
> machine. How can I figure out if the libc use it?
>>
>> Where can I find all the elements you are using to boot with QEMU ?
>> Especially the file MintPPC32-X5000.img
> Download: http://www.xenosoft.de/MintPPC32-X5000.tar.gz (md5sum:
> b31c1c1ca1fcf5d4cdf110c4bce11654) The password for both 'root' and
> 'mintppc' is 'mintppc'.
>
> QEMU command with KVM on my P5040 board: qemu-system-ppc64 -M ppce500
> -cpu e5500 -enable-kvm -m 1024 -kernel uImage -drive
> format=raw,file=MintPPC32-X5000.img,index=0,if=virtio -netdev
> user,id=mynet0 -device e1000,netdev=mynet0 -append "rw root=/dev/vda"
> -device virtio-vga -device virtio-mouse-pci -device
> virtio-keyboard-pci -device pci-ohci,id=newusb -device
> usb-audio,bus=newusb.0 -smp 4
>
> QEMU command without KVM on macOS Intel: qemu-system-ppc64 -M ppce500
> -cpu e5500 -m 1024 -kernel uImage -drive
> format=raw,file=MintPPC32-X5000.img,index=0,if=virtio -netdev
> user,id=mynet0 -device virtio-net-pci,netdev=mynet0 -append "rw
> root=/dev/vda" -device virtio-vga -usb -device usb-ehci,id=ehci
> -device usb-tablet -device virtio-keyboard-pci -smp 4 -vnc :1
>>
>> Can you also share you kernel config
> See attachment.
>>
>> Thanks
>> Christophe
> Thanks
> Christian
>
^ permalink raw reply
* [PATCH] powerpc/32s: Fix RTAS machine check with VMAP stack
From: Christophe Leroy @ 2020-12-22 7:11 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman
Cc: linuxppc-dev, linux-kernel
When we have VMAP stack, exception prolog 1 sets r1, not r11.
Fixes: da7bb43ab9da ("powerpc/32: Fix vmap stack - Properly set r1 before activating MMU")
Fixes: d2e006036082 ("powerpc/32: Use SPRN_SPRG_SCRATCH2 in exception prologs")
Cc: stable@vger.kernel.org
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/kernel/head_book3s_32.S | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 349bf3f0c3af..fbc48a500846 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -260,9 +260,16 @@ __secondary_hold_acknowledge:
MachineCheck:
EXCEPTION_PROLOG_0
#ifdef CONFIG_PPC_CHRP
+#ifdef CONFIG_VMAP_STACK
+ mtspr SPRN_SPRG_SCRATCH2,r1
+ mfspr r1, SPRN_SPRG_THREAD
+ lwz r1, RTAS_SP(r1)
+ cmpwi cr1, r1, 0
+#else
mfspr r11, SPRN_SPRG_THREAD
lwz r11, RTAS_SP(r11)
cmpwi cr1, r11, 0
+#endif
bne cr1, 7f
#endif /* CONFIG_PPC_CHRP */
EXCEPTION_PROLOG_1 for_rtas=1
--
2.25.0
^ permalink raw reply related
* [Bug 210749] sysfs: cannot create duplicate filename '/bus/nvmem/devices/module-vpd'
From: bugzilla-daemon @ 2020-12-22 6:51 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <bug-210749-206035@https.bugzilla.kernel.org/>
https://bugzilla.kernel.org/show_bug.cgi?id=210749
--- Comment #2 from Erhard F. (erhard_f@mailbox.org) ---
Created attachment 294285
--> https://bugzilla.kernel.org/attachment.cgi?id=294285&action=edit
dmesg (kernel 5.9.16, Talos II)
Hmm... does not seem to happen on kernel 5.9.x.
--
You may reply to this email to add a comment.
You are receiving this mail because:
You are watching the assignee of the bug.
^ permalink raw reply
* Re: [PATCH 3/3] ibmvfc: use correlation token to tag commands
From: Nathan Chancellor @ 2020-12-22 6:24 UTC (permalink / raw)
To: Tyrel Datwyler
Cc: martin.petersen, linux-scsi, linux-kernel, james.bottomley,
clang-built-linux, brking, linuxppc-dev
In-Reply-To: <20201117185031.129939-3-tyreld@linux.ibm.com>
On Tue, Nov 17, 2020 at 12:50:31PM -0600, Tyrel Datwyler wrote:
> The vfcFrame correlation field is 64bit handle that is intended to trace
> I/O operations through both the client stack and VIOS stack when the
> underlying physical FC adapter supports tagging.
>
> Tag vfcFrames with the associated ibmvfc_event pointer handle.
>
> Signed-off-by: Tyrel Datwyler <tyreld@linux.ibm.com>
> ---
> drivers/scsi/ibmvscsi/ibmvfc.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/scsi/ibmvscsi/ibmvfc.c b/drivers/scsi/ibmvscsi/ibmvfc.c
> index 0cab4b852b48..3922441a117d 100644
> --- a/drivers/scsi/ibmvscsi/ibmvfc.c
> +++ b/drivers/scsi/ibmvscsi/ibmvfc.c
> @@ -1693,6 +1693,8 @@ static int ibmvfc_queuecommand_lck(struct scsi_cmnd *cmnd,
> vfc_cmd->iu.pri_task_attr = IBMVFC_SIMPLE_TASK;
> }
>
> + vfc_cmd->correlation = cpu_to_be64(evt);
> +
> if (likely(!(rc = ibmvfc_map_sg_data(cmnd, evt, vfc_cmd, vhost->dev))))
> return ibmvfc_send_event(evt, vhost, 0);
>
> @@ -2370,6 +2372,8 @@ static int ibmvfc_abort_task_set(struct scsi_device *sdev)
> tmf->iu.tmf_flags = IBMVFC_ABORT_TASK_SET;
> evt->sync_iu = &rsp_iu;
>
> + tmf->correlation = cpu_to_be64(evt);
> +
> init_completion(&evt->comp);
> rsp_rc = ibmvfc_send_event(evt, vhost, default_timeout);
> }
> --
> 2.27.0
>
This patch introduces a clang warning, is this intentional behavior?
$ make -skj"$(nproc)" ARCH=powerpc CROSS_COMPILE=powerpc64le-linux-gnu- LLVM=1 O=out distclean ppc64le_defconfig drivers/scsi/ibmvscsi/ibmvfc.o
Using ../arch/powerpc/configs/ppc64_defconfig as base
Merging ../arch/powerpc/configs/le.config
#
# merged configuration written to .config (needs make)
#
../drivers/scsi/ibmvscsi/ibmvfc.c:1747:25: warning: incompatible pointer to integer conversion passing 'struct ibmvfc_event *' to parameter of type '__u64' (aka 'unsigned long long') [-Wint-conversion]
vfc_cmd->correlation = cpu_to_be64(evt);
^~~~~~~~~~~~~~~~
../include/linux/byteorder/generic.h:92:21: note: expanded from macro 'cpu_to_be64'
#define cpu_to_be64 __cpu_to_be64
^
../include/uapi/linux/byteorder/little_endian.h:37:52: note: expanded from macro '__cpu_to_be64'
#define __cpu_to_be64(x) ((__force __be64)__swab64((x)))
~~~~~~~~~^~~~
../include/uapi/linux/swab.h:133:12: note: expanded from macro '__swab64'
__fswab64(x))
^
../include/uapi/linux/swab.h:66:57: note: passing argument to parameter 'val' here
static inline __attribute_const__ __u64 __fswab64(__u64 val)
^
../drivers/scsi/ibmvscsi/ibmvfc.c:2421:22: warning: incompatible pointer to integer conversion passing 'struct ibmvfc_event *' to parameter of type '__u64' (aka 'unsigned long long') [-Wint-conversion]
tmf->correlation = cpu_to_be64(evt);
^~~~~~~~~~~~~~~~
../include/linux/byteorder/generic.h:92:21: note: expanded from macro 'cpu_to_be64'
#define cpu_to_be64 __cpu_to_be64
^
../include/uapi/linux/byteorder/little_endian.h:37:52: note: expanded from macro '__cpu_to_be64'
#define __cpu_to_be64(x) ((__force __be64)__swab64((x)))
~~~~~~~~~^~~~
../include/uapi/linux/swab.h:133:12: note: expanded from macro '__swab64'
__fswab64(x))
^
../include/uapi/linux/swab.h:66:57: note: passing argument to parameter 'val' here
static inline __attribute_const__ __u64 __fswab64(__u64 val)
^
2 warnings generated.
Cheers,
Nathan
^ permalink raw reply
* Re: [PATCH 3/3] powerpc: rewrite atomics to use ARCH_ATOMIC
From: Nicholas Piggin @ 2020-12-22 3:52 UTC (permalink / raw)
To: Boqun Feng
Cc: Christophe Leroy, linux-arch, Arnd Bergmann, Alexey Kardashevskiy,
linux-kernel, Peter Zijlstra, Will Deacon, linuxppc-dev
In-Reply-To: <20201113153012.GD286534@boqun-archlinux>
Excerpts from Boqun Feng's message of November 14, 2020 1:30 am:
> Hi Nicholas,
>
> On Wed, Nov 11, 2020 at 09:07:23PM +1000, Nicholas Piggin wrote:
>> All the cool kids are doing it.
>>
>> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
>> ---
>> arch/powerpc/include/asm/atomic.h | 681 ++++++++++-------------------
>> arch/powerpc/include/asm/cmpxchg.h | 62 +--
>> 2 files changed, 248 insertions(+), 495 deletions(-)
>>
>> diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
>> index 8a55eb8cc97b..899aa2403ba7 100644
>> --- a/arch/powerpc/include/asm/atomic.h
>> +++ b/arch/powerpc/include/asm/atomic.h
>> @@ -11,185 +11,285 @@
>> #include <asm/cmpxchg.h>
>> #include <asm/barrier.h>
>>
>> +#define ARCH_ATOMIC
>> +
>> +#ifndef CONFIG_64BIT
>> +#include <asm-generic/atomic64.h>
>> +#endif
>> +
>> /*
>> * Since *_return_relaxed and {cmp}xchg_relaxed are implemented with
>> * a "bne-" instruction at the end, so an isync is enough as a acquire barrier
>> * on the platform without lwsync.
>> */
>> #define __atomic_acquire_fence() \
>> - __asm__ __volatile__(PPC_ACQUIRE_BARRIER "" : : : "memory")
>> + asm volatile(PPC_ACQUIRE_BARRIER "" : : : "memory")
>>
>> #define __atomic_release_fence() \
>> - __asm__ __volatile__(PPC_RELEASE_BARRIER "" : : : "memory")
>> + asm volatile(PPC_RELEASE_BARRIER "" : : : "memory")
>>
>> -static __inline__ int atomic_read(const atomic_t *v)
>> -{
>> - int t;
>> +#define __atomic_pre_full_fence smp_mb
>>
>> - __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter));
>> +#define __atomic_post_full_fence smp_mb
>>
Thanks for the review.
> Do you need to define __atomic_{pre,post}_full_fence for PPC? IIRC, they
> are default smp_mb__{before,atomic}_atomic(), so are smp_mb() defautly
> on PPC.
Okay I didn't realise that's not required.
>> - return t;
>> +#define arch_atomic_read(v) __READ_ONCE((v)->counter)
>> +#define arch_atomic_set(v, i) __WRITE_ONCE(((v)->counter), (i))
>> +#ifdef CONFIG_64BIT
>> +#define ATOMIC64_INIT(i) { (i) }
>> +#define arch_atomic64_read(v) __READ_ONCE((v)->counter)
>> +#define arch_atomic64_set(v, i) __WRITE_ONCE(((v)->counter), (i))
>> +#endif
>> +
> [...]
>>
>> +#define ATOMIC_FETCH_OP_UNLESS_RELAXED(name, type, dtype, width, asm_op) \
>> +static inline int arch_##name##_relaxed(type *v, dtype a, dtype u) \
>
> I don't think we have atomic_fetch_*_unless_relaxed() at atomic APIs,
> ditto for:
>
> atomic_fetch_add_unless_relaxed()
> atomic_inc_not_zero_relaxed()
> atomic_dec_if_positive_relaxed()
>
> , and we don't have the _acquire() and _release() variants for them
> either, and if you don't define their fully-ordered version (e.g.
> atomic_inc_not_zero()), atomic-arch-fallback.h will use read and cmpxchg
> to implement them, and I think not what we want.
Okay. How can those be added? The atoimc generation is pretty
complicated.
> [...]
>>
>> #endif /* __KERNEL__ */
>> #endif /* _ASM_POWERPC_ATOMIC_H_ */
>> diff --git a/arch/powerpc/include/asm/cmpxchg.h b/arch/powerpc/include/asm/cmpxchg.h
>> index cf091c4c22e5..181f7e8b3281 100644
>> --- a/arch/powerpc/include/asm/cmpxchg.h
>> +++ b/arch/powerpc/include/asm/cmpxchg.h
>> @@ -192,7 +192,7 @@ __xchg_relaxed(void *ptr, unsigned long x, unsigned int size)
>> (unsigned long)_x_, sizeof(*(ptr))); \
>> })
>>
>> -#define xchg_relaxed(ptr, x) \
>> +#define arch_xchg_relaxed(ptr, x) \
>> ({ \
>> __typeof__(*(ptr)) _x_ = (x); \
>> (__typeof__(*(ptr))) __xchg_relaxed((ptr), \
>> @@ -448,35 +448,7 @@ __cmpxchg_relaxed(void *ptr, unsigned long old, unsigned long new,
>> return old;
>> }
>>
>> -static __always_inline unsigned long
>> -__cmpxchg_acquire(void *ptr, unsigned long old, unsigned long new,
>> - unsigned int size)
>> -{
>> - switch (size) {
>> - case 1:
>> - return __cmpxchg_u8_acquire(ptr, old, new);
>> - case 2:
>> - return __cmpxchg_u16_acquire(ptr, old, new);
>> - case 4:
>> - return __cmpxchg_u32_acquire(ptr, old, new);
>> -#ifdef CONFIG_PPC64
>> - case 8:
>> - return __cmpxchg_u64_acquire(ptr, old, new);
>> -#endif
>> - }
>> - BUILD_BUG_ON_MSG(1, "Unsupported size for __cmpxchg_acquire");
>> - return old;
>> -}
>> -#define cmpxchg(ptr, o, n) \
>> - ({ \
>> - __typeof__(*(ptr)) _o_ = (o); \
>> - __typeof__(*(ptr)) _n_ = (n); \
>> - (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
>> - (unsigned long)_n_, sizeof(*(ptr))); \
>> - })
>> -
>> -
>
> If you remove {atomic_}_cmpxchg_{,_acquire}() and use the version
> provided by atomic-arch-fallback.h, then a fail cmpxchg or
> cmpxchg_acquire() will still result into a full barrier or a acquire
> barrier after the RMW operation, the barrier is not necessary and
> probably this is not what we want?
Why is that done? That seems like a very subtle difference. Shouldn't
the fallback version skip the barrier?
Thanks,
Nick
^ permalink raw reply
* Re: [RFC PATCH 3/5] powerpc/64s: add CONFIG_PPC_NMMU for nest MMU support
From: Nicholas Piggin @ 2020-12-22 3:37 UTC (permalink / raw)
To: Christophe Leroy, linuxppc-dev
In-Reply-To: <7860a2b3-205f-9b27-42cb-e298264f8253@csgroup.eu>
Excerpts from Christophe Leroy's message of December 20, 2020 9:43 pm:
>
>
> Le 20/12/2020 à 00:48, Nicholas Piggin a écrit :
>> This allows some nest MMU features to be compiled away if coprocessor
>> support is not selected.
>>
>> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
>> ---
>> arch/powerpc/Kconfig | 1 +
>> arch/powerpc/include/asm/book3s/64/mmu.h | 2 ++
>> arch/powerpc/include/asm/book3s/64/tlbflush.h | 2 ++
>> arch/powerpc/include/asm/mmu_context.h | 5 +++--
>> arch/powerpc/platforms/Kconfig | 3 +++
>> arch/powerpc/platforms/powernv/Kconfig | 1 +
>> 6 files changed, 12 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
>> index ae7391627054..4376bf4c53b4 100644
>> --- a/arch/powerpc/Kconfig
>> +++ b/arch/powerpc/Kconfig
>> @@ -888,6 +888,7 @@ config PPC_PROT_SAO_LPAR
>>
>> config PPC_COPRO_BASE
>> bool
>> + select PPC_NMMU if PPC_BOOK3S_64
>>
>> config SCHED_SMT
>> bool "SMT (Hyperthreading) scheduler support"
>> diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
>> index 995bbcdd0ef8..07850d68a624 100644
>> --- a/arch/powerpc/include/asm/book3s/64/mmu.h
>> +++ b/arch/powerpc/include/asm/book3s/64/mmu.h
>> @@ -103,8 +103,10 @@ typedef struct {
>> /* Number of bits in the mm_cpumask */
>> atomic_t active_cpus;
>>
>> +#ifdef CONFIG_PPC_NMMU
>> /* Number of users of the external (Nest) MMU */
>> atomic_t copros;
>> +#endif
>>
>> /* Number of user space windows opened in process mm_context */
>> atomic_t vas_windows;
>> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/powerpc/include/asm/book3s/64/tlbflush.h
>> index 0a7431e954c6..c70a82851f78 100644
>> --- a/arch/powerpc/include/asm/book3s/64/tlbflush.h
>> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h
>> @@ -16,8 +16,10 @@ enum {
>>
>> static inline bool mm_has_nmmu(struct mm_struct *mm)
>> {
>> +#ifdef CONFIG_PPC_NMMU
>> if (unlikely(atomic_read(&mm->context.copros) > 0))
>> return true;
>> +#endif
>> return false;
>> }
>>
>> diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
>> index d5821834dba9..53eac0cc4929 100644
>> --- a/arch/powerpc/include/asm/mmu_context.h
>> +++ b/arch/powerpc/include/asm/mmu_context.h
>> @@ -143,6 +143,7 @@ static inline void dec_mm_active_cpus(struct mm_struct *mm)
>> atomic_dec(&mm->context.active_cpus);
>> }
>>
>> +#ifdef CONFIG_PPC_NMMU
>> static inline void mm_context_add_copro(struct mm_struct *mm)
>> {
>> /*
>> @@ -187,6 +188,7 @@ static inline void mm_context_remove_copro(struct mm_struct *mm)
>> dec_mm_active_cpus(mm);
>> }
>> }
>> +#endif
>>
>> /*
>> * vas_windows counter shows number of open windows in the mm
>> @@ -218,8 +220,7 @@ static inline void mm_context_remove_vas_window(struct mm_struct *mm)
>> #else
>> static inline void inc_mm_active_cpus(struct mm_struct *mm) { }
>> static inline void dec_mm_active_cpus(struct mm_struct *mm) { }
>> -static inline void mm_context_add_copro(struct mm_struct *mm) { }
>> -static inline void mm_context_remove_copro(struct mm_struct *mm) { }
>
> Are you sure you can remove those ?
> If so, I think it belongs to another patch, I can't see how the new PPC_NMMU would allow that by itself.
Yeah possibly a separate patch. Nothing except 64s should compile such
code though, I think?
Thanks,
Nick
^ permalink raw reply
* Re: [RFC PATCH 1/5] powerpc/64s: update_mmu_cache inline the radix test
From: Nicholas Piggin @ 2020-12-22 3:32 UTC (permalink / raw)
To: Christophe Leroy, linuxppc-dev
In-Reply-To: <7190cf34-af03-ca35-d2b5-aa152d300ec0@csgroup.eu>
Excerpts from Christophe Leroy's message of December 20, 2020 9:37 pm:
>
>
> Le 20/12/2020 à 00:48, Nicholas Piggin a écrit :
>> This allows the function to be entirely noped if hash support is
>> compiled out (not possible yet).
>>
>> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
>> ---
>> arch/powerpc/include/asm/book3s/pgtable.h | 11 ++++++++++-
>> arch/powerpc/mm/book3s32/mmu.c | 4 ++--
>> arch/powerpc/mm/book3s64/hash_utils.c | 7 ++-----
>> 3 files changed, 14 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/powerpc/include/asm/book3s/pgtable.h b/arch/powerpc/include/asm/book3s/pgtable.h
>> index 0e1263455d73..914e9fc7b069 100644
>> --- a/arch/powerpc/include/asm/book3s/pgtable.h
>> +++ b/arch/powerpc/include/asm/book3s/pgtable.h
>> @@ -35,7 +35,16 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
>> * corresponding HPTE into the hash table ahead of time, instead of
>> * waiting for the inevitable extra hash-table miss exception.
>> */
>> -void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep);
>> +void hash__update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep);
>> +
>> +static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
>> +{
>> +#ifdef CONFIG_PPC64
>
> You shouldn't need that ifdef. radix_enabled() is always defined.
True, thanks.
>> + if (radix_enabled())
>> + return;
>> +#endif
>> + hash__update_mmu_cache(vma, address, ptep);
>> +}
>>
>> #endif /* __ASSEMBLY__ */
>> #endif
>> diff --git a/arch/powerpc/mm/book3s32/mmu.c b/arch/powerpc/mm/book3s32/mmu.c
>> index 859e5bd603ac..c5a570ca37ff 100644
>> --- a/arch/powerpc/mm/book3s32/mmu.c
>> +++ b/arch/powerpc/mm/book3s32/mmu.c
>> @@ -325,8 +325,8 @@ static void hash_preload(struct mm_struct *mm, unsigned long ea)
>> *
>> * This must always be called with the pte lock held.
>> */
>> -void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
>> - pte_t *ptep)
>> +void hash__update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
>> + pte_t *ptep)
>
> Now the limit is 100 chars per line. This should fit on a single line I think.
I never quite know what to do here. The Linux limit is 100 but 80 is
still preferred AFAIK (e.g., don't make lots of lines beyond 80), but
80-100 can be used in some cases when splitting the line doesn't improve
readability on 80 colums.
This does (slightly) improve readability.
Thanks,
Nick
>
>> {
>> if (!mmu_has_feature(MMU_FTR_HPTE_TABLE))
>> return;
>> diff --git a/arch/powerpc/mm/book3s64/hash_utils.c b/arch/powerpc/mm/book3s64/hash_utils.c
>> index 73b06adb6eeb..d52a3dee7cf2 100644
>> --- a/arch/powerpc/mm/book3s64/hash_utils.c
>> +++ b/arch/powerpc/mm/book3s64/hash_utils.c
>> @@ -1667,8 +1667,8 @@ static void hash_preload(struct mm_struct *mm, pte_t *ptep, unsigned long ea,
>> *
>> * This must always be called with the pte lock held.
>> */
>> -void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
>> - pte_t *ptep)
>> +void hash__update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
>> + pte_t *ptep)
>
> Now the limit is 100 chars per line. This should fit on a single line I think.
>
>> {
>> /*
>> * We don't need to worry about _PAGE_PRESENT here because we are
>> @@ -1677,9 +1677,6 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
>> unsigned long trap;
>> bool is_exec;
>>
>> - if (radix_enabled())
>> - return;
>> -
>> /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */
>> if (!pte_young(*ptep) || address >= TASK_SIZE)
>> return;
>>
>
^ permalink raw reply
* Re: [PATCH] powerpc: always enable queued spinlocks for 64s, disable for others
From: Nicholas Piggin @ 2020-12-22 3:28 UTC (permalink / raw)
To: Christophe Leroy, linuxppc-dev
In-Reply-To: <769ec5dd-8e74-56cb-a3fe-3b657bb3d14c@csgroup.eu>
Excerpts from Christophe Leroy's message of December 21, 2020 4:04 pm:
>
>
> Le 21/12/2020 à 04:22, Nicholas Piggin a écrit :
>> Queued spinlocks have shown to have good performance and fairness
>> properties even on smaller (2 socket) POWER systems. This selects
>> them automatically for 64s. For other platforms they are de-selected,
>> the standard spinlock is far simpler and smaller code, and single
>> chips with a handful of cores is unlikely to show any improvement.
>>
>> CONFIG_EXPERT still allows this to be changed, e.g., to help debug
>> performance or correctness issues.
>>
>> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
>> ---
>> arch/powerpc/Kconfig | 8 +++-----
>> 1 file changed, 3 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
>> index ae7391627054..1f9f9e64d638 100644
>> --- a/arch/powerpc/Kconfig
>> +++ b/arch/powerpc/Kconfig
>> @@ -255,6 +255,7 @@ config PPC
>> select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
>> select PCI_SYSCALL if PCI
>> select PPC_DAWR if PPC64
>> + select PPC_QUEUED_SPINLOCKS if !EXPERT && PPC_BOOK3S_64 && SMP
>
> The condition is a bit complicated, and it doesn't set it to Y by default when EXPERT is selected.
Yeah, I don't know how to do that (switch people's oldconfig from =N to
=Y) otherwise (without renaming the option). I think it's enough though,
experts should have said yes already :)
>
>> select RTC_LIB
>> select SPARSE_IRQ
>> select SYSCTL_EXCEPTION_TRACE
>> @@ -506,16 +507,13 @@ config HOTPLUG_CPU
>> config PPC_QUEUED_SPINLOCKS
>> bool "Queued spinlocks"
>> depends on SMP
>> + depends on EXPERT || PPC_BOOK3S_64
>> +
>
> I would do:
>
> config PPC_QUEUED_SPINLOCKS
> bool "Queued spinlocks" if EXPERT
> depends on SMP
> default PPC_BOOK3S_64
That's nicer.
Thanks,
Nick
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