* [PATCH] scsi: ibmvfc: Switch to using the new API kobj_to_dev()
From: Yang Li @ 2021-02-22 6:47 UTC (permalink / raw)
To: martin.petersen
Cc: tyreld, linux-scsi, jejb, linux-kernel, paulus, Yang Li,
linuxppc-dev
fixed the following coccicheck:
./drivers/scsi/ibmvscsi/ibmvfc.c:3161:60-61: WARNING opportunity for
kobj_to_dev()
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
---
drivers/scsi/ibmvscsi/ibmvfc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/ibmvscsi/ibmvfc.c b/drivers/scsi/ibmvscsi/ibmvfc.c
index 65f168c..e947149 100644
--- a/drivers/scsi/ibmvscsi/ibmvfc.c
+++ b/drivers/scsi/ibmvscsi/ibmvfc.c
@@ -3158,7 +3158,7 @@ static ssize_t ibmvfc_read_trace(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
- struct device *dev = container_of(kobj, struct device, kobj);
+ struct device *dev = kobj_to_dev(kobj);
struct Scsi_Host *shost = class_to_shost(dev);
struct ibmvfc_host *vhost = shost_priv(shost);
unsigned long flags = 0;
--
1.8.3.1
^ permalink raw reply related
* Re: [PATCH v4 2/3] KVM: PPC: Book3S HV: Add support for H_RPT_INVALIDATE
From: Bharata B Rao @ 2021-02-22 6:46 UTC (permalink / raw)
To: David Gibson; +Cc: farosas, aneesh.kumar, npiggin, kvm-ppc, linuxppc-dev
In-Reply-To: <YCxlb133Hf6hLjuD@yekko.fritz.box>
On Wed, Feb 17, 2021 at 11:38:07AM +1100, David Gibson wrote:
> On Mon, Feb 15, 2021 at 12:05:41PM +0530, Bharata B Rao wrote:
> > Implement H_RPT_INVALIDATE hcall and add KVM capability
> > KVM_CAP_PPC_RPT_INVALIDATE to indicate the support for the same.
> >
> > This hcall does two types of TLB invalidations:
> >
> > 1. Process-scoped invalidations for guests with LPCR[GTSE]=0.
> > This is currently not used in KVM as GTSE is not usually
> > disabled in KVM.
> > 2. Partition-scoped invalidations that an L1 hypervisor does on
> > behalf of an L2 guest. This replaces the uses of the existing
> > hcall H_TLB_INVALIDATE.
> >
> > In order to handle process scoped invalidations of L2, we
> > intercept the nested exit handling code in L0 only to handle
> > H_TLB_INVALIDATE hcall.
> >
> > Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
> > ---
> > Documentation/virt/kvm/api.rst | 17 +++++
> > arch/powerpc/include/asm/kvm_book3s.h | 3 +
> > arch/powerpc/include/asm/mmu_context.h | 11 +++
> > arch/powerpc/kvm/book3s_hv.c | 91 ++++++++++++++++++++++++
> > arch/powerpc/kvm/book3s_hv_nested.c | 96 ++++++++++++++++++++++++++
> > arch/powerpc/kvm/powerpc.c | 3 +
> > arch/powerpc/mm/book3s64/radix_tlb.c | 25 +++++++
> > include/uapi/linux/kvm.h | 1 +
> > 8 files changed, 247 insertions(+)
> >
> > diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
> > index 99ceb978c8b0..416c36aa35d4 100644
> > --- a/Documentation/virt/kvm/api.rst
> > +++ b/Documentation/virt/kvm/api.rst
> > @@ -6038,6 +6038,23 @@ KVM_EXIT_X86_RDMSR and KVM_EXIT_X86_WRMSR exit notifications which user space
> > can then handle to implement model specific MSR handling and/or user notifications
> > to inform a user that an MSR was not handled.
> >
> > +7.22 KVM_CAP_PPC_RPT_INVALIDATE
> > +------------------------------
> > +
> > +:Capability: KVM_CAP_PPC_RPT_INVALIDATE
> > +:Architectures: ppc
> > +:Type: vm
> > +
> > +This capability indicates that the kernel is capable of handling
> > +H_RPT_INVALIDATE hcall.
> > +
> > +In order to enable the use of H_RPT_INVALIDATE in the guest,
> > +user space might have to advertise it for the guest. For example,
> > +IBM pSeries (sPAPR) guest starts using it if "hcall-rpt-invalidate" is
> > +present in the "ibm,hypertas-functions" device-tree property.
> > +
> > +This capability is always enabled.
>
> I guess that means it's always enabled when it's available - I'm
> pretty sure it won't be enabled on POWER8 or on PR KVM.
Correct, will reword this and restrict this to POWER9, radix etc
>
> > +
> > 8. Other capabilities.
> > ======================
> >
> > diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
> > index d32ec9ae73bd..0f1c5fa6e8ce 100644
> > --- a/arch/powerpc/include/asm/kvm_book3s.h
> > +++ b/arch/powerpc/include/asm/kvm_book3s.h
> > @@ -298,6 +298,9 @@ void kvmhv_set_ptbl_entry(unsigned int lpid, u64 dw0, u64 dw1);
> > void kvmhv_release_all_nested(struct kvm *kvm);
> > long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu);
> > long kvmhv_do_nested_tlbie(struct kvm_vcpu *vcpu);
> > +long kvmhv_h_rpti_nested(struct kvm_vcpu *vcpu, unsigned long lpid,
> > + unsigned long type, unsigned long pg_sizes,
> > + unsigned long start, unsigned long end);
> > int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu,
> > u64 time_limit, unsigned long lpcr);
> > void kvmhv_save_hv_regs(struct kvm_vcpu *vcpu, struct hv_guest_state *hr);
> > diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
> > index d5821834dba9..fbf3b5b45fe9 100644
> > --- a/arch/powerpc/include/asm/mmu_context.h
> > +++ b/arch/powerpc/include/asm/mmu_context.h
> > @@ -124,8 +124,19 @@ static inline bool need_extra_context(struct mm_struct *mm, unsigned long ea)
> >
> > #if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) && defined(CONFIG_PPC_RADIX_MMU)
> > extern void radix_kvm_prefetch_workaround(struct mm_struct *mm);
> > +void do_h_rpt_invalidate(unsigned long pid, unsigned long lpid,
> > + unsigned long type, unsigned long page_size,
> > + unsigned long psize, unsigned long start,
> > + unsigned long end);
> > #else
> > static inline void radix_kvm_prefetch_workaround(struct mm_struct *mm) { }
> > +static inline void do_h_rpt_invalidate(unsigned long pid,
> > + unsigned long lpid,
> > + unsigned long type,
> > + unsigned long page_size,
> > + unsigned long psize,
> > + unsigned long start,
> > + unsigned long end) { }
> > #endif
> >
> > extern void switch_cop(struct mm_struct *next);
> > diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> > index 6f612d240392..802cb77c39cc 100644
> > --- a/arch/powerpc/kvm/book3s_hv.c
> > +++ b/arch/powerpc/kvm/book3s_hv.c
> > @@ -904,6 +904,64 @@ static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
> > return yield_count;
> > }
> >
> > +static void do_h_rpt_invalidate_prs(unsigned long pid, unsigned long lpid,
> > + unsigned long type, unsigned long pg_sizes,
> > + unsigned long start, unsigned long end)
> > +{
> > + unsigned long psize;
> > +
> > + if (pg_sizes & H_RPTI_PAGE_64K) {
> > + psize = rpti_pgsize_to_psize(pg_sizes & H_RPTI_PAGE_64K);
> > + do_h_rpt_invalidate(pid, lpid, type, (1UL << 16), psize,
> > + start, end);
> > + }
> > +
> > + if (pg_sizes & H_RPTI_PAGE_2M) {
> > + psize = rpti_pgsize_to_psize(pg_sizes & H_RPTI_PAGE_2M);
> > + do_h_rpt_invalidate(pid, lpid, type, (1UL << 21), psize,
> > + start, end);
> > + }
> > +
> > + if (pg_sizes & H_RPTI_PAGE_1G) {
> > + psize = rpti_pgsize_to_psize(pg_sizes & H_RPTI_PAGE_1G);
> > + do_h_rpt_invalidate(pid, lpid, type, (1UL << 30), psize,
> > + start, end);
> > + }
>
> Hrm. Here you're stepping through the hcall defined pagesizes, then
> mapping each one to the Linux internal page size defs.
>
> It might be more elegant to step through mmu_psize_defs table, and
> conditionally performan an invalidate on that pagesize if the
> corresponding bit in pg_sizes is set (as noted earlier you could
> easily add the H_RPTI_PAGE bit to the table). That way it's a direct
> table lookup rather than a bunch of ifs or switches.
Yes, let me give this a try.
>
> > +}
> > +
> > +static long kvmppc_h_rpt_invalidate(struct kvm_vcpu *vcpu,
> > + unsigned long pid, unsigned long target,
> > + unsigned long type, unsigned long pg_sizes,
> > + unsigned long start, unsigned long end)
> > +{
> > + if (!kvm_is_radix(vcpu->kvm))
> > + return H_UNSUPPORTED;
> > +
> > + if (kvmhv_on_pseries())
> > + return H_UNSUPPORTED;
>
> This doesn't seem quite right. If you have multiply nested guests,
> won't the L2 be issueing H_RPT_INVALIDATE hcalls to the L1 on behalf
> of the L3? The L1 would have to implement them by calling the L0, but
> the L1 can't just reject them, no?
>
> Likewise for the !H_RPTI_TYPE_NESTED case, but on what happens to be a
> nested guest in any case, couldn't this case legitimately arise and
> need to be handled?
The approach is to handle this hcall on behalf of all the nested
guests in L0 only. I am intercepting the nested exit path precisely
for this as shown in the below hunk.
> > @@ -1573,6 +1640,30 @@ static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)
> > if (!xics_on_xive())
> > kvmppc_xics_rm_complete(vcpu, 0);
> > break;
> > + case BOOK3S_INTERRUPT_SYSCALL:
> > + {
> > + unsigned long req = kvmppc_get_gpr(vcpu, 3);
> > +
> > + if (req != H_RPT_INVALIDATE) {
> > + r = RESUME_HOST;
> > + break;
> > + }
> > +
> > + /*
> > + * The H_RPT_INVALIDATE hcalls issued by nested
> > + * guest for process scoped invalidations when
> > + * GTSE=0 are handled here.
> > + */
> > + do_h_rpt_invalidate_prs(kvmppc_get_gpr(vcpu, 4),
> > + vcpu->arch.nested->shadow_lpid,
> > + kvmppc_get_gpr(vcpu, 5),
> > + kvmppc_get_gpr(vcpu, 6),
> > + kvmppc_get_gpr(vcpu, 7),
> > + kvmppc_get_gpr(vcpu, 8));
> > + kvmppc_set_gpr(vcpu, 3, H_SUCCESS);
> > + r = RESUME_GUEST;
> > + break;
> > + }
> > default:
> > r = RESUME_HOST;
> > break;
Thanks for your review.
Regards,
Bharata.
^ permalink raw reply
* [PATCH] ibmveth: Switch to using the new API kobj_to_dev()
From: Yang Li @ 2021-02-22 8:02 UTC (permalink / raw)
To: mpe
Cc: cforno12, linux-kernel, paulus, netdev, kuba, Yang Li,
linuxppc-dev, davem
fixed the following coccicheck:
./drivers/net/ethernet/ibm/ibmveth.c:1805:51-52: WARNING opportunity for
kobj_to_dev()
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
---
drivers/net/ethernet/ibm/ibmveth.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/ibm/ibmveth.c b/drivers/net/ethernet/ibm/ibmveth.c
index c3ec9ce..6e9572c 100644
--- a/drivers/net/ethernet/ibm/ibmveth.c
+++ b/drivers/net/ethernet/ibm/ibmveth.c
@@ -1801,8 +1801,7 @@ static ssize_t veth_pool_store(struct kobject *kobj, struct attribute *attr,
struct ibmveth_buff_pool *pool = container_of(kobj,
struct ibmveth_buff_pool,
kobj);
- struct net_device *netdev = dev_get_drvdata(
- container_of(kobj->parent, struct device, kobj));
+ struct net_device *netdev = dev_get_drvdata(kobj_to_dev(kobj->parent));
struct ibmveth_adapter *adapter = netdev_priv(netdev);
long value = simple_strtol(buf, NULL, 10);
long rc;
--
1.8.3.1
^ permalink raw reply related
* [PATCH] ASoC: fsl_sai: Add pm qos cpu latency support
From: Shengjiu Wang @ 2021-02-22 8:40 UTC (permalink / raw)
To: timur, nicoleotsuka, Xiubo.Lee, festevam, broonie, perex, tiwai,
alsa-devel
Cc: linuxppc-dev, linux-kernel
On SoCs such as i.MX7ULP, cpuidle has some levels which
may disable system/bus clocks, so need to add pm_qos to
prevent cpuidle from entering low level idles and make sure
system/bus clocks are enabled when sai is active.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
---
sound/soc/fsl/fsl_sai.c | 12 ++++++++++++
sound/soc/fsl/fsl_sai.h | 4 ++++
2 files changed, 16 insertions(+)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 5e65b456d3e2..a22679dea578 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -10,6 +10,7 @@
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
+#include <linux/pm_qos.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/slab.h>
@@ -1177,6 +1178,7 @@ static const struct fsl_sai_soc_data fsl_sai_vf610_data = {
.fifo_depth = 32,
.reg_offset = 0,
.mclk0_is_mclk1 = false,
+ .flags = 0,
};
static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = {
@@ -1185,6 +1187,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = {
.fifo_depth = 32,
.reg_offset = 0,
.mclk0_is_mclk1 = true,
+ .flags = 0,
};
static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = {
@@ -1193,6 +1196,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = {
.fifo_depth = 16,
.reg_offset = 8,
.mclk0_is_mclk1 = false,
+ .flags = PMQOS_CPU_LATENCY,
};
static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = {
@@ -1201,6 +1205,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = {
.fifo_depth = 128,
.reg_offset = 8,
.mclk0_is_mclk1 = false,
+ .flags = 0,
};
static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = {
@@ -1209,6 +1214,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = {
.fifo_depth = 64,
.reg_offset = 0,
.mclk0_is_mclk1 = false,
+ .flags = 0,
};
static const struct of_device_id fsl_sai_ids[] = {
@@ -1235,6 +1241,9 @@ static int fsl_sai_runtime_suspend(struct device *dev)
clk_disable_unprepare(sai->bus_clk);
+ if (sai->soc_data->flags & PMQOS_CPU_LATENCY)
+ cpu_latency_qos_remove_request(&sai->pm_qos_req);
+
regcache_cache_only(sai->regmap, true);
return 0;
@@ -1264,6 +1273,9 @@ static int fsl_sai_runtime_resume(struct device *dev)
goto disable_tx_clk;
}
+ if (sai->soc_data->flags & PMQOS_CPU_LATENCY)
+ cpu_latency_qos_add_request(&sai->pm_qos_req, 0);
+
regcache_cache_only(sai->regmap, false);
regcache_mark_dirty(sai->regmap);
regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), FSL_SAI_CSR_SR);
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index ff2619f1b214..bc60030967dd 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -216,12 +216,15 @@
#define FSL_SAI_MAXBURST_TX 6
#define FSL_SAI_MAXBURST_RX 6
+#define PMQOS_CPU_LATENCY BIT(0)
+
struct fsl_sai_soc_data {
bool use_imx_pcm;
bool use_edma;
bool mclk0_is_mclk1;
unsigned int fifo_depth;
unsigned int reg_offset;
+ unsigned int flags;
};
/**
@@ -273,6 +276,7 @@ struct fsl_sai {
struct snd_dmaengine_dai_dma_data dma_params_tx;
struct fsl_sai_verid verid;
struct fsl_sai_param param;
+ struct pm_qos_request pm_qos_req;
};
#define TX 1
--
2.27.0
^ permalink raw reply related
* [PATCH] ASoC: fsl_xcvr: move reset assert into runtime_resume
From: Shengjiu Wang @ 2021-02-22 9:09 UTC (permalink / raw)
To: timur, nicoleotsuka, Xiubo.Lee, festevam, broonie, perex, tiwai,
alsa-devel
Cc: linuxppc-dev, linux-kernel
From: Viorel Suman <viorel.suman@nxp.com>
Move reset assert into runtime_resume since we
cannot rely on reset assert state when the device
is put out from suspend.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
---
sound/soc/fsl/fsl_xcvr.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_xcvr.c b/sound/soc/fsl/fsl_xcvr.c
index dd228b421e2c..4857e0df8681 100644
--- a/sound/soc/fsl/fsl_xcvr.c
+++ b/sound/soc/fsl/fsl_xcvr.c
@@ -1243,10 +1243,6 @@ static __maybe_unused int fsl_xcvr_runtime_suspend(struct device *dev)
if (ret < 0)
dev_err(dev, "Failed to assert M0+ core: %d\n", ret);
- ret = reset_control_assert(xcvr->reset);
- if (ret < 0)
- dev_err(dev, "Failed to assert M0+ reset: %d\n", ret);
-
regcache_cache_only(xcvr->regmap, true);
clk_disable_unprepare(xcvr->spba_clk);
@@ -1262,6 +1258,12 @@ static __maybe_unused int fsl_xcvr_runtime_resume(struct device *dev)
struct fsl_xcvr *xcvr = dev_get_drvdata(dev);
int ret;
+ ret = reset_control_assert(xcvr->reset);
+ if (ret < 0) {
+ dev_err(dev, "Failed to assert M0+ reset: %d\n", ret);
+ return ret;
+ }
+
ret = clk_prepare_enable(xcvr->ipg_clk);
if (ret) {
dev_err(dev, "failed to start IPG clock.\n");
--
2.27.0
^ permalink raw reply related
* Re: [PATCH kernel] powerpc/iommu: Annotate nested lock for lockdep
From: Alexey Kardashevskiy @ 2021-02-22 9:35 UTC (permalink / raw)
To: Frederic Barrat, linuxppc-dev; +Cc: kvm-ppc
In-Reply-To: <7eaa747c-ebe1-14db-20f0-f115f9b85ba7@ozlabs.ru>
On 20/02/2021 14:49, Alexey Kardashevskiy wrote:
>
>
> On 18/02/2021 23:59, Frederic Barrat wrote:
>>
>>
>> On 16/02/2021 04:20, Alexey Kardashevskiy wrote:
>>> The IOMMU table is divided into pools for concurrent mappings and each
>>> pool has a separate spinlock. When taking the ownership of an IOMMU
>>> group
>>> to pass through a device to a VM, we lock these spinlocks which triggers
>>> a false negative warning in lockdep (below).
>>>
>>> This fixes it by annotating the large pool's spinlock as a nest lock.
>>>
>>> ===
>>> WARNING: possible recursive locking detected
>>> 5.11.0-le_syzkaller_a+fstn1 #100 Not tainted
>>> --------------------------------------------
>>> qemu-system-ppc/4129 is trying to acquire lock:
>>> c0000000119bddb0 (&(p->lock)/1){....}-{2:2}, at:
>>> iommu_take_ownership+0xac/0x1e0
>>>
>>> but task is already holding lock:
>>> c0000000119bdd30 (&(p->lock)/1){....}-{2:2}, at:
>>> iommu_take_ownership+0xac/0x1e0
>>>
>>> other info that might help us debug this:
>>> Possible unsafe locking scenario:
>>>
>>> CPU0
>>> ----
>>> lock(&(p->lock)/1);
>>> lock(&(p->lock)/1);
>>> ===
>>>
>>> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
>>> ---
>>> arch/powerpc/kernel/iommu.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
>>> index 557a09dd5b2f..2ee642a6731a 100644
>>> --- a/arch/powerpc/kernel/iommu.c
>>> +++ b/arch/powerpc/kernel/iommu.c
>>> @@ -1089,7 +1089,7 @@ int iommu_take_ownership(struct iommu_table *tbl)
>>> spin_lock_irqsave(&tbl->large_pool.lock, flags);
>>> for (i = 0; i < tbl->nr_pools; i++)
>>> - spin_lock(&tbl->pools[i].lock);
>>> + spin_lock_nest_lock(&tbl->pools[i].lock,
>>> &tbl->large_pool.lock);
>>
>>
>> We have the same pattern and therefore should have the same problem in
>> iommu_release_ownership().
>>
>> But as I understand, we're hacking our way around lockdep here, since
>> conceptually, those locks are independent. I was wondering why it
>> seems to fix it by worrying only about the large pool lock. That loop
>> can take many locks (up to 4 with current config). However, if the dma
>> window is less than 1GB, we would only have one, so it would make
>> sense for lockdep to stop complaining. Is it what happened? In which
>> case, this patch doesn't really fix it. Or I'm missing something :-)
>
>
> My rough undestanding is that when spin_lock_nest_lock is called first
> time, it does some magic with lockdep classes somewhere in
> __lock_acquire()/register_lock_class() and right after that the nested
> lock is not the same as before and it is annotated so we cannot lock
> nested locks without locking the nest lock first and no (re)annotation
> is needed. I'll try to poke this code once again and see, it is just was
> easier with p9/nested which is gone for now because of little snow in
> one of the southern states :)
Turns out I have good imagination and in fact it does print this huge
warning in the release hook as well so v2 is coming. Thanks,
>
>
>>
>> Fred
>>
>>
>>
>>> iommu_table_release_pages(tbl);
>>>
>
--
Alexey
^ permalink raw reply
* [GIT PULL] Please pull powerpc/linux.git powerpc-5.12-1 tag
From: Michael Ellerman @ 2021-02-22 12:05 UTC (permalink / raw)
To: Linus Torvalds
Cc: ananth, aik, kernelfans, cmr, zhengyongjun3, oohall, sandipan,
cy.fan, elfring, jiapeng.chong, skirmisher, f.fainelli,
unixbhaskar, eerykitty, aneesh.kumar, haren, ganeshgr, msuchanek,
nathanl, robh, kjain, npiggin, broonie, cai, clg, hbathini,
atrajeev, rdunlap, linux-kernel, fbarrat, po-hsu.lin,
linuxppc-dev
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256
Hi Linus,
Please pull powerpc updates for 5.12.
There will be a conflict with the devicetree tree. It's OK to just take their
side of the conflict, we'll fix up the minor behaviour change that causes in a
follow-up patch.
There's also a trivial conflict with the spi tree.
cheers
The following changes since commit e71ba9452f0b5b2e8dc8aa5445198cd9214a6a62:
Linux 5.11-rc2 (2021-01-03 15:55:30 -0800)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git tags/powerpc-5.12-1
for you to fetch changes up to 82d2c16b350f72aa21ac2a6860c542aa4b43a51e:
powerpc/perf: Adds support for programming of Thresholding in P10 (2021-02-11 23:35:36 +1100)
- ------------------------------------------------------------------
powerpc updates for 5.12
A large series adding wrappers for our interrupt handlers, so that irq/nmi/user
tracking can be isolated in the wrappers rather than spread in each handler.
Conversion of the 32-bit syscall handling into C.
A series from Nick to streamline our TLB flushing when using the Radix MMU.
Switch to using queued spinlocks by default for 64-bit server CPUs.
A rework of our PCI probing so that it happens later in boot, when more generic
infrastructure is available.
Two small fixes to allow 32-bit little-endian processes to run on 64-bit
kernels.
Other smaller features, fixes & cleanups.
Thanks to:
Alexey Kardashevskiy, Ananth N Mavinakayanahalli, Aneesh Kumar K.V, Athira
Rajeev, Bhaskar Chowdhury, Cédric Le Goater, Chengyang Fan, Christophe Leroy,
Christopher M. Riedl, Fabiano Rosas, Florian Fainelli, Frederic Barrat, Ganesh
Goudar, Hari Bathini, Jiapeng Chong, Joseph J Allen, Kajol Jain, Markus
Elfring, Michal Suchanek, Nathan Lynch, Naveen N. Rao, Nicholas Piggin, Oliver
O'Halloran, Pingfan Liu, Po-Hsu Lin, Qian Cai, Ram Pai, Randy Dunlap, Sandipan
Das, Stephen Rothwell, Tyrel Datwyler, Will Springer, Yury Norov, Zheng
Yongjun.
- ------------------------------------------------------------------
Alexey Kardashevskiy (3):
powerpc/iommu/debug: Add debugfs entries for IOMMU tables
powerpc/uaccess: Avoid might_fault() when user access is enabled
powerpc/kuap: Restore AMR after replaying soft interrupts
Ananth N Mavinakayanahalli (2):
powerpc/sstep: Check instruction validity against ISA version before emulation
powerpc/sstep: Fix incorrect return from analyze_instr()
Aneesh Kumar K.V (3):
powerpc/mm: Enable compound page check for both THP and HugeTLB
powerpc/mm: Add PG_dcache_clean to indicate dcache clean state
powerpc/mm: Remove dcache flush from memory remove.
Athira Rajeev (3):
powerpc/perf: Include PMCs as part of per-cpu cpuhw_events struct
powerpc/perf: Expose Performance Monitor Counter SPR's as part of extended regs
powerpc/perf: Record counter overflow always if SAMPLE_IP is unset
Bhaskar Chowdhury (1):
powerpc/44x: Fix a spelling mismach to mismatch in head_44x.S
Chengyang Fan (1):
powerpc: remove unneeded semicolons
Christophe Leroy (38):
powerpc/kvm: Force selection of CONFIG_PPC_FPU
powerpc/47x: Disable 256k page size
powerpc/44x: Remove STDBINUTILS kconfig option
powerpc/32s: Only build hash code when CONFIG_PPC_BOOK3S_604 is selected
powerpc/xmon: Enable breakpoints on 8xx
powerpc/xmon: Select CONSOLE_POLL for the 8xx
powerpc/32s: move DABR match out of handle_page_fault
powerpc/8xx: Fix software emulation interrupt
powerpc/uaccess: Perform barrier_nospec() in KUAP allowance helpers
powerpc/32s: Change mfsrin() into a static inline function
powerpc/32s: mfsrin()/mtsrin() become mfsr()/mtsr()
powerpc/32s: Allow constant folding in mtsr()/mfsr()
powerpc/32: Preserve cr1 in exception prolog stack check to fix build error
powerpc/32s: Add missing call to kuep_lock on syscall entry
powerpc/32: Always enable data translation on syscall entry
powerpc/32: On syscall entry, enable instruction translation at the same time as data
powerpc/32: Reorder instructions to avoid using CTR in syscall entry
powerpc/irq: Add helper to set regs->softe
powerpc/irq: Rework helpers that manipulate MSR[EE/RI]
powerpc/irq: Add stub irq_soft_mask_return() for PPC32
powerpc/syscall: Rename syscall_64.c into interrupt.c
powerpc/syscall: Make interrupt.c buildable on PPC32
powerpc/syscall: Use is_compat_task()
powerpc/syscall: Save r3 in regs->orig_r3
powerpc/syscall: Change condition to check MSR_RI
powerpc/32: Always save non volatile GPRs at syscall entry
powerpc/syscall: implement system call entry/exit logic in C for PPC32
powerpc/32: Remove verification of MSR_PR on syscall in the ASM entry
powerpc/32: Remove the counter in global_dbcr0
powerpc/syscall: Do not check unsupported scv vector on PPC32
powerpc/32: Handle bookE debugging in C in syscall entry/exit
powerpc/syscall: Avoid storing 'current' in another pointer
spi: mpc52xx: Avoid using get_tbl()
powerpc/time: Avoid using get_tbl()
powerpc/time: Remove get_tbl()
powerpc/uaccess: get rid of small constant size cases in raw_copy_{to,from}_user()
powerpc/uaccess: Merge __put_user_size_allowed() into __put_user_size()
powerpc/uaccess: Merge raw_copy_to_user_allowed() into raw_copy_to_user()
Christopher M. Riedl (1):
powerpc64/idle: Fix SP offsets when saving GPRs
Cédric Le Goater (25):
powerpc/mm: Include __find_linux_pte() prototype
powerpc/pseries/ras: Remove unused variable 'status'
powerpc/pseries/eeh: Make pseries_pcibios_bus_add_device() static
powerpc/pseries/ras: Make init_ras_hotplug_IRQ() static
powerpc/pmem: Include pmem prototypes
powerpc/setup_64: Make some routines static
powerpc/mce: Include prototypes
powerpc/smp: Include tick_broadcast() prototype
powerpc/smp: Make debugger_ipi_callback() static
powerpc/optprobes: Remove unused routine patch_imm32_load_insns()
powerpc/optprobes: Make patch_imm64_load_insns() static
powerpc/mm: Declare some prototypes
powerpc/mm: Move hpte_insert_repeating() prototype
powerpc/mm: Declare preload_new_slb_context() prototype
powerpc/mm/hugetlb: Make pseries_alloc_bootmem_huge_page() static
powerpc/mm: Declare arch_report_meminfo() prototype.
powerpc/watchdog: Declare soft_nmi_interrupt() prototype
KVM: PPC: Make the VMX instruction emulation routines static
KVM: PPC: Book3S HV: Include prototypes
KVM: PPC: Book3S HV: Declare some prototypes
powerpc/pseries: Make IOV setup routines static
powerpc/pcidn: Make IOV setup routines static
powerpc/pseries/eeh: Make pseries_send_allow_unfreeze() static
powerpc/vas: Fix IRQ name allocation
powerpc/prom: Fix "ibm,arch-vec-5-platform-support" scan
Ganesh Goudar (2):
powerpc/mce: Reduce the size of event arrays
powerpc/mce: Remove per cpu variables from MCE handlers
Hari Bathini (1):
powerpc/kexec_file: fix FDT size estimation for kdump kernel
Jiapeng Chong (1):
powerpc/xive: Assign boolean values to a bool variable
Joseph J Allen (1):
powerpc: use kernel endianness in MSR in 32-bit signal handler
Kajol Jain (2):
powerpc/perf/hv-24x7: Dont create sysfs event files for dummy events
powerpc/perf: Adds support for programming of Thresholding in P10
Markus Elfring (6):
cxl: Reduce scope for the variable “mm” in cxllib_get_PE_attributes()
powerpc/pseries: Delete an unnecessary kfree() call in dlpar_store()
powerpc/pseries: Delete an error message for a failed string duplication in dlpar_store()
powerpc/82xx: Delete an unnecessary of_node_put() call in pq2ads_pci_init_irq()
powerpc/82xx: Use common error handling code in pq2ads_pci_init_irq()
powerpc/setup: Adjust six seq_printf() calls in show_cpuinfo()
Michael Ellerman (10):
powerpc/64s/kuap: Use mmu_has_feature()
powerpc/akebono: Fix unmet dependency errors
powerpc/64: Make stack tracing work during very early boot
powerpc/64s: Handle program checks in wrong endian during early boot
powerpc/powernv/pci: Use kzalloc() for phb related allocations
powerpc/83xx: Fix build error when CONFIG_PCI=n
powerpc/mm/64s: Fix no previous prototype warning
powerpc/amigaone: Make amigaone_discover_phbs() static
powerpc/uaccess: Simplify unsafe_put_user() implementation
powerpc/64: Fix stack trace not displaying final frame
Michal Suchanek (1):
powerpc: Fix build error in paravirt.h
Nathan Lynch (1):
powerpc/pseries/dlpar: handle ibm, configure-connector delay status
Nicholas Piggin (53):
powerpc: Always enable queued spinlocks for 64s, disable for others
powerpc/64s: interrupt exit improve bounding of interrupt recursion
KVM: PPC: Book3S HV: Context tracking exit guest context before enabling irqs
powerpc/64s: move DABR match out of handle_page_fault
powerpc/64s: move the hash fault handling logic to C
powerpc: remove arguments from fault handler functions
powerpc/fsl_booke/32: CacheLockingException remove args
powerpc: do_break get registers from regs
powerpc: DebugException remove args
powerpc/32: transfer can avoid saving r4/r5 over trace call
powerpc: bad_page_fault get registers from regs
powerpc/64s: add do_bad_page_fault_segv handler
powerpc: rearrange do_page_fault error case to be inside exception_enter
powerpc/64s: move bad_page_fault handling to C
powerpc/64s: split do_hash_fault
powerpc/mm: Remove stale do_page_fault comment referring to SLB faults
powerpc/64s: slb comment update
powerpc/traps: add NOKPROBE_SYMBOL for sreset and mce
powerpc/perf: move perf irq/nmi handling details into traps.c
powerpc/time: move timer_broadcast_interrupt prototype to asm/time.h
powerpc: add and use unknown_async_exception
powerpc/cell: tidy up pervasive declarations
powerpc: introduce die_mce
powerpc/mce: ensure machine check handler always tests RI
powerpc: improve handling of unrecoverable system reset
powerpc: interrupt handler wrapper functions
powerpc: add interrupt wrapper entry / exit stub functions
powerpc/traps: factor common code from program check and emulation assist
powerpc: convert interrupt handlers to use wrappers
powerpc: add interrupt_cond_local_irq_enable helper
powerpc/64: context tracking remove _TIF_NOHZ
powerpc/64s/hash: improve context tracking of hash faults
powerpc/64: context tracking move to interrupt wrappers
powerpc/64: add context tracking to asynchronous interrupts
powerpc: handle irq_enter/irq_exit in interrupt handler wrappers
powerpc/64s: move context tracking exit to interrupt exit path
powerpc/64s: reconcile interrupts in C
powerpc/64: move account_stolen_time into its own function
powerpc/64: entry cpu time accounting in C
powerpc/pseries/mce: restore msr before returning from handler
powerpc: move NMI entry/exit code into wrapper
powerpc/64s: move NMI soft-mask handling to C
powerpc/64s: runlatch interrupt handling in C
powerpc/64s/radix: add warning and comments in mm_cpumask trim
powerpc/64s/radix: refactor TLB flush type selection
powerpc/64s/radix: Check for no TLB flush required
powerpc/64s/radix: Allow mm_cpumask trimming from external sources
powerpc/64s/radix: occasionally attempt to trim mm_cpumask
powerpc/64s/radix: serialize_against_pte_lookup IPIs trim mm_cpumask
powerpc/64s: Implement ptep_clear_flush_young that does not flush TLBs
powerpc: remove interrupt handler functions from the noinstr section
powerpc/64s: syscall real mode entry use mtmsrd rather than rfid
powerpc/64s: Remove EXSLB interrupt save area
Oliver O'Halloran (24):
selftests/powerpc: Hoist helper code out of eeh-basic
selftests/powerpc: Use stderr for debug messages in eeh-functions
selftests/powerpc: Add VF recovery tests
powerpc/eeh: Rework pci_dev lookup in debugfs attributes
powerpc/eeh: Add a debugfs interface to check if a driver supports recovery
powerpc/pci: Delete traverse_pci_dn()
powerpc/powernv/pci: Drop pnv_phb->initialized
powerpc/pci: Add ppc_md.discover_phbs()
powerpc/pci: Move PHB discovery for PCI_DN using platforms
powerpc/512x: Move PHB discovery
powerpc/52xx/efika: Move PHB discovery
powerpc/52xx/lite5200: Move PHB discovery
powerpc/52xx/media5200: Move PHB discovery
powerpc/52xx/mpc5200_simple: Move PHB discovery
powerpc/82xx/*: Move PHB discovery
powerpc/83xx: Move PHB discovery
powerpc/amigaone: Move PHB discovery
powerpc/chrp: Move PHB discovery
powerpc/embedded6xx/holly: Move PHB discovery
powerpc/embedded6xx/linkstation: Move PHB discovery
powerpc/embedded6xx/mpc7448: Move PHB discovery
powerpc/embedded6xx/mve5100: Move PHB discovery
powerpc/pasemi: Move PHB discovery
powerpc/pci: Remove unimplemented prototypes
Pingfan Liu (1):
powerpc/time: Enable sched clock for irqtime
Po-Hsu Lin (1):
selftests/powerpc: Make the test check in eeh-basic.sh posix compliant
Qian Cai (2):
powerpc/powernv/pci: fix a RCU-list lock
powerpc/mm/book3s64/iommu: fix some RCU-list locks
Sandipan Das (3):
powerpc/pkeys: Remove unused code
powerpc/sstep: Fix load-store and update emulation
powerpc/sstep: Fix darn emulation
Will Springer (1):
powerpc/compat_sys: swap hi/lo parts of 64-bit syscall args in LE mode
Zheng Yongjun (1):
ocxl: use DEFINE_MUTEX() for mutex lock
arch/powerpc/Kconfig | 35 +-
arch/powerpc/Kconfig.debug | 1 +
arch/powerpc/configs/44x/akebono_defconfig | 5 +
arch/powerpc/include/asm/asm-prototypes.h | 29 --
arch/powerpc/include/asm/book3s/32/kup.h | 8 +-
arch/powerpc/include/asm/book3s/32/mmu-hash.h | 2 +-
arch/powerpc/include/asm/book3s/64/kup.h | 4 +-
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 5 +
arch/powerpc/include/asm/book3s/64/mmu.h | 2 +-
arch/powerpc/include/asm/book3s/64/pgtable.h | 23 +-
arch/powerpc/include/asm/book3s/64/tlbflush-radix.h | 2 +-
arch/powerpc/include/asm/book3s/64/tlbflush.h | 2 +-
arch/powerpc/include/asm/bug.h | 9 +-
arch/powerpc/include/asm/cacheflush.h | 6 +
arch/powerpc/include/asm/cputime.h | 14 +
arch/powerpc/include/asm/debug.h | 4 -
arch/powerpc/include/asm/firmware.h | 2 +-
arch/powerpc/include/asm/hugetlb.h | 2 -
arch/powerpc/include/asm/hw_irq.h | 96 +++--
arch/powerpc/include/asm/interrupt.h | 449 ++++++++++++++++++++
arch/powerpc/include/asm/kexec.h | 1 +
arch/powerpc/include/asm/kup.h | 2 +
arch/powerpc/include/asm/kvm_book3s.h | 7 +
arch/powerpc/include/asm/kvm_ppc.h | 10 +-
arch/powerpc/include/asm/machdep.h | 3 +
arch/powerpc/include/asm/mce.h | 20 +-
arch/powerpc/include/asm/mmu_context.h | 3 -
arch/powerpc/include/asm/nmi.h | 1 +
arch/powerpc/include/asm/paca.h | 13 +-
arch/powerpc/include/asm/paravirt.h | 1 +
arch/powerpc/include/asm/perf_event.h | 2 +
arch/powerpc/include/asm/perf_event_server.h | 5 +-
arch/powerpc/include/asm/pgtable.h | 3 +
arch/powerpc/include/asm/pkeys.h | 6 -
arch/powerpc/include/asm/ppc-pci.h | 7 -
arch/powerpc/include/asm/ppc_asm.h | 24 --
arch/powerpc/include/asm/ptrace.h | 8 +
arch/powerpc/include/asm/reg.h | 22 +-
arch/powerpc/include/asm/reg_booke.h | 3 +
arch/powerpc/include/asm/rtas.h | 2 +-
arch/powerpc/include/asm/setup.h | 6 +-
arch/powerpc/include/asm/simple_spinlock.h | 4 +-
arch/powerpc/include/asm/smp.h | 2 +-
arch/powerpc/include/asm/thread_info.h | 4 +-
arch/powerpc/include/asm/time.h | 2 +
arch/powerpc/include/asm/uaccess.h | 99 +----
arch/powerpc/include/asm/vdso/timebase.h | 6 -
arch/powerpc/include/asm/xmon.h | 4 +-
arch/powerpc/include/uapi/asm/perf_regs.h | 28 +-
arch/powerpc/kernel/Makefile | 4 +-
arch/powerpc/kernel/asm-offsets.c | 3 +-
arch/powerpc/kernel/dbell.c | 9 +-
arch/powerpc/kernel/eeh.c | 121 ++++--
arch/powerpc/kernel/entry_32.S | 347 ++-------------
arch/powerpc/kernel/entry_64.S | 8 +-
arch/powerpc/kernel/exceptions-64e.S | 8 +-
arch/powerpc/kernel/exceptions-64s.S | 324 ++++----------
arch/powerpc/kernel/head_32.h | 98 +----
arch/powerpc/kernel/head_40x.S | 11 +-
arch/powerpc/kernel/head_44x.S | 4 +-
arch/powerpc/kernel/head_8xx.S | 13 +-
arch/powerpc/kernel/head_book3s_32.S | 32 +-
arch/powerpc/kernel/head_booke.h | 57 +--
arch/powerpc/kernel/head_fsl_booke.S | 6 +-
arch/powerpc/kernel/idle_book3s.S | 138 +++---
arch/powerpc/kernel/{syscall_64.c => interrupt.c} | 203 ++++++---
arch/powerpc/kernel/iommu.c | 46 ++
arch/powerpc/kernel/irq.c | 34 +-
arch/powerpc/kernel/mce.c | 96 +++--
arch/powerpc/kernel/optprobes.c | 21 +-
arch/powerpc/kernel/pci-common.c | 10 +
arch/powerpc/kernel/pci_dn.c | 62 ---
arch/powerpc/kernel/process.c | 13 +-
arch/powerpc/kernel/prom.c | 2 +-
arch/powerpc/kernel/prom_init.c | 12 +-
arch/powerpc/kernel/ptrace/ptrace.c | 4 -
arch/powerpc/kernel/setup-common.c | 13 +-
arch/powerpc/kernel/setup.h | 12 +-
arch/powerpc/kernel/setup_64.c | 7 +-
arch/powerpc/kernel/signal.c | 4 -
arch/powerpc/kernel/signal_32.c | 3 +-
arch/powerpc/kernel/smp.c | 3 +-
arch/powerpc/kernel/sys_ppc32.c | 49 ++-
arch/powerpc/kernel/syscalls/syscall.tbl | 20 +-
arch/powerpc/kernel/tau_6xx.c | 6 +-
arch/powerpc/kernel/time.c | 9 +-
arch/powerpc/kernel/traps.c | 274 ++++++------
arch/powerpc/kernel/watchdog.c | 16 +-
arch/powerpc/kexec/elf_64.c | 2 +-
arch/powerpc/kexec/file_load_64.c | 35 ++
arch/powerpc/kvm/Kconfig | 1 +
arch/powerpc/kvm/book3s_64_mmu_hv.c | 1 +
arch/powerpc/kvm/book3s_emulate.c | 4 -
arch/powerpc/kvm/book3s_hv.c | 7 +-
arch/powerpc/kvm/book3s_hv_builtin.c | 1 +
arch/powerpc/kvm/book3s_xive.c | 4 +-
arch/powerpc/kvm/booke.c | 1 +
arch/powerpc/kvm/powerpc.c | 8 +-
arch/powerpc/lib/pmem.c | 1 +
arch/powerpc/lib/sstep.c | 101 ++++-
arch/powerpc/mm/book3s32/Makefile | 4 +-
arch/powerpc/mm/book3s32/mmu.c | 2 +-
arch/powerpc/mm/book3s64/hash_hugetlbpage.c | 4 -
arch/powerpc/mm/book3s64/hash_utils.c | 101 +++--
arch/powerpc/mm/book3s64/internal.h | 2 +
arch/powerpc/mm/book3s64/iommu_api.c | 10 +-
arch/powerpc/mm/book3s64/pgtable.c | 13 +-
arch/powerpc/mm/book3s64/radix_tlb.c | 299 ++++++++-----
arch/powerpc/mm/book3s64/slb.c | 40 +-
arch/powerpc/mm/fault.c | 75 ++--
arch/powerpc/mm/hugetlbpage.c | 20 +-
arch/powerpc/mm/mem.c | 54 ++-
arch/powerpc/mm/pgtable.c | 15 +-
arch/powerpc/mm/ptdump/segment_regs.c | 2 +-
arch/powerpc/perf/core-book3s.c | 96 ++---
arch/powerpc/perf/core-fsl-emb.c | 25 --
arch/powerpc/perf/hv-24x7.c | 15 +
arch/powerpc/perf/isa207-common.c | 67 ++-
arch/powerpc/perf/isa207-common.h | 15 +-
arch/powerpc/perf/mpc7450-pmu.c | 5 +-
arch/powerpc/perf/perf_regs.c | 13 +-
arch/powerpc/perf/power10-pmu.c | 4 +-
arch/powerpc/perf/power5+-pmu.c | 5 +-
arch/powerpc/perf/power5-pmu.c | 5 +-
arch/powerpc/perf/power6-pmu.c | 5 +-
arch/powerpc/perf/power7-pmu.c | 5 +-
arch/powerpc/perf/ppc970-pmu.c | 5 +-
arch/powerpc/platforms/44x/Kconfig | 7 -
arch/powerpc/platforms/512x/mpc5121_ads.c | 13 +-
arch/powerpc/platforms/52xx/efika.c | 3 +-
arch/powerpc/platforms/52xx/lite5200.c | 3 +-
arch/powerpc/platforms/52xx/media5200.c | 3 +-
arch/powerpc/platforms/52xx/mpc5200_simple.c | 3 +-
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 8 +-
arch/powerpc/platforms/82xx/mpc8272_ads.c | 2 +-
arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | 13 +-
arch/powerpc/platforms/82xx/pq2fads.c | 3 +-
arch/powerpc/platforms/83xx/asp834x.c | 1 +
arch/powerpc/platforms/83xx/km83xx.c | 1 +
arch/powerpc/platforms/83xx/misc.c | 2 -
arch/powerpc/platforms/83xx/mpc830x_rdb.c | 1 +
arch/powerpc/platforms/83xx/mpc831x_rdb.c | 1 +
arch/powerpc/platforms/83xx/mpc832x_mds.c | 1 +
arch/powerpc/platforms/83xx/mpc832x_rdb.c | 1 +
arch/powerpc/platforms/83xx/mpc834x_itx.c | 1 +
arch/powerpc/platforms/83xx/mpc834x_mds.c | 1 +
arch/powerpc/platforms/83xx/mpc836x_mds.c | 1 +
arch/powerpc/platforms/83xx/mpc836x_rdk.c | 1 +
arch/powerpc/platforms/83xx/mpc837x_mds.c | 1 +
arch/powerpc/platforms/83xx/mpc837x_rdb.c | 1 +
arch/powerpc/platforms/83xx/mpc83xx.h | 2 +-
arch/powerpc/platforms/8xx/machine_check.c | 2 +-
arch/powerpc/platforms/amigaone/setup.c | 10 +-
arch/powerpc/platforms/cell/pervasive.c | 1 +
arch/powerpc/platforms/cell/pervasive.h | 3 -
arch/powerpc/platforms/cell/ras.c | 6 +-
arch/powerpc/platforms/cell/ras.h | 9 +-
arch/powerpc/platforms/chrp/pci.c | 8 +
arch/powerpc/platforms/chrp/setup.c | 12 +-
arch/powerpc/platforms/embedded6xx/holly.c | 10 +-
arch/powerpc/platforms/embedded6xx/linkstation.c | 10 +-
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | 14 +-
arch/powerpc/platforms/embedded6xx/mvme5100.c | 13 +-
arch/powerpc/platforms/embedded6xx/storcenter.c | 8 +-
arch/powerpc/platforms/maple/pci.c | 3 +
arch/powerpc/platforms/maple/setup.c | 4 +-
arch/powerpc/platforms/pasemi/setup.c | 3 +-
arch/powerpc/platforms/powermac/pci.c | 4 +
arch/powerpc/platforms/powermac/setup.c | 4 +-
arch/powerpc/platforms/powernv/idle.c | 1 +
arch/powerpc/platforms/powernv/memtrace.c | 29 ++
arch/powerpc/platforms/powernv/opal.c | 2 +-
arch/powerpc/platforms/powernv/pci-ioda-tce.c | 4 +
arch/powerpc/platforms/powernv/pci-ioda.c | 27 +-
arch/powerpc/platforms/powernv/pci.h | 1 -
arch/powerpc/platforms/powernv/setup.c | 4 +-
arch/powerpc/platforms/powernv/subcore.h | 2 +-
arch/powerpc/platforms/powernv/vas.c | 11 +-
arch/powerpc/platforms/powernv/vas.h | 1 +
arch/powerpc/platforms/pseries/dlpar.c | 12 +-
arch/powerpc/platforms/pseries/eeh_pseries.c | 5 +-
arch/powerpc/platforms/pseries/pci.c | 15 +-
arch/powerpc/platforms/pseries/pseries.h | 2 +-
arch/powerpc/platforms/pseries/ras.c | 36 +-
arch/powerpc/platforms/pseries/setup.c | 15 +-
arch/powerpc/xmon/xmon.c | 6 +-
drivers/misc/cxl/cxllib.c | 4 +-
drivers/misc/ocxl/file.c | 3 +-
drivers/spi/spi-mpc52xx.c | 12 +-
tools/testing/selftests/powerpc/eeh/eeh-basic.sh | 41 +-
tools/testing/selftests/powerpc/eeh/eeh-functions.sh | 168 +++++++-
tools/testing/selftests/powerpc/eeh/eeh-vf-aware.sh | 45 ++
tools/testing/selftests/powerpc/eeh/eeh-vf-unaware.sh | 35 ++
193 files changed, 2718 insertions(+), 2133 deletions(-)
create mode 100644 arch/powerpc/include/asm/interrupt.h
rename arch/powerpc/kernel/{syscall_64.c => interrupt.c} (69%)
mode change 100755 => 100644 tools/testing/selftests/powerpc/eeh/eeh-functions.sh
create mode 100755 tools/testing/selftests/powerpc/eeh/eeh-vf-aware.sh
create mode 100755 tools/testing/selftests/powerpc/eeh/eeh-vf-unaware.sh
-----BEGIN PGP SIGNATURE-----
iQIzBAEBCAAdFiEEJFGtCPCthwEv2Y/bUevqPMjhpYAFAmAznYsACgkQUevqPMjh
pYB5LQ/8Ce9IkOMv3h4pQR6y8lOmM/P1MEZSu8SxrzhJhOo7VHoEALNgBKlHvSsc
cBppRlykEg1t7XMOKotPKregIKUd3UFQop1u3copPevn/USL2JZzsDvGNLvAKsKz
pt0jy/coalSZWeqUE5S91DcpNnvsBRYCdXwz7xYKfShWh1TS8YOh6vHDzOMko2a4
3TvixYm84XW2c6FLwVz2fERBmpDsxIVRUwiLQ3ua4ouJI0ZkNuty4Xhn40ASPXa9
OxacuAV9pRs1pFCvTqGCmPHyqx1C2JhXGcfQA3S34pkq0EwARdSGvwGWIo00WKAu
eiVd/mz+oYKbTegsoKFllYeh0VYRWgbYhiJCU5vdtguBsn/gzl5IDFo6d1Do3U8I
yEVknb6zZD3DA5vc7xU+fwsVKkaq7D74nd0SuUOmqxF2fYLbiHtOqsSTGSBoDf5l
lhQ6FtoZIAnbnRY3Ktjt1/SYapAMn/VK+rf6p6Jz33FRM808veT6QGgMBv4sGmw0
05z93uHYSS5g6jWrw5UjPWuPhcmAjnZdXFZtQFX06JhPKTCMqneShVD6guyZaAfw
ztr5sYJgYjMDOR0+tNC8xb0AeKFUCagT4Ebxm/76JwkIa/s00QZH1v3Ke1C7+QBv
IANgpZdsb+49GJfYv50s/Wk43E2+1flXsBH4EqRh7j2/tqRdkuM=
=wC/q
-----END PGP SIGNATURE-----
^ permalink raw reply
* Re: [PATCH v2 2/7] ASoC: fsl_rpmsg: Add CPU DAI driver for audio base on rpmsg
From: Mark Brown @ 2021-02-22 13:46 UTC (permalink / raw)
To: Shengjiu Wang
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
alsa-devel, Timur Tabi, Xiubo Li, Fabio Estevam, Shengjiu Wang,
Takashi Iwai, Liam Girdwood, linux-kernel, Nicolin Chen,
Rob Herring, linuxppc-dev
In-Reply-To: <CAA+D8ANdqd2W6xvwFuuk=YqUGCfuXCFzwO7tkhuGwzPRgA_A4g@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 268 bytes --]
On Thu, Feb 18, 2021 at 03:57:11PM +0800, Shengjiu Wang wrote:
> Can I add a flag:
> "rpmsg->mclk_streams & BIT(substream->stream)"
> for avoiding multiple calls of hw_params function before enabling
> clock?
Yes, if you do local refcounting that'd avoid the issue.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [GIT PULL] Please pull powerpc/linux.git powerpc-5.12-1 tag
From: Rob Herring @ 2021-02-22 17:41 UTC (permalink / raw)
To: Michael Ellerman
Cc: ananth, Alexey Kardashevskiy, kernelfans, cmr, zhengyongjun3,
Oliver O'Halloran, sandipan, cy.fan, SF Markus Elfring,
jiapeng.chong, skirmisher, Florian Fainelli, Bhaskar Chowdhury,
eerykitty, Aneesh Kumar K.V, Haren Myneni, ganeshgr,
Michal Suchanek, nathanl, kjain, Nicholas Piggin, Mark Brown,
Qian Cai, Cédric Le Goater, Hari Bathini, atrajeev,
Linus Torvalds, Randy Dunlap, linux-kernel@vger.kernel.org,
fbarrat, po-hsu.lin, linuxppc-dev
In-Reply-To: <87o8gctii6.fsf@mpe.ellerman.id.au>
On Mon, Feb 22, 2021 at 6:05 AM Michael Ellerman <mpe@ellerman.id.au> wrote:
>
> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA256
>
> Hi Linus,
>
> Please pull powerpc updates for 5.12.
>
> There will be a conflict with the devicetree tree. It's OK to just take their
> side of the conflict, we'll fix up the minor behaviour change that causes in a
> follow-up patch.
The issues turned out to be worse than just this, so I've dropped the
conflicting change for 5.12.
Rob
^ permalink raw reply
* Re: [PATCH kernel 2/2] powerpc/iommu: Do not immediately panic when failed IOMMU table allocation
From: Leonardo Bras @ 2021-02-22 18:39 UTC (permalink / raw)
To: Alexey Kardashevskiy, linuxppc-dev; +Cc: kvm-ppc, David Gibson
In-Reply-To: <0ae74efe-8b9a-566a-d984-8e5b662ff330@ozlabs.ru>
On Mon, 2021-02-22 at 16:24 +1100, Alexey Kardashevskiy wrote:
>
> On 18/02/2021 06:32, Leonardo Bras wrote:
> > On Tue, 2021-02-16 at 14:33 +1100, Alexey Kardashevskiy wrote:
> > > Most platforms allocate IOMMU table structures (specifically it_map)
> > > at the boot time and when this fails - it is a valid reason for panic().
> > >
> > > However the powernv platform allocates it_map after a device is returned
> > > to the host OS after being passed through and this happens long after
> > > the host OS booted. It is quite possible to trigger the it_map allocation
> > > panic() and kill the host even though it is not necessary - the host OS
> > > can still use the DMA bypass mode (requires a tiny fraction of it_map's
> > > memory) and even if that fails, the host OS is runnnable as it was without
> > > the device for which allocating it_map causes the panic.
> > >
> > > Instead of immediately crashing in a powernv/ioda2 system, this prints
> > > an error and continues. All other platforms still call panic().
> > >
> > > Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> >
> > Hello Alexey,
> >
> > This looks like a good change, that passes panic() decision to platform
> > code. Everything looks pretty straightforward, but I have a question
> > regarding this:
> >
> > > @@ -1930,16 +1931,16 @@ static long pnv_pci_ioda2_setup_default_config(struct pnv_ioda_pe *pe)
> > > res_start = pe->phb->ioda.m32_pci_base >> tbl->it_page_shift;
> > > res_end = min(window_size, SZ_4G) >> tbl->it_page_shift;
> > > }
> > > - iommu_init_table(tbl, pe->phb->hose->node, res_start, res_end);
> > > - rc = pnv_pci_ioda2_set_window(&pe->table_group, 0, tbl);
> > >
> > > + if (iommu_init_table(tbl, pe->phb->hose->node, res_start, res_end))
> > > + rc = pnv_pci_ioda2_set_window(&pe->table_group, 0, tbl);
> > > + else
> > > + rc = -ENOMEM;
> > > if (rc) {
> > > - pe_err(pe, "Failed to configure 32-bit TCE table, err %ld\n",
> > > - rc);
> > > + pe_err(pe, "Failed to configure 32-bit TCE table, err %ld\n", rc);
> > > iommu_tce_table_put(tbl);
> > > - return rc;
> > > + tbl = NULL; /* This clears iommu_table_base below */
> > > }
> > > -
> > > if (!pnv_iommu_bypass_disabled)
> > > pnv_pci_ioda2_set_bypass(pe, true);
> > >
> > >
> > >
> > >
> > >
> >
> > If I could understand correctly, previously if iommu_init_table() did
> > not panic(), and pnv_pci_ioda2_set_window() returned something other
> > than 0, it would return rc in the if (rc) clause, but now it does not
> > happen anymore, going through if (!pnv_iommu_bypass_disabled) onwards.
> >
> > Is that desired?
>
>
> Yes. A PE (==device, pretty much) has 2 DMA windows:
> - the default one which requires some RAM to operate
> - a bypass mode which tells the hardware that PCI addresses are
> statically mapped to RAM 1:1.
>
> This bypass mode does not require extra memory to work and is used in
> the most cases on the bare metal as long as the device supports 64bit
> DMA which is everything except GPUs. Since it is cheap to enable and
> this what we prefer anyway, no urge to fail.
>
>
> > As far as I could see, returning rc there seems a good procedure after
> > iommu_init_table returning -ENOMEM.
>
> This change is intentional and yes it could be done by a separate patch
> but I figured there is no that much value in splitting.
Ok then, thanks for clarifying.
FWIW:
Reviewed-by: Leonardo Bras <leobras.c@gmail.com>
^ permalink raw reply
* Re: [PATCH 01/13] powerpc/64s: Remove KVM handler support from CBE_RAS interrupts
From: Fabiano Rosas @ 2021-02-22 22:22 UTC (permalink / raw)
To: Nicholas Piggin, kvm-ppc; +Cc: linuxppc-dev, Nicholas Piggin
In-Reply-To: <20210219063542.1425130-2-npiggin@gmail.com>
Nicholas Piggin <npiggin@gmail.com> writes:
> Cell does not support KVM.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
> ---
> arch/powerpc/kernel/exceptions-64s.S | 6 ------
> 1 file changed, 6 deletions(-)
>
> diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
> index 39cbea495154..5d0ad3b38e90 100644
> --- a/arch/powerpc/kernel/exceptions-64s.S
> +++ b/arch/powerpc/kernel/exceptions-64s.S
> @@ -2574,8 +2574,6 @@ EXC_VIRT_NONE(0x5100, 0x100)
> INT_DEFINE_BEGIN(cbe_system_error)
> IVEC=0x1200
> IHSRR=1
> - IKVM_SKIP=1
> - IKVM_REAL=1
> INT_DEFINE_END(cbe_system_error)
>
> EXC_REAL_BEGIN(cbe_system_error, 0x1200, 0x100)
> @@ -2745,8 +2743,6 @@ EXC_COMMON_BEGIN(denorm_exception_common)
> INT_DEFINE_BEGIN(cbe_maintenance)
> IVEC=0x1600
> IHSRR=1
> - IKVM_SKIP=1
> - IKVM_REAL=1
> INT_DEFINE_END(cbe_maintenance)
>
> EXC_REAL_BEGIN(cbe_maintenance, 0x1600, 0x100)
> @@ -2798,8 +2794,6 @@ EXC_COMMON_BEGIN(altivec_assist_common)
> INT_DEFINE_BEGIN(cbe_thermal)
> IVEC=0x1800
> IHSRR=1
> - IKVM_SKIP=1
> - IKVM_REAL=1
> INT_DEFINE_END(cbe_thermal)
>
> EXC_REAL_BEGIN(cbe_thermal, 0x1800, 0x100)
^ permalink raw reply
* Re: [PATCH 02/13] powerpc/64s: remove KVM SKIP test from instruction breakpoint handler
From: Fabiano Rosas @ 2021-02-22 22:22 UTC (permalink / raw)
To: Nicholas Piggin, kvm-ppc; +Cc: linuxppc-dev, Nicholas Piggin
In-Reply-To: <20210219063542.1425130-3-npiggin@gmail.com>
Nicholas Piggin <npiggin@gmail.com> writes:
> The code being executed in KVM_GUEST_MODE_SKIP is hypervisor code with
> MSR[IR]=0, so the faults of concern are the d-side ones caused by access
> to guest context by the hypervisor.
>
> Instruction breakpoint interrupts are not a concern here. It's unlikely
> any good would come of causing breaks in this code, but skipping the
> instruction that caused it won't help matters (e.g., skip the mtmsr that
> sets MSR[DR]=0 or clears KVM_GUEST_MODE_SKIP).
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
> ---
> arch/powerpc/kernel/exceptions-64s.S | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
> index 5d0ad3b38e90..5bc689a546ae 100644
> --- a/arch/powerpc/kernel/exceptions-64s.S
> +++ b/arch/powerpc/kernel/exceptions-64s.S
> @@ -2597,7 +2597,6 @@ EXC_VIRT_NONE(0x5200, 0x100)
> INT_DEFINE_BEGIN(instruction_breakpoint)
> IVEC=0x1300
> #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
> - IKVM_SKIP=1
> IKVM_REAL=1
> #endif
> INT_DEFINE_END(instruction_breakpoint)
^ permalink raw reply
* Re: [PATCH 03/13] KVM: PPC: Book3S HV: Ensure MSR[ME] is always set in guest MSR
From: Fabiano Rosas @ 2021-02-22 22:23 UTC (permalink / raw)
To: Nicholas Piggin, kvm-ppc; +Cc: linuxppc-dev, Nicholas Piggin
In-Reply-To: <20210219063542.1425130-4-npiggin@gmail.com>
Nicholas Piggin <npiggin@gmail.com> writes:
> Rather than add the ME bit to the MSR when the guest is entered, make
> it clear that the hypervisor does not allow the guest to clear the bit.
>
> The ME addition is kept in the code for now, but a future patch will
> warn if it's not present.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
> ---
> arch/powerpc/kvm/book3s_hv_builtin.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c
> index dad118760a4e..ae8f291c5c48 100644
> --- a/arch/powerpc/kvm/book3s_hv_builtin.c
> +++ b/arch/powerpc/kvm/book3s_hv_builtin.c
> @@ -661,6 +661,13 @@ static void kvmppc_end_cede(struct kvm_vcpu *vcpu)
>
> void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)
> {
> + /*
> + * Guest must always run with machine check interrupt
> + * enabled.
> + */
> + if (!(msr & MSR_ME))
> + msr |= MSR_ME;
> +
> /*
> * Check for illegal transactional state bit combination
> * and if we find it, force the TS field to a safe state.
^ permalink raw reply
* Re: [GIT PULL] Please pull powerpc/linux.git powerpc-5.12-1 tag
From: pr-tracker-bot @ 2021-02-22 22:39 UTC (permalink / raw)
To: Michael Ellerman
Cc: ananth, aik, skirmisher, cmr, zhengyongjun3, oohall, sandipan,
cy.fan, elfring, jiapeng.chong, f.fainelli, unixbhaskar,
eerykitty, aneesh.kumar, haren, ganeshgr, msuchanek, nathanl,
robh, kjain, npiggin, broonie, cai, kernelfans, hbathini,
atrajeev, linuxppc-dev, rdunlap, linux-kernel, fbarrat,
po-hsu.lin, Linus Torvalds, clg
In-Reply-To: <87o8gctii6.fsf@mpe.ellerman.id.au>
The pull request you sent on Mon, 22 Feb 2021 23:05:37 +1100:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git tags/powerpc-5.12-1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/b12b47249688915e987a9a2a393b522f86f6b7ab
Thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/prtracker.html
^ permalink raw reply
* Re: [PATCH 06/13] KVM: PPC: Book3S 64: Move GUEST_MODE_SKIP test into KVM
From: Fabiano Rosas @ 2021-02-22 22:40 UTC (permalink / raw)
To: Nicholas Piggin, kvm-ppc; +Cc: linuxppc-dev, Nicholas Piggin
In-Reply-To: <20210219063542.1425130-7-npiggin@gmail.com>
Nicholas Piggin <npiggin@gmail.com> writes:
> Move the GUEST_MODE_SKIP logic into KVM code. This is quite a KVM
> internal detail that has no real need to be in common handlers.
>
> Also add a comment explaining why this this thing exists.
this this
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
> ---
> arch/powerpc/kernel/exceptions-64s.S | 60 --------------------------
> arch/powerpc/kvm/book3s_64_entry.S | 64 ++++++++++++++++++++++++----
> 2 files changed, 56 insertions(+), 68 deletions(-)
>
> diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
> index a1640d6ea65d..96f22c582213 100644
> --- a/arch/powerpc/kernel/exceptions-64s.S
> +++ b/arch/powerpc/kernel/exceptions-64s.S
> @@ -133,7 +133,6 @@ name:
> #define IBRANCH_TO_COMMON .L_IBRANCH_TO_COMMON_\name\() /* ENTRY branch to common */
> #define IREALMODE_COMMON .L_IREALMODE_COMMON_\name\() /* Common runs in realmode */
> #define IMASK .L_IMASK_\name\() /* IRQ soft-mask bit */
> -#define IKVM_SKIP .L_IKVM_SKIP_\name\() /* Generate KVM skip handler */
> #define IKVM_REAL .L_IKVM_REAL_\name\() /* Real entry tests KVM */
> #define __IKVM_REAL(name) .L_IKVM_REAL_ ## name
> #define IKVM_VIRT .L_IKVM_VIRT_\name\() /* Virt entry tests KVM */
> @@ -191,9 +190,6 @@ do_define_int n
> .ifndef IMASK
> IMASK=0
> .endif
> - .ifndef IKVM_SKIP
> - IKVM_SKIP=0
> - .endif
> .ifndef IKVM_REAL
> IKVM_REAL=0
> .endif
> @@ -254,15 +250,10 @@ do_define_int n
> .balign IFETCH_ALIGN_BYTES
> \name\()_kvm:
>
> - .if IKVM_SKIP
> - cmpwi r10,KVM_GUEST_MODE_SKIP
> - beq 89f
> - .else
> BEGIN_FTR_SECTION
> ld r10,IAREA+EX_CFAR(r13)
> std r10,HSTATE_CFAR(r13)
> END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
> - .endif
>
> ld r10,IAREA+EX_CTR(r13)
> mtctr r10
> @@ -289,27 +280,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
> ori r12,r12,(IVEC)
> .endif
> b kvmppc_interrupt
> -
> - .if IKVM_SKIP
> -89: mtocrf 0x80,r9
> - ld r10,IAREA+EX_CTR(r13)
> - mtctr r10
> - ld r9,IAREA+EX_R9(r13)
> - ld r10,IAREA+EX_R10(r13)
> - ld r11,IAREA+EX_R11(r13)
> - ld r12,IAREA+EX_R12(r13)
> - .if IHSRR_IF_HVMODE
> - BEGIN_FTR_SECTION
> - b kvmppc_skip_Hinterrupt
> - FTR_SECTION_ELSE
> - b kvmppc_skip_interrupt
> - ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
> - .elseif IHSRR
> - b kvmppc_skip_Hinterrupt
> - .else
> - b kvmppc_skip_interrupt
> - .endif
> - .endif
> .endm
>
> #else
> @@ -1128,7 +1098,6 @@ INT_DEFINE_BEGIN(machine_check)
> ISET_RI=0
> IDAR=1
> IDSISR=1
> - IKVM_SKIP=1
> IKVM_REAL=1
> INT_DEFINE_END(machine_check)
>
> @@ -1419,7 +1388,6 @@ INT_DEFINE_BEGIN(data_access)
> IVEC=0x300
> IDAR=1
> IDSISR=1
> - IKVM_SKIP=1
> IKVM_REAL=1
> INT_DEFINE_END(data_access)
>
> @@ -1465,7 +1433,6 @@ INT_DEFINE_BEGIN(data_access_slb)
> IVEC=0x380
> IRECONCILE=0
> IDAR=1
> - IKVM_SKIP=1
> IKVM_REAL=1
> INT_DEFINE_END(data_access_slb)
>
> @@ -2111,7 +2078,6 @@ INT_DEFINE_BEGIN(h_data_storage)
> IHSRR=1
> IDAR=1
> IDSISR=1
> - IKVM_SKIP=1
> IKVM_REAL=1
> IKVM_VIRT=1
> INT_DEFINE_END(h_data_storage)
> @@ -3088,32 +3054,6 @@ EXPORT_SYMBOL(do_uaccess_flush)
> MASKED_INTERRUPT
> MASKED_INTERRUPT hsrr=1
>
> -#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
> -kvmppc_skip_interrupt:
> - /*
> - * Here all GPRs are unchanged from when the interrupt happened
> - * except for r13, which is saved in SPRG_SCRATCH0.
> - */
> - mfspr r13, SPRN_SRR0
> - addi r13, r13, 4
> - mtspr SPRN_SRR0, r13
> - GET_SCRATCH0(r13)
> - RFI_TO_KERNEL
> - b .
> -
> -kvmppc_skip_Hinterrupt:
> - /*
> - * Here all GPRs are unchanged from when the interrupt happened
> - * except for r13, which is saved in SPRG_SCRATCH0.
> - */
> - mfspr r13, SPRN_HSRR0
> - addi r13, r13, 4
> - mtspr SPRN_HSRR0, r13
> - GET_SCRATCH0(r13)
> - HRFI_TO_KERNEL
> - b .
> -#endif
> -
> /*
> * Relocation-on interrupts: A subset of the interrupts can be delivered
> * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
> diff --git a/arch/powerpc/kvm/book3s_64_entry.S b/arch/powerpc/kvm/book3s_64_entry.S
> index 147ebf1c3c1f..820d103e5f50 100644
> --- a/arch/powerpc/kvm/book3s_64_entry.S
> +++ b/arch/powerpc/kvm/book3s_64_entry.S
> @@ -1,9 +1,10 @@
> +#include <asm/asm-offsets.h>
> #include <asm/cache.h>
> -#include <asm/ppc_asm.h>
> +#include <asm/exception-64s.h>
> #include <asm/kvm_asm.h>
> -#include <asm/reg.h>
> -#include <asm/asm-offsets.h>
> #include <asm/kvm_book3s_asm.h>
> +#include <asm/ppc_asm.h>
> +#include <asm/reg.h>
>
> /*
> * This is branched to from interrupt handlers in exception-64s.S which set
> @@ -19,17 +20,64 @@ kvmppc_interrupt:
> * guest R12 saved in shadow VCPU SCRATCH0
> * guest R13 saved in SPRN_SCRATCH0
> */
> + std r9,HSTATE_SCRATCH2(r13)
> + lbz r9,HSTATE_IN_GUEST(r13)
> + cmpwi r9,KVM_GUEST_MODE_SKIP
> + beq- .Lmaybe_skip
> +.Lno_skip:
> #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> - std r9, HSTATE_SCRATCH2(r13)
> - lbz r9, HSTATE_IN_GUEST(r13)
> - cmpwi r9, KVM_GUEST_MODE_HOST_HV
> + cmpwi r9,KVM_GUEST_MODE_HOST_HV
> beq kvmppc_bad_host_intr
> #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
> - cmpwi r9, KVM_GUEST_MODE_GUEST
> - ld r9, HSTATE_SCRATCH2(r13)
> + cmpwi r9,KVM_GUEST_MODE_GUEST
> + ld r9,HSTATE_SCRATCH2(r13)
> beq kvmppc_interrupt_pr
> #endif
> b kvmppc_interrupt_hv
> #else
> b kvmppc_interrupt_pr
> #endif
> +
> +/*
> + * KVM uses a trick where it is running in MSR[HV]=1 mode in real-mode with the
> + * guest MMU context loaded, and it sets KVM_GUEST_MODE_SKIP and enables
> + * MSR[DR]=1 while leaving MSR[IR]=0, so it continues to fetch HV instructions
> + * but loads and stores will access the guest context. This is used to load
> + * the faulting instruction without walking page tables.
> + *
> + * However the guest context may not be able to translate, or it may cause a
> + * machine check or other issue, which will result in a fault in the host
> + * (even with KVM-HV).
> + *
> + * These faults are caught here and if the fault was (or was likely) due to
> + * that load, then we just return with the PC advanced +4 and skip the load,
> + * which then goes via the slow path.
> + */
> +.Lmaybe_skip:
> + cmpwi r12,BOOK3S_INTERRUPT_MACHINE_CHECK
> + beq 1f
> + cmpwi r12,BOOK3S_INTERRUPT_DATA_STORAGE
> + beq 1f
> + cmpwi r12,BOOK3S_INTERRUPT_DATA_SEGMENT
> + beq 1f
> +#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> + cmpwi r12,BOOK3S_INTERRUPT_H_DATA_STORAGE | 0x2
> + beq 2f
> +#endif
> + b .Lno_skip
> +1: mfspr r9,SPRN_SRR0
> + addi r9,r9,4
> + mtspr SPRN_SRR0,r9
> + ld r12,HSTATE_SCRATCH0(r13)
> + ld r9,HSTATE_SCRATCH2(r13)
> + GET_SCRATCH0(r13)
> + RFI_TO_KERNEL
> +#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> +2: mfspr r9,SPRN_HSRR0
> + addi r9,r9,4
> + mtspr SPRN_HSRR0,r9
> + ld r12,HSTATE_SCRATCH0(r13)
> + ld r9,HSTATE_SCRATCH2(r13)
> + GET_SCRATCH0(r13)
> + HRFI_TO_KERNEL
> +#endif
^ permalink raw reply
* Re: [GIT PULL] Please pull powerpc/linux.git powerpc-5.12-1 tag
From: Linus Torvalds @ 2021-02-22 22:37 UTC (permalink / raw)
To: Michael Ellerman
Cc: ananth, aik, kernelfans, cmr, Zheng Yongjun,
Oliver O'Halloran, sandipan, cy.fan, Markus Elfring,
jiapeng.chong, skirmisher, Florian Fainelli, Bhaskar Chowdhury,
eerykitty, Aneesh Kumar K.V, haren, ganeshgr, msuchanek, nathanl,
Rob Herring, kjain, Nick Piggin, Mark Brown, Qian Cai, clg,
hbathini, Athira Jajeev, Randy Dunlap, Linux Kernel Mailing List,
fbarrat, Po-Hsu Lin, linuxppc-dev
In-Reply-To: <87o8gctii6.fsf@mpe.ellerman.id.au>
On Mon, Feb 22, 2021 at 4:06 AM Michael Ellerman <mpe@ellerman.id.au> wrote:
>
> Please pull powerpc updates for 5.12.
Pulled. However:
> mode change 100755 => 100644 tools/testing/selftests/powerpc/eeh/eeh-functions.sh
> create mode 100755 tools/testing/selftests/powerpc/eeh/eeh-vf-aware.sh
> create mode 100755 tools/testing/selftests/powerpc/eeh/eeh-vf-unaware.sh
Somebody is being confused.
Why create two new shell scripts with the proper executable bit, and
then remove the executable bit from an existing one?
That just seems very inconsistent.
Linus
^ permalink raw reply
* Re: [GIT PULL] Please pull powerpc/linux.git powerpc-5.12-1 tag
From: Oliver O'Halloran @ 2021-02-22 23:00 UTC (permalink / raw)
To: Linus Torvalds
Cc: Ananth N Mavinakayanahalli, Alexey Kardashevskiy, Pingfan Liu,
cmr, Zheng Yongjun, Po-Hsu Lin, sandipan, cy.fan, Markus Elfring,
jiapeng.chong, skirmisher, Florian Fainelli, Bhaskar Chowdhury,
eerykitty, Haren Myneni, ganeshgr, Michal Suchanek, Nathan Lynch,
Rob Herring, kjain, Nick Piggin, Mark Brown, Qian Cai,
Cédric Le Goater, Hari Bathini, Athira Jajeev, Randy Dunlap,
Linux Kernel Mailing List, Aneesh Kumar K.V, Frederic Barrat,
linuxppc-dev
In-Reply-To: <CAHk-=wj9nZYEZnTYMpHwVT6B6P+zFXW_P-PWH_bRR5bp-cWbOQ@mail.gmail.com>
On Tue, Feb 23, 2021 at 9:44 AM Linus Torvalds
<torvalds@linux-foundation.org> wrote:
>
> On Mon, Feb 22, 2021 at 4:06 AM Michael Ellerman <mpe@ellerman.id.au> wrote:
> >
> > Please pull powerpc updates for 5.12.
>
> Pulled. However:
>
> > mode change 100755 => 100644 tools/testing/selftests/powerpc/eeh/eeh-functions.sh
> > create mode 100755 tools/testing/selftests/powerpc/eeh/eeh-vf-aware.sh
> > create mode 100755 tools/testing/selftests/powerpc/eeh/eeh-vf-unaware.sh
>
> Somebody is being confused.
>
> Why create two new shell scripts with the proper executable bit, and
> then remove the executable bit from an existing one?
>
> That just seems very inconsistent.
eeh-function.sh just provides some helper functions for the other
scripts and doesn't do anything when executed directly. I thought
making it non-executable made sense.
>
> Linus
^ permalink raw reply
* [powerpc:merge] BUILD SUCCESS b267c8c58643460da9159ee69f46b3945cfd9de6
From: kernel test robot @ 2021-02-22 23:21 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git merge
branch HEAD: b267c8c58643460da9159ee69f46b3945cfd9de6 Automatic merge of 'master' into merge (2021-02-22 21:30)
elapsed time: 723m
configs tested: 123
configs skipped: 2
The following configs have been built successfully.
More configs may be tested in the coming days.
gcc tested configs:
arm defconfig
arm64 allyesconfig
arm64 defconfig
arm allyesconfig
arm allmodconfig
mips mtx1_defconfig
mips malta_qemu_32r6_defconfig
powerpc fsp2_defconfig
h8300 alldefconfig
powerpc icon_defconfig
sh se7343_defconfig
ia64 zx1_defconfig
arm shannon_defconfig
arm mvebu_v5_defconfig
powerpc kmeter1_defconfig
sh ecovec24_defconfig
powerpc redwood_defconfig
sh apsh4a3a_defconfig
powerpc ppc44x_defconfig
sh polaris_defconfig
powerpc g5_defconfig
mips malta_defconfig
arc nsim_700_defconfig
sh se7705_defconfig
powerpc chrp32_defconfig
ia64 generic_defconfig
powerpc bamboo_defconfig
arm simpad_defconfig
arc nsimosci_hs_defconfig
arm netwinder_defconfig
arm spitz_defconfig
m68k sun3_defconfig
powerpc mpc85xx_cds_defconfig
powerpc akebono_defconfig
mips ar7_defconfig
sparc sparc32_defconfig
ia64 gensparse_defconfig
powerpc ppa8548_defconfig
powerpc mpc5200_defconfig
arm davinci_all_defconfig
mips tb0219_defconfig
arm keystone_defconfig
sh sh7785lcr_32bit_defconfig
powerpc makalu_defconfig
powerpc walnut_defconfig
s390 allyesconfig
mips jmr3927_defconfig
mips maltasmvp_defconfig
m68k multi_defconfig
arm realview_defconfig
powerpc taishan_defconfig
arm pxa168_defconfig
mips ci20_defconfig
ia64 allmodconfig
ia64 defconfig
ia64 allyesconfig
m68k allmodconfig
m68k defconfig
m68k allyesconfig
nios2 defconfig
arc allyesconfig
nds32 allnoconfig
c6x allyesconfig
nds32 defconfig
nios2 allyesconfig
csky defconfig
alpha defconfig
alpha allyesconfig
xtensa allyesconfig
h8300 allyesconfig
arc defconfig
sh allmodconfig
parisc defconfig
s390 allmodconfig
parisc allyesconfig
s390 defconfig
i386 allyesconfig
sparc allyesconfig
sparc defconfig
i386 tinyconfig
i386 defconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
x86_64 randconfig-a001-20210222
x86_64 randconfig-a002-20210222
x86_64 randconfig-a003-20210222
x86_64 randconfig-a005-20210222
x86_64 randconfig-a006-20210222
x86_64 randconfig-a004-20210222
i386 randconfig-a005-20210222
i386 randconfig-a006-20210222
i386 randconfig-a004-20210222
i386 randconfig-a003-20210222
i386 randconfig-a001-20210222
i386 randconfig-a002-20210222
i386 randconfig-a013-20210222
i386 randconfig-a012-20210222
i386 randconfig-a011-20210222
i386 randconfig-a014-20210222
i386 randconfig-a016-20210222
i386 randconfig-a015-20210222
riscv nommu_k210_defconfig
riscv allyesconfig
riscv nommu_virt_defconfig
riscv allnoconfig
riscv defconfig
riscv rv32_defconfig
riscv allmodconfig
x86_64 allyesconfig
x86_64 rhel-7.6-kselftests
x86_64 defconfig
x86_64 rhel-8.3
x86_64 rhel-8.3-kbuiltin
x86_64 kexec
clang tested configs:
x86_64 randconfig-a015-20210222
x86_64 randconfig-a011-20210222
x86_64 randconfig-a012-20210222
x86_64 randconfig-a016-20210222
x86_64 randconfig-a014-20210222
x86_64 randconfig-a013-20210222
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
* [powerpc:fixes-test] BUILD SUCCESS a5c2f7d40511976f30de38b4374b8da2b39a073c
From: kernel test robot @ 2021-02-22 23:21 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git fixes-test
branch HEAD: a5c2f7d40511976f30de38b4374b8da2b39a073c powerpc/4xx: Fix build errors from mfdcr()
elapsed time: 724m
configs tested: 101
configs skipped: 88
The following configs have been built successfully.
More configs may be tested in the coming days.
gcc tested configs:
arm defconfig
arm64 allyesconfig
arm64 defconfig
arm allyesconfig
arm allmodconfig
mips mtx1_defconfig
mips malta_qemu_32r6_defconfig
powerpc fsp2_defconfig
h8300 alldefconfig
powerpc icon_defconfig
sh se7343_defconfig
ia64 zx1_defconfig
arm shannon_defconfig
arm mvebu_v5_defconfig
powerpc kmeter1_defconfig
sh ecovec24_defconfig
sh polaris_defconfig
powerpc g5_defconfig
mips malta_defconfig
arc nsim_700_defconfig
powerpc akebono_defconfig
powerpc ppa8548_defconfig
powerpc mpc5200_defconfig
arm davinci_all_defconfig
mips tb0219_defconfig
arm keystone_defconfig
sh sh7785lcr_32bit_defconfig
powerpc makalu_defconfig
arm realview_defconfig
powerpc taishan_defconfig
arm pxa168_defconfig
arm simpad_defconfig
mips ci20_defconfig
powerpc mpc8560_ads_defconfig
powerpc lite5200b_defconfig
powerpc ppc6xx_defconfig
ia64 allmodconfig
ia64 defconfig
ia64 allyesconfig
m68k allmodconfig
m68k defconfig
m68k allyesconfig
nios2 defconfig
arc allyesconfig
nds32 allnoconfig
c6x allyesconfig
nds32 defconfig
nios2 allyesconfig
csky defconfig
alpha defconfig
alpha allyesconfig
xtensa allyesconfig
h8300 allyesconfig
arc defconfig
sh allmodconfig
parisc defconfig
s390 allyesconfig
s390 allmodconfig
parisc allyesconfig
s390 defconfig
i386 allyesconfig
sparc allyesconfig
sparc defconfig
i386 tinyconfig
i386 defconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
x86_64 randconfig-a001-20210222
x86_64 randconfig-a002-20210222
x86_64 randconfig-a003-20210222
x86_64 randconfig-a005-20210222
x86_64 randconfig-a006-20210222
x86_64 randconfig-a004-20210222
i386 randconfig-a013-20210222
i386 randconfig-a012-20210222
i386 randconfig-a011-20210222
i386 randconfig-a014-20210222
i386 randconfig-a016-20210222
i386 randconfig-a015-20210222
riscv nommu_k210_defconfig
riscv allyesconfig
riscv nommu_virt_defconfig
riscv allnoconfig
riscv defconfig
riscv rv32_defconfig
riscv allmodconfig
x86_64 allyesconfig
x86_64 rhel-7.6-kselftests
x86_64 defconfig
x86_64 rhel-8.3
x86_64 rhel-8.3-kbuiltin
x86_64 kexec
clang tested configs:
x86_64 randconfig-a015-20210222
x86_64 randconfig-a011-20210222
x86_64 randconfig-a012-20210222
x86_64 randconfig-a016-20210222
x86_64 randconfig-a014-20210222
x86_64 randconfig-a013-20210222
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
* Re: linux-next: manual merge of the spi tree with the powerpc tree
From: Stephen Rothwell @ 2021-02-22 23:57 UTC (permalink / raw)
To: Michael Ellerman, PowerPC
Cc: Linux Next Mailing List, Mark Brown, Linux Kernel Mailing List
In-Reply-To: <20210212152755.5c82563a@canb.auug.org.au>
[-- Attachment #1: Type: text/plain, Size: 1624 bytes --]
Hi Stephen,
On Fri, 12 Feb 2021 15:31:42 +1100 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> Hi all,
>
> Today's linux-next merge of the spi tree got a conflict in:
>
> drivers/spi/spi-mpc52xx.c
>
> between commit:
>
> e10656114d32 ("spi: mpc52xx: Avoid using get_tbl()")
>
> from the powerpc tree and commit:
>
> 258ea99fe25a ("spi: spi-mpc52xx: Use new structure for SPI transfer delays")
>
> from the spi tree.
>
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging. You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
>
> diff --cc drivers/spi/spi-mpc52xx.c
> index e6a30f232370,36f941500676..000000000000
> --- a/drivers/spi/spi-mpc52xx.c
> +++ b/drivers/spi/spi-mpc52xx.c
> @@@ -247,8 -247,10 +247,10 @@@ static int mpc52xx_spi_fsmstate_transfe
> /* Is the transfer complete? */
> ms->len--;
> if (ms->len == 0) {
> - ms->timestamp = get_tbl();
> + ms->timestamp = mftb();
> - ms->timestamp += ms->transfer->delay_usecs * tb_ticks_per_usec;
> + if (ms->transfer->delay.unit == SPI_DELAY_UNIT_USECS)
> + ms->timestamp += ms->transfer->delay.value *
> + tb_ticks_per_usec;
> ms->state = mpc52xx_spi_fsmstate_wait;
> return FSM_CONTINUE;
> }
This is now a conflict between the powerpc tree and Linus' tree.
--
Cheers,
Stephen Rothwell
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [GIT PULL] Please pull powerpc/linux.git powerpc-5.12-1 tag
From: Michael Ellerman @ 2021-02-23 0:53 UTC (permalink / raw)
To: Oliver O'Halloran, Linus Torvalds
Cc: Ananth N Mavinakayanahalli, Alexey Kardashevskiy, Pingfan Liu,
cmr, Zheng Yongjun, Po-Hsu Lin, sandipan, cy.fan, Markus Elfring,
jiapeng.chong, skirmisher, Florian Fainelli, Bhaskar Chowdhury,
eerykitty, Aneesh Kumar K.V, Haren Myneni, ganeshgr,
Michal Suchanek, Nathan Lynch, Rob Herring, kjain, Nick Piggin,
Mark Brown, Qian Cai, Cédric Le Goater, Hari Bathini,
Athira Jajeev, Randy Dunlap, Linux Kernel Mailing List,
Frederic Barrat, linuxppc-dev
In-Reply-To: <CAOSf1CH67Htam33UvYhaypD7HW7q1xU4tUW0soshao2FKa+Czw@mail.gmail.com>
"Oliver O'Halloran" <oohall@gmail.com> writes:
> On Tue, Feb 23, 2021 at 9:44 AM Linus Torvalds
> <torvalds@linux-foundation.org> wrote:
>>
>> On Mon, Feb 22, 2021 at 4:06 AM Michael Ellerman <mpe@ellerman.id.au> wrote:
>> >
>> > Please pull powerpc updates for 5.12.
>>
>> Pulled. However:
>>
>> > mode change 100755 => 100644 tools/testing/selftests/powerpc/eeh/eeh-functions.sh
>> > create mode 100755 tools/testing/selftests/powerpc/eeh/eeh-vf-aware.sh
>> > create mode 100755 tools/testing/selftests/powerpc/eeh/eeh-vf-unaware.sh
>>
>> Somebody is being confused.
>>
>> Why create two new shell scripts with the proper executable bit, and
>> then remove the executable bit from an existing one?
>>
>> That just seems very inconsistent.
>
> eeh-function.sh just provides some helper functions for the other
> scripts and doesn't do anything when executed directly. I thought
> making it non-executable made sense.
Yeah I think it does make sense. It just looks a bit odd in the diffstat
like this. Maybe if we called it lib.sh it would be more obvious?
cheers
^ permalink raw reply
* Re: [GIT PULL] Please pull powerpc/linux.git powerpc-5.12-1 tag
From: Michael Ellerman @ 2021-02-23 1:13 UTC (permalink / raw)
To: Rob Herring
Cc: ananth, Alexey Kardashevskiy, kernelfans, cmr, zhengyongjun3,
Oliver O'Halloran, sandipan, cy.fan, SF Markus Elfring,
jiapeng.chong, skirmisher, Florian Fainelli, Bhaskar Chowdhury,
eerykitty, Aneesh Kumar K.V, Haren Myneni, ganeshgr,
Michal Suchanek, nathanl, kjain, Nicholas Piggin, Mark Brown,
Qian Cai, Cédric Le Goater, Hari Bathini, atrajeev,
Linus Torvalds, Randy Dunlap, linux-kernel@vger.kernel.org,
fbarrat, po-hsu.lin, linuxppc-dev
In-Reply-To: <CAL_Jsq+5u82rS+izM2Ds0jdsQKc9C_MCFLmmRvrxhD_6ofNiJQ@mail.gmail.com>
Rob Herring <robh@kernel.org> writes:
> On Mon, Feb 22, 2021 at 6:05 AM Michael Ellerman <mpe@ellerman.id.au> wrote:
>>
>> -----BEGIN PGP SIGNED MESSAGE-----
>> Hash: SHA256
>>
>> Hi Linus,
>>
>> Please pull powerpc updates for 5.12.
>>
>> There will be a conflict with the devicetree tree. It's OK to just take their
>> side of the conflict, we'll fix up the minor behaviour change that causes in a
>> follow-up patch.
>
> The issues turned out to be worse than just this, so I've dropped the
> conflicting change for 5.12.
OK, no worries.
cheers
^ permalink raw reply
* Re: [PATCH RFC v1 5/6] xen-swiotlb: convert variables to arrays
From: Stefano Stabellini @ 2021-02-23 1:22 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk
Cc: ulf.hansson, airlied, joonas.lahtinen, dri-devel, linux-kernel,
paulus, hpa, Christoph Hellwig, m.szyprowski, sstabellini,
adrian.hunter, Dongli Zhang, x86, joe.jin, mingo, peterz, mingo,
bskeggs, linux-pci, xen-devel, matthew.auld, thomas.lendacky,
intel-gfx, jani.nikula, bp, rodrigo.vivi, bhelgaas,
Boris Ostrovsky, chris, jgross, tsbogend, nouveau, robin.murphy,
linux-mmc, linux-mips, iommu, tglx, bauerman, daniel, akpm,
linuxppc-dev, rppt
In-Reply-To: <YDAgT2ZIdncNwNlf@Konrads-MacBook-Pro.local>
On Fri, 19 Feb 2021, Konrad Rzeszutek Wilk wrote:
> On Sun, Feb 07, 2021 at 04:56:01PM +0100, Christoph Hellwig wrote:
> > On Thu, Feb 04, 2021 at 09:40:23AM +0100, Christoph Hellwig wrote:
> > > So one thing that has been on my mind for a while: I'd really like
> > > to kill the separate dma ops in Xen swiotlb. If we compare xen-swiotlb
> > > to swiotlb the main difference seems to be:
> > >
> > > - additional reasons to bounce I/O vs the plain DMA capable
> > > - the possibility to do a hypercall on arm/arm64
> > > - an extra translation layer before doing the phys_to_dma and vice
> > > versa
> > > - an special memory allocator
> > >
> > > I wonder if inbetween a few jump labels or other no overhead enablement
> > > options and possibly better use of the dma_range_map we could kill
> > > off most of swiotlb-xen instead of maintaining all this code duplication?
> >
> > So I looked at this a bit more.
> >
> > For x86 with XENFEAT_auto_translated_physmap (how common is that?)
>
> Juergen, Boris please correct me if I am wrong, but that XENFEAT_auto_translated_physmap
> only works for PVH guests?
ARM is always XENFEAT_auto_translated_physmap
> > pfn_to_gfn is a nop, so plain phys_to_dma/dma_to_phys do work as-is.
> >
> > xen_arch_need_swiotlb always returns true for x86, and
> > range_straddles_page_boundary should never be true for the
> > XENFEAT_auto_translated_physmap case.
>
> Correct. The kernel should have no clue of what the real MFNs are
> for PFNs.
On ARM, Linux knows the MFNs because for local pages MFN == PFN and for
foreign pages it keeps track in arch/arm/xen/p2m.c. More on this below.
xen_arch_need_swiotlb only returns true on ARM in rare situations where
bouncing on swiotlb buffers is required. Today it only happens on old
versions of Xen that don't support the cache flushing hypercall but
there could be more cases in the future.
> >
> > So as far as I can tell the mapping fast path for the
> > XENFEAT_auto_translated_physmap can be trivially reused from swiotlb.
> >
> > That leaves us with the next more complicated case, x86 or fully cache
> > coherent arm{,64} without XENFEAT_auto_translated_physmap. In that case
> > we need to patch in a phys_to_dma/dma_to_phys that performs the MFN
> > lookup, which could be done using alternatives or jump labels.
> > I think if that is done right we should also be able to let that cover
> > the foreign pages in is_xen_swiotlb_buffer/is_swiotlb_buffer, but
> > in that worst case that would need another alternative / jump label.
> >
> > For non-coherent arm{,64} we'd also need to use alternatives or jump
> > labels to for the cache maintainance ops, but that isn't a hard problem
> > either.
With the caveat that ARM is always XENFEAT_auto_translated_physmap, what
you wrote looks correct. I am writing down a brief explanation on how
swiotlb-xen is used on ARM.
pfn: address as seen by the guest, pseudo-physical address in ARM terminology
mfn (or bfn): real address, physical address in ARM terminology
On ARM dom0 is auto_translated (so Xen sets up the stage2 translation
in the MMU) and the translation is 1:1. So pfn == mfn for Dom0.
However, when another domain shares a page with Dom0, that page is not
1:1. Swiotlb-xen is used to retrieve the mfn for the foreign page at
xen_swiotlb_map_page. It does that with xen_phys_to_bus -> pfn_to_bfn.
It is implemented with a rbtree in arch/arm/xen/p2m.c.
In addition, swiotlb-xen is also used to cache-flush the page via
hypercall at xen_swiotlb_unmap_page. That is done because dev_addr is
really the mfn at unmap_page and we don't know the pfn for it. We can do
pfn-to-mfn but we cannot do mfn-to-pfn (there are good reasons for it
unfortunately). The only way to cache-flush by mfn is by issuing a
hypercall. The hypercall is implemented in arch/arm/xen/mm.c.
The pfn != bfn and pfn_valid() checks are used to detect if the page is
local (of dom0) or foreign; they work thanks to the fact that Dom0 is
1:1 mapped.
Getting back to what you wrote, yes if we had a way to do MFN lookups in
phys_to_dma, and a way to call the hypercall at unmap_page if the page
is foreign (e.g. if it fails a pfn_valid check) then I think we would be
good from an ARM perspective. The only exception is when
xen_arch_need_swiotlb returns true, in which case we need to actually
bounce on swiotlb buffers.
^ permalink raw reply
* Re: [PATCH v4 2/3] KVM: PPC: Book3S HV: Add support for H_RPT_INVALIDATE
From: David Gibson @ 2021-02-22 23:26 UTC (permalink / raw)
To: Bharata B Rao; +Cc: farosas, aneesh.kumar, npiggin, kvm-ppc, linuxppc-dev
In-Reply-To: <20210222064608.GB3672042@in.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 9276 bytes --]
On Mon, Feb 22, 2021 at 12:16:08PM +0530, Bharata B Rao wrote:
> On Wed, Feb 17, 2021 at 11:38:07AM +1100, David Gibson wrote:
> > On Mon, Feb 15, 2021 at 12:05:41PM +0530, Bharata B Rao wrote:
> > > Implement H_RPT_INVALIDATE hcall and add KVM capability
> > > KVM_CAP_PPC_RPT_INVALIDATE to indicate the support for the same.
> > >
> > > This hcall does two types of TLB invalidations:
> > >
> > > 1. Process-scoped invalidations for guests with LPCR[GTSE]=0.
> > > This is currently not used in KVM as GTSE is not usually
> > > disabled in KVM.
> > > 2. Partition-scoped invalidations that an L1 hypervisor does on
> > > behalf of an L2 guest. This replaces the uses of the existing
> > > hcall H_TLB_INVALIDATE.
> > >
> > > In order to handle process scoped invalidations of L2, we
> > > intercept the nested exit handling code in L0 only to handle
> > > H_TLB_INVALIDATE hcall.
> > >
> > > Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
> > > ---
> > > Documentation/virt/kvm/api.rst | 17 +++++
> > > arch/powerpc/include/asm/kvm_book3s.h | 3 +
> > > arch/powerpc/include/asm/mmu_context.h | 11 +++
> > > arch/powerpc/kvm/book3s_hv.c | 91 ++++++++++++++++++++++++
> > > arch/powerpc/kvm/book3s_hv_nested.c | 96 ++++++++++++++++++++++++++
> > > arch/powerpc/kvm/powerpc.c | 3 +
> > > arch/powerpc/mm/book3s64/radix_tlb.c | 25 +++++++
> > > include/uapi/linux/kvm.h | 1 +
> > > 8 files changed, 247 insertions(+)
> > >
> > > diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
> > > index 99ceb978c8b0..416c36aa35d4 100644
> > > --- a/Documentation/virt/kvm/api.rst
> > > +++ b/Documentation/virt/kvm/api.rst
> > > @@ -6038,6 +6038,23 @@ KVM_EXIT_X86_RDMSR and KVM_EXIT_X86_WRMSR exit notifications which user space
> > > can then handle to implement model specific MSR handling and/or user notifications
> > > to inform a user that an MSR was not handled.
> > >
> > > +7.22 KVM_CAP_PPC_RPT_INVALIDATE
> > > +------------------------------
> > > +
> > > +:Capability: KVM_CAP_PPC_RPT_INVALIDATE
> > > +:Architectures: ppc
> > > +:Type: vm
> > > +
> > > +This capability indicates that the kernel is capable of handling
> > > +H_RPT_INVALIDATE hcall.
> > > +
> > > +In order to enable the use of H_RPT_INVALIDATE in the guest,
> > > +user space might have to advertise it for the guest. For example,
> > > +IBM pSeries (sPAPR) guest starts using it if "hcall-rpt-invalidate" is
> > > +present in the "ibm,hypertas-functions" device-tree property.
> > > +
> > > +This capability is always enabled.
> >
> > I guess that means it's always enabled when it's available - I'm
> > pretty sure it won't be enabled on POWER8 or on PR KVM.
>
> Correct, will reword this and restrict this to POWER9, radix etc
>
> >
> > > +
> > > 8. Other capabilities.
> > > ======================
> > >
> > > diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
> > > index d32ec9ae73bd..0f1c5fa6e8ce 100644
> > > --- a/arch/powerpc/include/asm/kvm_book3s.h
> > > +++ b/arch/powerpc/include/asm/kvm_book3s.h
> > > @@ -298,6 +298,9 @@ void kvmhv_set_ptbl_entry(unsigned int lpid, u64 dw0, u64 dw1);
> > > void kvmhv_release_all_nested(struct kvm *kvm);
> > > long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu);
> > > long kvmhv_do_nested_tlbie(struct kvm_vcpu *vcpu);
> > > +long kvmhv_h_rpti_nested(struct kvm_vcpu *vcpu, unsigned long lpid,
> > > + unsigned long type, unsigned long pg_sizes,
> > > + unsigned long start, unsigned long end);
> > > int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu,
> > > u64 time_limit, unsigned long lpcr);
> > > void kvmhv_save_hv_regs(struct kvm_vcpu *vcpu, struct hv_guest_state *hr);
> > > diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
> > > index d5821834dba9..fbf3b5b45fe9 100644
> > > --- a/arch/powerpc/include/asm/mmu_context.h
> > > +++ b/arch/powerpc/include/asm/mmu_context.h
> > > @@ -124,8 +124,19 @@ static inline bool need_extra_context(struct mm_struct *mm, unsigned long ea)
> > >
> > > #if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) && defined(CONFIG_PPC_RADIX_MMU)
> > > extern void radix_kvm_prefetch_workaround(struct mm_struct *mm);
> > > +void do_h_rpt_invalidate(unsigned long pid, unsigned long lpid,
> > > + unsigned long type, unsigned long page_size,
> > > + unsigned long psize, unsigned long start,
> > > + unsigned long end);
> > > #else
> > > static inline void radix_kvm_prefetch_workaround(struct mm_struct *mm) { }
> > > +static inline void do_h_rpt_invalidate(unsigned long pid,
> > > + unsigned long lpid,
> > > + unsigned long type,
> > > + unsigned long page_size,
> > > + unsigned long psize,
> > > + unsigned long start,
> > > + unsigned long end) { }
> > > #endif
> > >
> > > extern void switch_cop(struct mm_struct *next);
> > > diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> > > index 6f612d240392..802cb77c39cc 100644
> > > --- a/arch/powerpc/kvm/book3s_hv.c
> > > +++ b/arch/powerpc/kvm/book3s_hv.c
> > > @@ -904,6 +904,64 @@ static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
> > > return yield_count;
> > > }
> > >
> > > +static void do_h_rpt_invalidate_prs(unsigned long pid, unsigned long lpid,
> > > + unsigned long type, unsigned long pg_sizes,
> > > + unsigned long start, unsigned long end)
> > > +{
> > > + unsigned long psize;
> > > +
> > > + if (pg_sizes & H_RPTI_PAGE_64K) {
> > > + psize = rpti_pgsize_to_psize(pg_sizes & H_RPTI_PAGE_64K);
> > > + do_h_rpt_invalidate(pid, lpid, type, (1UL << 16), psize,
> > > + start, end);
> > > + }
> > > +
> > > + if (pg_sizes & H_RPTI_PAGE_2M) {
> > > + psize = rpti_pgsize_to_psize(pg_sizes & H_RPTI_PAGE_2M);
> > > + do_h_rpt_invalidate(pid, lpid, type, (1UL << 21), psize,
> > > + start, end);
> > > + }
> > > +
> > > + if (pg_sizes & H_RPTI_PAGE_1G) {
> > > + psize = rpti_pgsize_to_psize(pg_sizes & H_RPTI_PAGE_1G);
> > > + do_h_rpt_invalidate(pid, lpid, type, (1UL << 30), psize,
> > > + start, end);
> > > + }
> >
> > Hrm. Here you're stepping through the hcall defined pagesizes, then
> > mapping each one to the Linux internal page size defs.
> >
> > It might be more elegant to step through mmu_psize_defs table, and
> > conditionally performan an invalidate on that pagesize if the
> > corresponding bit in pg_sizes is set (as noted earlier you could
> > easily add the H_RPTI_PAGE bit to the table). That way it's a direct
> > table lookup rather than a bunch of ifs or switches.
>
> Yes, let me give this a try.
>
> >
> > > +}
> > > +
> > > +static long kvmppc_h_rpt_invalidate(struct kvm_vcpu *vcpu,
> > > + unsigned long pid, unsigned long target,
> > > + unsigned long type, unsigned long pg_sizes,
> > > + unsigned long start, unsigned long end)
> > > +{
> > > + if (!kvm_is_radix(vcpu->kvm))
> > > + return H_UNSUPPORTED;
> > > +
> > > + if (kvmhv_on_pseries())
> > > + return H_UNSUPPORTED;
> >
> > This doesn't seem quite right. If you have multiply nested guests,
> > won't the L2 be issueing H_RPT_INVALIDATE hcalls to the L1 on behalf
> > of the L3? The L1 would have to implement them by calling the L0, but
> > the L1 can't just reject them, no?
> >
> > Likewise for the !H_RPTI_TYPE_NESTED case, but on what happens to be a
> > nested guest in any case, couldn't this case legitimately arise and
> > need to be handled?
>
> The approach is to handle this hcall on behalf of all the nested
> guests in L0 only. I am intercepting the nested exit path precisely
> for this as shown in the below hunk.
Ah, I see. Might be worth commenting that, since it's not necessarily obvious.
>
> > > @@ -1573,6 +1640,30 @@ static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)
> > > if (!xics_on_xive())
> > > kvmppc_xics_rm_complete(vcpu, 0);
> > > break;
> > > + case BOOK3S_INTERRUPT_SYSCALL:
> > > + {
> > > + unsigned long req = kvmppc_get_gpr(vcpu, 3);
> > > +
> > > + if (req != H_RPT_INVALIDATE) {
> > > + r = RESUME_HOST;
> > > + break;
> > > + }
> > > +
> > > + /*
> > > + * The H_RPT_INVALIDATE hcalls issued by nested
> > > + * guest for process scoped invalidations when
> > > + * GTSE=0 are handled here.
> > > + */
> > > + do_h_rpt_invalidate_prs(kvmppc_get_gpr(vcpu, 4),
> > > + vcpu->arch.nested->shadow_lpid,
> > > + kvmppc_get_gpr(vcpu, 5),
> > > + kvmppc_get_gpr(vcpu, 6),
> > > + kvmppc_get_gpr(vcpu, 7),
> > > + kvmppc_get_gpr(vcpu, 8));
> > > + kvmppc_set_gpr(vcpu, 3, H_SUCCESS);
> > > + r = RESUME_GUEST;
> > > + break;
> > > + }
> > > default:
> > > r = RESUME_HOST;
> > > break;
>
> Thanks for your review.
>
> Regards,
> Bharata.
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* Re: [PATCH kernel] powerpc/iommu: Annotate nested lock for lockdep
From: Alexey Kardashevskiy @ 2021-02-23 5:13 UTC (permalink / raw)
To: Frederic Barrat, linuxppc-dev; +Cc: kvm-ppc
In-Reply-To: <49b1f5cb-107c-296f-c339-13e627a73d6d@linux.ibm.com>
On 18/02/2021 23:59, Frederic Barrat wrote:
>
>
> On 16/02/2021 04:20, Alexey Kardashevskiy wrote:
>> The IOMMU table is divided into pools for concurrent mappings and each
>> pool has a separate spinlock. When taking the ownership of an IOMMU group
>> to pass through a device to a VM, we lock these spinlocks which triggers
>> a false negative warning in lockdep (below).
>>
>> This fixes it by annotating the large pool's spinlock as a nest lock.
>>
>> ===
>> WARNING: possible recursive locking detected
>> 5.11.0-le_syzkaller_a+fstn1 #100 Not tainted
>> --------------------------------------------
>> qemu-system-ppc/4129 is trying to acquire lock:
>> c0000000119bddb0 (&(p->lock)/1){....}-{2:2}, at:
>> iommu_take_ownership+0xac/0x1e0
>>
>> but task is already holding lock:
>> c0000000119bdd30 (&(p->lock)/1){....}-{2:2}, at:
>> iommu_take_ownership+0xac/0x1e0
>>
>> other info that might help us debug this:
>> Possible unsafe locking scenario:
>>
>> CPU0
>> ----
>> lock(&(p->lock)/1);
>> lock(&(p->lock)/1);
>> ===
>>
>> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
>> ---
>> arch/powerpc/kernel/iommu.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
>> index 557a09dd5b2f..2ee642a6731a 100644
>> --- a/arch/powerpc/kernel/iommu.c
>> +++ b/arch/powerpc/kernel/iommu.c
>> @@ -1089,7 +1089,7 @@ int iommu_take_ownership(struct iommu_table *tbl)
>> spin_lock_irqsave(&tbl->large_pool.lock, flags);
>> for (i = 0; i < tbl->nr_pools; i++)
>> - spin_lock(&tbl->pools[i].lock);
>> + spin_lock_nest_lock(&tbl->pools[i].lock, &tbl->large_pool.lock);
>
>
> We have the same pattern and therefore should have the same problem in
> iommu_release_ownership().
>
> But as I understand, we're hacking our way around lockdep here, since
> conceptually, those locks are independent. I was wondering why it seems
> to fix it by worrying only about the large pool lock.
This is the other way around - we telling the lockdep not to worry about
small pool locks if the nest lock (==large pool lock) is locked. The
warning is printed when a nested lock is detected and the lockdep checks
if there is a nest for this nested lock at check_deadlock().
> That loop can take
> many locks (up to 4 with current config). However, if the dma window is
> less than 1GB, we would only have one, so it would make sense for
> lockdep to stop complaining.
Why would it stop if the large pool is always there?
> Is it what happened? In which case, this
> patch doesn't really fix it. Or I'm missing something :-)
I tried with 1 or 2 small pools, no difference at all. I might also be
missing something here too :)
>
> Fred
>
>
>
>> iommu_table_release_pages(tbl);
>>
--
Alexey
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox