* [RFC PATCH v1] powerpc: Enable KFENCE for PPC32
From: Christophe Leroy @ 2021-03-02 8:37 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman,
Alexander Potapenko, Marco Elver, Dmitry Vyukov
Cc: linuxppc-dev, linux-kernel, kasan-dev
Add architecture specific implementation details for KFENCE and enable
KFENCE for the ppc32 architecture. In particular, this implements the
required interface in <asm/kfence.h>.
KFENCE requires that attributes for pages from its memory pool can
individually be set. Therefore, force the Read/Write linear map to be
mapped at page granularity.
Unit tests succeed on all tests but one:
[ 15.053324] # test_invalid_access: EXPECTATION FAILED at mm/kfence/kfence_test.c:636
[ 15.053324] Expected report_matches(&expect) to be true, but is false
[ 15.068359] not ok 21 - test_invalid_access
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/Kconfig | 13 +++++++------
arch/powerpc/include/asm/kfence.h | 32 +++++++++++++++++++++++++++++++
arch/powerpc/mm/book3s32/mmu.c | 2 +-
arch/powerpc/mm/fault.c | 7 ++++++-
arch/powerpc/mm/init_32.c | 3 +++
arch/powerpc/mm/nohash/8xx.c | 5 +++--
6 files changed, 52 insertions(+), 10 deletions(-)
create mode 100644 arch/powerpc/include/asm/kfence.h
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 386ae12d8523..d46db0bfb998 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -185,6 +185,7 @@ config PPC
select HAVE_ARCH_KASAN if PPC32 && PPC_PAGE_SHIFT <= 14
select HAVE_ARCH_KASAN_VMALLOC if PPC32 && PPC_PAGE_SHIFT <= 14
select HAVE_ARCH_KGDB
+ select HAVE_ARCH_KFENCE if PPC32
select HAVE_ARCH_MMAP_RND_BITS
select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT
select HAVE_ARCH_NVRAM_OPS
@@ -786,7 +787,7 @@ config THREAD_SHIFT
config DATA_SHIFT_BOOL
bool "Set custom data alignment"
depends on ADVANCED_OPTIONS
- depends on STRICT_KERNEL_RWX || DEBUG_PAGEALLOC
+ depends on STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE
depends on PPC_BOOK3S_32 || (PPC_8xx && !PIN_TLB_DATA && !STRICT_KERNEL_RWX)
help
This option allows you to set the kernel data alignment. When
@@ -798,13 +799,13 @@ config DATA_SHIFT_BOOL
config DATA_SHIFT
int "Data shift" if DATA_SHIFT_BOOL
default 24 if STRICT_KERNEL_RWX && PPC64
- range 17 28 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC) && PPC_BOOK3S_32
- range 19 23 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC) && PPC_8xx
+ range 17 28 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) && PPC_BOOK3S_32
+ range 19 23 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) && PPC_8xx
default 22 if STRICT_KERNEL_RWX && PPC_BOOK3S_32
- default 18 if DEBUG_PAGEALLOC && PPC_BOOK3S_32
+ default 18 if (DEBUG_PAGEALLOC || KFENCE) && PPC_BOOK3S_32
default 23 if STRICT_KERNEL_RWX && PPC_8xx
- default 23 if DEBUG_PAGEALLOC && PPC_8xx && PIN_TLB_DATA
- default 19 if DEBUG_PAGEALLOC && PPC_8xx
+ default 23 if (DEBUG_PAGEALLOC || KFENCE) && PPC_8xx && PIN_TLB_DATA
+ default 19 if (DEBUG_PAGEALLOC || KFENCE) && PPC_8xx
default PPC_PAGE_SHIFT
help
On Book3S 32 (603+), DBATs are used to map kernel text and rodata RO.
diff --git a/arch/powerpc/include/asm/kfence.h b/arch/powerpc/include/asm/kfence.h
new file mode 100644
index 000000000000..c229ee6a48f0
--- /dev/null
+++ b/arch/powerpc/include/asm/kfence.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * powerpc KFENCE support.
+ *
+ * Copyright (C) 2020 CS GROUP France
+ */
+
+#ifndef __ASM_POWERPC_KFENCE_H
+#define __ASM_POWERPC_KFENCE_H
+
+#include <asm/pgtable.h>
+
+static inline bool arch_kfence_init_pool(void)
+{
+ return true;
+}
+
+static inline bool kfence_protect_page(unsigned long addr, bool protect)
+{
+ pte_t *kpte = virt_to_kpte(addr);
+
+ if (protect) {
+ pte_update(&init_mm, addr, kpte, _PAGE_PRESENT, 0, 0);
+ flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
+ } else {
+ pte_update(&init_mm, addr, kpte, 0, _PAGE_PRESENT, 0);
+ }
+
+ return true;
+}
+
+#endif /* __ASM_POWERPC_KFENCE_H */
diff --git a/arch/powerpc/mm/book3s32/mmu.c b/arch/powerpc/mm/book3s32/mmu.c
index d7eb266a3f7a..4548aec95561 100644
--- a/arch/powerpc/mm/book3s32/mmu.c
+++ b/arch/powerpc/mm/book3s32/mmu.c
@@ -162,7 +162,7 @@ unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
unsigned long border = (unsigned long)__init_begin - PAGE_OFFSET;
- if (debug_pagealloc_enabled() || __map_without_bats) {
+ if (debug_pagealloc_enabled() || __map_without_bats || IS_ENABLED(CONFIG_KFENCE)) {
pr_debug_once("Read-Write memory mapped without BATs\n");
if (base >= border)
return base;
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index bb368257b55c..bea13682c909 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -32,6 +32,7 @@
#include <linux/context_tracking.h>
#include <linux/hugetlb.h>
#include <linux/uaccess.h>
+#include <linux/kfence.h>
#include <asm/firmware.h>
#include <asm/interrupt.h>
@@ -418,8 +419,12 @@ static int ___do_page_fault(struct pt_regs *regs, unsigned long address,
* take a page fault to a kernel address or a page fault to a user
* address outside of dedicated places
*/
- if (unlikely(!is_user && bad_kernel_fault(regs, error_code, address, is_write)))
+ if (unlikely(!is_user && bad_kernel_fault(regs, error_code, address, is_write))) {
+ if (kfence_handle_page_fault(address, is_write, regs))
+ return 0;
+
return SIGSEGV;
+ }
/*
* If we're in an interrupt, have no user context or are running
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 02c7db4087cb..3d690be48e84 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -97,6 +97,9 @@ static void __init MMU_setup(void)
if (IS_ENABLED(CONFIG_PPC_8xx))
return;
+ if (IS_ENABLED(CONFIG_KFENCE))
+ __map_without_ltlbs = 1;
+
if (debug_pagealloc_enabled())
__map_without_ltlbs = 1;
diff --git a/arch/powerpc/mm/nohash/8xx.c b/arch/powerpc/mm/nohash/8xx.c
index 19a3eec1d8c5..17051377aed7 100644
--- a/arch/powerpc/mm/nohash/8xx.c
+++ b/arch/powerpc/mm/nohash/8xx.c
@@ -149,7 +149,8 @@ unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
{
unsigned long etext8 = ALIGN(__pa(_etext), SZ_8M);
unsigned long sinittext = __pa(_sinittext);
- bool strict_boundary = strict_kernel_rwx_enabled() || debug_pagealloc_enabled();
+ bool strict_boundary = strict_kernel_rwx_enabled() || debug_pagealloc_enabled() ||
+ IS_ENABLED(CONFIG_KFENCE);
unsigned long boundary = strict_boundary ? sinittext : etext8;
unsigned long einittext8 = ALIGN(__pa(_einittext), SZ_8M);
@@ -161,7 +162,7 @@ unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
return 0;
mmu_mapin_ram_chunk(0, boundary, PAGE_KERNEL_TEXT, true);
- if (debug_pagealloc_enabled()) {
+ if (debug_pagealloc_enabled() || IS_ENABLED(CONFIG_KFENCE)) {
top = boundary;
} else {
mmu_mapin_ram_chunk(boundary, einittext8, PAGE_KERNEL_TEXT, true);
--
2.25.0
^ permalink raw reply related
* Re: linux-next: build failure after merge of the powerpc-fixes tree
From: Uwe Kleine-König @ 2021-03-02 8:30 UTC (permalink / raw)
To: Michael Ellerman, Stephen Rothwell, PowerPC
Cc: Linux Next Mailing List, Linux Kernel Mailing List
In-Reply-To: <87pn0is3wg.fsf@mpe.ellerman.id.au>
[-- Attachment #1.1: Type: text/plain, Size: 1134 bytes --]
Hello,
On 3/2/21 3:09 AM, Michael Ellerman wrote:
> Stephen Rothwell <sfr@canb.auug.org.au> writes:
>> Hi all,
>>
>> After merging the powerpc-fixes tree, today's linux-next build (powerpc
>> allyesconfig) failed like this:
>>
>> drivers/net/ethernet/ibm/ibmvnic.c:5399:13: error: conflicting types for 'ibmvnic_remove'
>> 5399 | static void ibmvnic_remove(struct vio_dev *dev)
>> | ^~~~~~~~~~~~~~
>> drivers/net/ethernet/ibm/ibmvnic.c:81:12: note: previous declaration of 'ibmvnic_remove' was here
>> 81 | static int ibmvnic_remove(struct vio_dev *);
>> | ^~~~~~~~~~~~~~
>>
>> Caused by commit
>>
>> 1bdd1e6f9320 ("vio: make remove callback return void")
>
> Gah, is IBMVNIC in any of our defconfigs?! ... no it's not.
Would you accept a patch to add the driver to one of the defconfigs as
an excuse for the build breakage I created? Which would be appropriate?
ppc64_defconfig?
>> I have applied the following patch for today:
>
> Thanks, I'll squash it in.
Also thanks for catching to Stephen and to Michael for the fixup.
Best regards
Uwe
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^ permalink raw reply
* [PATCH] powerpc: iommu: fix build when neither PCI or IBMVIO is set
From: Randy Dunlap @ 2021-03-02 8:28 UTC (permalink / raw)
To: linux-kernel
Cc: Randy Dunlap, linuxppc-dev, kernel test robot, Anton Blanchard
When neither CONFIG_PCI nor CONFIG_IBMVIO is enabled:
../arch/powerpc/kernel/iommu.c:178:30: error: 'fail_iommu_bus_notifier' defined but not used [-Werror=unused-variable]
178 | static struct notifier_block fail_iommu_bus_notifier = {
If only that struct is bounded by 2 #if defined() phrases (PCI && IBMVIO):
../arch/powerpc/kernel/iommu.c:162:12: error: 'fail_iommu_bus_notify' defined but not used [-Werror=unused-function]
162 | static int fail_iommu_bus_notify(struct notifier_block *nb,
If that function is also guarded by 2 #if defined() phrases:
In file included from ../include/linux/dma-mapping.h:7,
from ../arch/powerpc/kernel/iommu.c:19:
../include/linux/device.h:131:26: error: 'dev_attr_fail_iommu' defined but not used [-Werror=unused-variable]
131 | struct device_attribute dev_attr_##_name = __ATTR_RW(_name)
../arch/powerpc/kernel/iommu.c:160:8: note: in expansion of macro 'DEVICE_ATTR_RW'
160 | static DEVICE_ATTR_RW(fail_iommu);
and the snowball continues to grow.
Next I got this one:
../arch/powerpc/kernel/iommu.c: In function 'iommu_range_alloc':
../arch/powerpc/kernel/iommu.c:234:6: error: implicit declaration of function 'should_fail_iommu'; did you mean 'should_failslab'? [-Werror=implicit-function-declaration]
234 | if (should_fail_iommu(dev))
and
../arch/powerpc/kernel/iommu.c: In function 'should_fail_iommu':
../arch/powerpc/kernel/iommu.c:122:50: error: 'fail_iommu' undeclared (first use in this function)
122 | return dev->archdata.fail_iommu && should_fail(&fail_iommu, 1);
So combine CONFIG_FAIL_IOMMU && (CONFIG_PCI || CONFIG_IBMVIO)
to decide on building some of this code/data.
This came from a .config file from the kernel test robot, but it was
not for this particular build problem.
Fixes: d6b9a81b2a45 ("powerpc: IOMMU fault injection")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Anton Blanchard <anton@samba.org>
---
Found/seen in v5.12-rc1.
arch/powerpc/kernel/iommu.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
--- lnx-512-rc1.orig/arch/powerpc/kernel/iommu.c
+++ lnx-512-rc1/arch/powerpc/kernel/iommu.c
@@ -115,7 +115,13 @@ static int __init setup_iommu_pool_hash(
}
subsys_initcall(setup_iommu_pool_hash);
-#ifdef CONFIG_FAIL_IOMMU
+#if defined(CONFIG_FAIL_IOMMU) && \
+ (defined(CONFIG_PCI) || defined(CONFIG_IBMVIO))
+
+static bool should_fail_iommu(struct device *dev)
+{
+ return dev->archdata.fail_iommu && should_fail(&fail_iommu, 1);
+}
static DECLARE_FAULT_ATTR(fail_iommu);
@@ -125,11 +131,6 @@ static int __init setup_fail_iommu(char
}
__setup("fail_iommu=", setup_fail_iommu);
-static bool should_fail_iommu(struct device *dev)
-{
- return dev->archdata.fail_iommu && should_fail(&fail_iommu, 1);
-}
-
static int __init fail_iommu_debugfs(void)
{
struct dentry *dir = fault_create_debugfs_attr("fail_iommu",
^ permalink raw reply
* Re: [PATCH V2] mm: Generalize HUGETLB_PAGE_SIZE_VARIABLE
From: Christophe Leroy @ 2021-03-02 7:09 UTC (permalink / raw)
To: Anshuman Khandual, linux-mm
Cc: linux-ia64, linux-kernel, Paul Mackerras, Andrew Morton,
linuxppc-dev, Christoph Hellwig
In-Reply-To: <c33fe839-82c6-d0cd-32d6-b386d143ac51@arm.com>
Le 02/03/2021 à 07:37, Anshuman Khandual a écrit :
>
>
> On 3/2/21 11:13 AM, Christophe Leroy wrote:
>>
>>
>> Le 02/03/2021 à 06:13, Anshuman Khandual a écrit :
>>> HUGETLB_PAGE_SIZE_VARIABLE need not be defined for each individual
>>> platform subscribing it. Instead just make it generic.
>>>
>>> Cc: Michael Ellerman <mpe@ellerman.id.au>
>>> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>>> Cc: Paul Mackerras <paulus@samba.org>
>>> Cc: Andrew Morton <akpm@linux-foundation.org>
>>> Cc: Christoph Hellwig <hch@lst.de>
>>> Cc: linux-ia64@vger.kernel.org
>>> Cc: linuxppc-dev@lists.ozlabs.org
>>> Cc: linux-mm@kvack.org
>>> Cc: linux-kernel@vger.kernel.org
>>> Suggested-by: Christoph Hellwig <hch@lst.de>
>>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>>> ---
>>> This change was originally suggested in an earilier discussion. This
>>> applies on v5.12-rc1 and has been build tested on all applicable
>>> platforms i.e ia64 and powerpc.
>>>
>>> https://patchwork.kernel.org/project/linux-mm/patch/1613024531-19040-3-git-send-email-anshuman.khandual@arm.com/
>>>
>>> Changes in V2:
>>>
>>> - Added a description for HUGETLB_PAGE_SIZE_VARIABLE
>>
>> You are doing more than adding a description: you are making it user selectable. Is that what you want ?
>
> No, this was unintended. Will drop that description.
>
The description in the help section is OK.
It is only the text after the "bool" that makes it selectable.
bool "Allows dynamic pageblock_order"
^ permalink raw reply
* [PATCH 40/44] tty: hvc, drop unneeded forward declarations
From: Jiri Slaby @ 2021-03-02 6:22 UTC (permalink / raw)
To: gregkh; +Cc: linuxppc-dev, Jiri Slaby, linux-kernel, linux-serial
In-Reply-To: <20210302062214.29627-1-jslaby@suse.cz>
Forward declarations make the code larger and rewrites harder. Harder as
they are often omitted from global changes. Remove forward declarations
which are not really needed, i.e. the definition of the function is
before its first use.
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: linuxppc-dev@lists.ozlabs.org
---
drivers/tty/hvc/hvcs.c | 25 -------------------------
1 file changed, 25 deletions(-)
diff --git a/drivers/tty/hvc/hvcs.c b/drivers/tty/hvc/hvcs.c
index c90848919644..0b89d878a108 100644
--- a/drivers/tty/hvc/hvcs.c
+++ b/drivers/tty/hvc/hvcs.c
@@ -290,36 +290,11 @@ static LIST_HEAD(hvcs_structs);
static DEFINE_SPINLOCK(hvcs_structs_lock);
static DEFINE_MUTEX(hvcs_init_mutex);
-static void hvcs_unthrottle(struct tty_struct *tty);
-static void hvcs_throttle(struct tty_struct *tty);
-static irqreturn_t hvcs_handle_interrupt(int irq, void *dev_instance);
-
-static int hvcs_write(struct tty_struct *tty,
- const unsigned char *buf, int count);
-static int hvcs_write_room(struct tty_struct *tty);
-static int hvcs_chars_in_buffer(struct tty_struct *tty);
-
-static int hvcs_has_pi(struct hvcs_struct *hvcsd);
-static void hvcs_set_pi(struct hvcs_partner_info *pi,
- struct hvcs_struct *hvcsd);
static int hvcs_get_pi(struct hvcs_struct *hvcsd);
static int hvcs_rescan_devices_list(void);
-static int hvcs_partner_connect(struct hvcs_struct *hvcsd);
static void hvcs_partner_free(struct hvcs_struct *hvcsd);
-static int hvcs_enable_device(struct hvcs_struct *hvcsd,
- uint32_t unit_address, unsigned int irq, struct vio_dev *dev);
-
-static int hvcs_open(struct tty_struct *tty, struct file *filp);
-static void hvcs_close(struct tty_struct *tty, struct file *filp);
-static void hvcs_hangup(struct tty_struct * tty);
-
-static int hvcs_probe(struct vio_dev *dev,
- const struct vio_device_id *id);
-static int hvcs_remove(struct vio_dev *dev);
-static int __init hvcs_module_init(void);
-static void __exit hvcs_module_exit(void);
static int hvcs_initialize(void);
#define HVCS_SCHED_READ 0x00000001
--
2.30.1
^ permalink raw reply related
* [PATCH] sound: pps: fix spelling typo of values
From: dingsenjie @ 2021-03-02 3:40 UTC (permalink / raw)
To: geoff, perex, tiwai; +Cc: dingsenjie, linuxppc-dev, linux-kernel
From: dingsenjie <dingsenjie@yulong.com>
vaules -> values
Signed-off-by: dingsenjie <dingsenjie@yulong.com>
---
sound/ppc/snd_ps3_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/ppc/snd_ps3_reg.h b/sound/ppc/snd_ps3_reg.h
index 566a318..e2212b7 100644
--- a/sound/ppc/snd_ps3_reg.h
+++ b/sound/ppc/snd_ps3_reg.h
@@ -308,7 +308,7 @@
each interrupt in this register.
Writing 1b to a field containing 1b clears field and de-asserts interrupt.
Writing 0b to a field has no effect.
-Field vaules are the following:
+Field values are the following:
0 - Interrupt hasn't occurred.
1 - Interrupt has occurred.
--
1.9.1
^ permalink raw reply related
* Re: [PATCH V2] mm: Generalize HUGETLB_PAGE_SIZE_VARIABLE
From: Anshuman Khandual @ 2021-03-02 6:37 UTC (permalink / raw)
To: Christophe Leroy, linux-mm
Cc: linux-ia64, linux-kernel, Paul Mackerras, Andrew Morton,
linuxppc-dev, Christoph Hellwig
In-Reply-To: <a3772544-1e84-1969-b71c-ea2a3d013471@csgroup.eu>
On 3/2/21 11:13 AM, Christophe Leroy wrote:
>
>
> Le 02/03/2021 à 06:13, Anshuman Khandual a écrit :
>> HUGETLB_PAGE_SIZE_VARIABLE need not be defined for each individual
>> platform subscribing it. Instead just make it generic.
>>
>> Cc: Michael Ellerman <mpe@ellerman.id.au>
>> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>> Cc: Paul Mackerras <paulus@samba.org>
>> Cc: Andrew Morton <akpm@linux-foundation.org>
>> Cc: Christoph Hellwig <hch@lst.de>
>> Cc: linux-ia64@vger.kernel.org
>> Cc: linuxppc-dev@lists.ozlabs.org
>> Cc: linux-mm@kvack.org
>> Cc: linux-kernel@vger.kernel.org
>> Suggested-by: Christoph Hellwig <hch@lst.de>
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>> ---
>> This change was originally suggested in an earilier discussion. This
>> applies on v5.12-rc1 and has been build tested on all applicable
>> platforms i.e ia64 and powerpc.
>>
>> https://patchwork.kernel.org/project/linux-mm/patch/1613024531-19040-3-git-send-email-anshuman.khandual@arm.com/
>>
>> Changes in V2:
>>
>> - Added a description for HUGETLB_PAGE_SIZE_VARIABLE
>
> You are doing more than adding a description: you are making it user selectable. Is that what you want ?
No, this was unintended. Will drop that description.
^ permalink raw reply
* Re: [PATCH V2] mm: Generalize HUGETLB_PAGE_SIZE_VARIABLE
From: Christophe Leroy @ 2021-03-02 5:43 UTC (permalink / raw)
To: Anshuman Khandual, linux-mm
Cc: linux-ia64, linux-kernel, Paul Mackerras, Andrew Morton,
linuxppc-dev, Christoph Hellwig
In-Reply-To: <1614661987-23881-1-git-send-email-anshuman.khandual@arm.com>
Le 02/03/2021 à 06:13, Anshuman Khandual a écrit :
> HUGETLB_PAGE_SIZE_VARIABLE need not be defined for each individual
> platform subscribing it. Instead just make it generic.
>
> Cc: Michael Ellerman <mpe@ellerman.id.au>
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Paul Mackerras <paulus@samba.org>
> Cc: Andrew Morton <akpm@linux-foundation.org>
> Cc: Christoph Hellwig <hch@lst.de>
> Cc: linux-ia64@vger.kernel.org
> Cc: linuxppc-dev@lists.ozlabs.org
> Cc: linux-mm@kvack.org
> Cc: linux-kernel@vger.kernel.org
> Suggested-by: Christoph Hellwig <hch@lst.de>
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
> This change was originally suggested in an earilier discussion. This
> applies on v5.12-rc1 and has been build tested on all applicable
> platforms i.e ia64 and powerpc.
>
> https://patchwork.kernel.org/project/linux-mm/patch/1613024531-19040-3-git-send-email-anshuman.khandual@arm.com/
>
> Changes in V2:
>
> - Added a description for HUGETLB_PAGE_SIZE_VARIABLE
You are doing more than adding a description: you are making it user selectable. Is that what you want ?
> - Added HUGETLB_PAGE dependency while selecting HUGETLB_PAGE_SIZE_VARIABLE
>
> Changes in V1:
>
> https://patchwork.kernel.org/project/linux-mm/patch/1614577853-7452-1-git-send-email-anshuman.khandual@arm.com/
>
> arch/ia64/Kconfig | 6 +-----
> arch/powerpc/Kconfig | 6 +-----
> mm/Kconfig | 9 +++++++++
> 3 files changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
> index 2ad7a8d29fcc..dccf5bfebf48 100644
> --- a/arch/ia64/Kconfig
> +++ b/arch/ia64/Kconfig
> @@ -32,6 +32,7 @@ config IA64
> select TTY
> select HAVE_ARCH_TRACEHOOK
> select HAVE_VIRT_CPU_ACCOUNTING
> + select HUGETLB_PAGE_SIZE_VARIABLE if HUGETLB_PAGE
> select VIRT_TO_BUS
> select GENERIC_IRQ_PROBE
> select GENERIC_PENDING_IRQ if SMP
> @@ -82,11 +83,6 @@ config STACKTRACE_SUPPORT
> config GENERIC_LOCKBREAK
> def_bool n
>
> -config HUGETLB_PAGE_SIZE_VARIABLE
> - bool
> - depends on HUGETLB_PAGE
> - default y
> -
> config GENERIC_CALIBRATE_DELAY
> bool
> default y
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 3778ad17f56a..3fdec3e53256 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -232,6 +232,7 @@ config PPC
> select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI && !HAVE_HARDLOCKUP_DETECTOR_ARCH
> select HAVE_PERF_REGS
> select HAVE_PERF_USER_STACK_DUMP
> + select HUGETLB_PAGE_SIZE_VARIABLE if PPC_BOOK3S_64 && HUGETLB_PAGE
> select MMU_GATHER_RCU_TABLE_FREE
> select MMU_GATHER_PAGE_SIZE
> select HAVE_REGS_AND_STACK_ACCESS_API
> @@ -416,11 +417,6 @@ config HIGHMEM
>
> source "kernel/Kconfig.hz"
>
> -config HUGETLB_PAGE_SIZE_VARIABLE
> - bool
> - depends on HUGETLB_PAGE && PPC_BOOK3S_64
> - default y
> -
> config MATH_EMULATION
> bool "Math emulation"
> depends on 4xx || PPC_8xx || PPC_MPC832x || BOOKE
> diff --git a/mm/Kconfig b/mm/Kconfig
> index 24c045b24b95..64f1e0503e4f 100644
> --- a/mm/Kconfig
> +++ b/mm/Kconfig
> @@ -274,6 +274,15 @@ config ARCH_ENABLE_HUGEPAGE_MIGRATION
> config ARCH_ENABLE_THP_MIGRATION
> bool
>
> +config HUGETLB_PAGE_SIZE_VARIABLE
> + bool "Allows dynamic pageblock_order"
> + def_bool n
> + depends on HUGETLB_PAGE
> + help
> + Allows the pageblock_order value to be dynamic instead of just standard
> + HUGETLB_PAGE_ORDER when there are multiple HugeTLB page sizes available
> + on a platform.
> +
> config CONTIG_ALLOC
> def_bool (MEMORY_ISOLATION && COMPACTION) || CMA
>
>
^ permalink raw reply
* [PATCH V2] mm: Generalize HUGETLB_PAGE_SIZE_VARIABLE
From: Anshuman Khandual @ 2021-03-02 5:13 UTC (permalink / raw)
To: linux-mm
Cc: linux-ia64, Anshuman Khandual, linux-kernel, Paul Mackerras,
Andrew Morton, linuxppc-dev, Christoph Hellwig
HUGETLB_PAGE_SIZE_VARIABLE need not be defined for each individual
platform subscribing it. Instead just make it generic.
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Christoph Hellwig <hch@lst.de>
Cc: linux-ia64@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
This change was originally suggested in an earilier discussion. This
applies on v5.12-rc1 and has been build tested on all applicable
platforms i.e ia64 and powerpc.
https://patchwork.kernel.org/project/linux-mm/patch/1613024531-19040-3-git-send-email-anshuman.khandual@arm.com/
Changes in V2:
- Added a description for HUGETLB_PAGE_SIZE_VARIABLE
- Added HUGETLB_PAGE dependency while selecting HUGETLB_PAGE_SIZE_VARIABLE
Changes in V1:
https://patchwork.kernel.org/project/linux-mm/patch/1614577853-7452-1-git-send-email-anshuman.khandual@arm.com/
arch/ia64/Kconfig | 6 +-----
arch/powerpc/Kconfig | 6 +-----
mm/Kconfig | 9 +++++++++
3 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 2ad7a8d29fcc..dccf5bfebf48 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -32,6 +32,7 @@ config IA64
select TTY
select HAVE_ARCH_TRACEHOOK
select HAVE_VIRT_CPU_ACCOUNTING
+ select HUGETLB_PAGE_SIZE_VARIABLE if HUGETLB_PAGE
select VIRT_TO_BUS
select GENERIC_IRQ_PROBE
select GENERIC_PENDING_IRQ if SMP
@@ -82,11 +83,6 @@ config STACKTRACE_SUPPORT
config GENERIC_LOCKBREAK
def_bool n
-config HUGETLB_PAGE_SIZE_VARIABLE
- bool
- depends on HUGETLB_PAGE
- default y
-
config GENERIC_CALIBRATE_DELAY
bool
default y
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 3778ad17f56a..3fdec3e53256 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -232,6 +232,7 @@ config PPC
select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI && !HAVE_HARDLOCKUP_DETECTOR_ARCH
select HAVE_PERF_REGS
select HAVE_PERF_USER_STACK_DUMP
+ select HUGETLB_PAGE_SIZE_VARIABLE if PPC_BOOK3S_64 && HUGETLB_PAGE
select MMU_GATHER_RCU_TABLE_FREE
select MMU_GATHER_PAGE_SIZE
select HAVE_REGS_AND_STACK_ACCESS_API
@@ -416,11 +417,6 @@ config HIGHMEM
source "kernel/Kconfig.hz"
-config HUGETLB_PAGE_SIZE_VARIABLE
- bool
- depends on HUGETLB_PAGE && PPC_BOOK3S_64
- default y
-
config MATH_EMULATION
bool "Math emulation"
depends on 4xx || PPC_8xx || PPC_MPC832x || BOOKE
diff --git a/mm/Kconfig b/mm/Kconfig
index 24c045b24b95..64f1e0503e4f 100644
--- a/mm/Kconfig
+++ b/mm/Kconfig
@@ -274,6 +274,15 @@ config ARCH_ENABLE_HUGEPAGE_MIGRATION
config ARCH_ENABLE_THP_MIGRATION
bool
+config HUGETLB_PAGE_SIZE_VARIABLE
+ bool "Allows dynamic pageblock_order"
+ def_bool n
+ depends on HUGETLB_PAGE
+ help
+ Allows the pageblock_order value to be dynamic instead of just standard
+ HUGETLB_PAGE_ORDER when there are multiple HugeTLB page sizes available
+ on a platform.
+
config CONTIG_ALLOC
def_bool (MEMORY_ISOLATION && COMPACTION) || CMA
--
2.20.1
^ permalink raw reply related
* Re: [PATCH v5 2/3] KVM: PPC: Book3S HV: Add support for H_RPT_INVALIDATE
From: Bharata B Rao @ 2021-03-02 4:58 UTC (permalink / raw)
To: David Gibson; +Cc: farosas, aneesh.kumar, npiggin, kvm-ppc, linuxppc-dev
In-Reply-To: <YD2YrkY0cg+uO+wz@yekko.fritz.box>
On Tue, Mar 02, 2021 at 12:45:18PM +1100, David Gibson wrote:
> > diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
> > index 45fd862ac128..38ce3f21b21f 100644
> > --- a/Documentation/virt/kvm/api.rst
> > +++ b/Documentation/virt/kvm/api.rst
> > @@ -6225,6 +6225,24 @@ KVM_RUN_BUS_LOCK flag is used to distinguish between them.
> > This capability can be used to check / enable 2nd DAWR feature provided
> > by POWER10 processor.
> >
> > +7.23 KVM_CAP_PPC_RPT_INVALIDATE
> > +------------------------------
> > +
> > +:Capability: KVM_CAP_PPC_RPT_INVALIDATE
> > +:Architectures: ppc
> > +:Type: vm
> > +
> > +This capability indicates that the kernel is capable of handling
> > +H_RPT_INVALIDATE hcall.
> > +
> > +In order to enable the use of H_RPT_INVALIDATE in the guest,
> > +user space might have to advertise it for the guest. For example,
> > +IBM pSeries (sPAPR) guest starts using it if "hcall-rpt-invalidate" is
> > +present in the "ibm,hypertas-functions" device-tree property.
> > +
> > +This capability is enabled for hypervisors on platforms like POWER9
> > +that support radix MMU.
>
> Does this mean that KVM will handle the hypercall, even if not
> explicitly enabled by userspace (qemu)? That's generally not what we
> want, since we need to allow qemu to set up backwards compatible
> guests.
This capability only indicates that hypervisor supports the hcall.
QEMU will check for this and conditionally enable the hcall
(via KVM_CAP_PPC_ENABLE_HCALL ioctl). Enabling the hcall is
conditional to cap-rpt-invalidate sPAPR machine capability being
enabled by the user. Will post a followup QEMU patch shortly.
Older QEMU patch can be found here:
https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg00627.html
>
> > +
> > 8. Other capabilities.
> > ======================
> >
> > diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> > index 8b33601cdb9d..a46fd37ad552 100644
> > --- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> > +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> > @@ -4,6 +4,10 @@
> >
> > #include <asm/hvcall.h>
> >
> > +#define RIC_FLUSH_TLB 0
> > +#define RIC_FLUSH_PWC 1
> > +#define RIC_FLUSH_ALL 2
> > +
> > struct vm_area_struct;
> > struct mm_struct;
> > struct mmu_gather;
> > diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
> > index 2f5f919f6cd3..a1515f94400e 100644
> > --- a/arch/powerpc/include/asm/kvm_book3s.h
> > +++ b/arch/powerpc/include/asm/kvm_book3s.h
> > @@ -305,6 +305,9 @@ void kvmhv_set_ptbl_entry(unsigned int lpid, u64 dw0, u64 dw1);
> > void kvmhv_release_all_nested(struct kvm *kvm);
> > long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu);
> > long kvmhv_do_nested_tlbie(struct kvm_vcpu *vcpu);
> > +long kvmhv_h_rpti_nested(struct kvm_vcpu *vcpu, unsigned long lpid,
> > + unsigned long type, unsigned long pg_sizes,
> > + unsigned long start, unsigned long end);
> > int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu,
> > u64 time_limit, unsigned long lpcr);
> > void kvmhv_save_hv_regs(struct kvm_vcpu *vcpu, struct hv_guest_state *hr);
> > diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
> > index 652ce85f9410..820caf4e01b7 100644
> > --- a/arch/powerpc/include/asm/mmu_context.h
> > +++ b/arch/powerpc/include/asm/mmu_context.h
> > @@ -124,8 +124,19 @@ static inline bool need_extra_context(struct mm_struct *mm, unsigned long ea)
> >
> > #if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) && defined(CONFIG_PPC_RADIX_MMU)
> > extern void radix_kvm_prefetch_workaround(struct mm_struct *mm);
> > +void do_h_rpt_invalidate(unsigned long pid, unsigned long lpid,
> > + unsigned long type, unsigned long page_size,
> > + unsigned long psize, unsigned long start,
> > + unsigned long end);
> > #else
> > static inline void radix_kvm_prefetch_workaround(struct mm_struct *mm) { }
> > +static inline void do_h_rpt_invalidate(unsigned long pid,
> > + unsigned long lpid,
> > + unsigned long type,
> > + unsigned long page_size,
> > + unsigned long psize,
> > + unsigned long start,
> > + unsigned long end) { }
> > #endif
> >
> > extern void switch_cop(struct mm_struct *next);
> > diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> > index 13bad6bf4c95..d83f006fc19d 100644
> > --- a/arch/powerpc/kvm/book3s_hv.c
> > +++ b/arch/powerpc/kvm/book3s_hv.c
> > @@ -921,6 +921,69 @@ static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
> > return yield_count;
> > }
> >
> > +static void do_h_rpt_invalidate_prs(unsigned long pid, unsigned long lpid,
> > + unsigned long type, unsigned long pg_sizes,
> > + unsigned long start, unsigned long end)
> > +{
> > + unsigned long psize;
> > + struct mmu_psize_def *def;
> > +
> > + for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
> > + def = &mmu_psize_defs[psize];
> > + if (pg_sizes & def->h_rpt_pgsize)
> > + do_h_rpt_invalidate(pid, lpid, type,
> > + (1UL << def->shift), psize,
> > + start, end);
> > + }
> > +}
> > +
> > +static void kvmppc_nested_rpt_invalidate(struct kvm_vcpu *vcpu)
> > +{
> > + do_h_rpt_invalidate_prs(kvmppc_get_gpr(vcpu, 4),
> > + vcpu->arch.nested->shadow_lpid,
> > + kvmppc_get_gpr(vcpu, 5),
> > + kvmppc_get_gpr(vcpu, 6),
> > + kvmppc_get_gpr(vcpu, 7),
> > + kvmppc_get_gpr(vcpu, 8));
> > + kvmppc_set_gpr(vcpu, 3, H_SUCCESS);
> > +}
> > +
> > +static long kvmppc_h_rpt_invalidate(struct kvm_vcpu *vcpu,
> > + unsigned long pid, unsigned long target,
> > + unsigned long type, unsigned long pg_sizes,
> > + unsigned long start, unsigned long end)
> > +{
> > + if (!kvm_is_radix(vcpu->kvm))
> > + return H_UNSUPPORTED;
> > +
> > + /*
> > + * For nested guests, this hcall is handled in
> > + * L0. See kvmppc_handle_nested_exit() for details.
> > + */
> > + if (kvmhv_on_pseries())
> > + return H_UNSUPPORTED;
> > +
> > + if (end < start)
> > + return H_P5;
> > +
> > + if (type & H_RPTI_TYPE_NESTED) {
> > + if (!nesting_enabled(vcpu->kvm))
> > + return H_FUNCTION;
> > +
> > + /* Support only cores as target */
> > + if (target != H_RPTI_TARGET_CMMU)
> > + return H_P2;
> > +
>
> IIUC, we'll hit this code path if an L1 calls this on behalf of an L2,
Correct.
> whereas we'll hit the nested exit code path going straight to
> kvmhv_h_rpti_nested() if an L2 calls it on behalf of an L3. Is that
> right?
We will hit the nested exit code path when L2 calls it on behalf
of L3. Looks like I am not handling this case (hcall issued by
L2 on behalf of L3 for handling partition scoped translations)
in the nested exit path.
>
> > + return kvmhv_h_rpti_nested(vcpu, pid,
> > + (type & ~H_RPTI_TYPE_NESTED),
> > + pg_sizes, start, end);
> > + }
> > +
> > + do_h_rpt_invalidate_prs(pid, vcpu->kvm->arch.lpid, type, pg_sizes,
> > + start, end);
> > + return H_SUCCESS;
> > +}
> > +
> > int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
> > {
> > unsigned long req = kvmppc_get_gpr(vcpu, 3);
> > @@ -1129,6 +1192,14 @@ int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
> > */
> > ret = kvmppc_h_svm_init_abort(vcpu->kvm);
> > break;
> > + case H_RPT_INVALIDATE:
> > + ret = kvmppc_h_rpt_invalidate(vcpu, kvmppc_get_gpr(vcpu, 4),
> > + kvmppc_get_gpr(vcpu, 5),
> > + kvmppc_get_gpr(vcpu, 6),
> > + kvmppc_get_gpr(vcpu, 7),
> > + kvmppc_get_gpr(vcpu, 8),
> > + kvmppc_get_gpr(vcpu, 9));
> > + break;
> >
> > default:
> > return RESUME_HOST;
> > @@ -1175,6 +1246,7 @@ static int kvmppc_hcall_impl_hv(unsigned long cmd)
> > case H_XIRR_X:
> > #endif
> > case H_PAGE_INIT:
> > + case H_RPT_INVALIDATE:
> > return 1;
> > }
> >
> > @@ -1590,6 +1662,24 @@ static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)
> > if (!xics_on_xive())
> > kvmppc_xics_rm_complete(vcpu, 0);
> > break;
> > + case BOOK3S_INTERRUPT_SYSCALL:
> > + {
> > + unsigned long req = kvmppc_get_gpr(vcpu, 3);
> > +
> > + /*
> > + * The H_RPT_INVALIDATE hcalls issued by nested
> > + * guests for process scoped invalidations when
> > + * GTSE=0, are handled here in L0.
> > + */
>
> What if the L2 is not calling this for the GTSE=0 case, but on behalf
> of an L3?
That case would be for flushing partition scoped translations. I am
realizing that I am not handling that case, but it should be handled
here in the nested hcall exit path.
Currently I am handling only the hcall requests for process scoped
translations from nested guests here.
>
> > + if (req == H_RPT_INVALIDATE) {
> > + kvmppc_nested_rpt_invalidate(vcpu);
> > + r = RESUME_GUEST;
> > + break;
> > + }
> > +
> > + r = RESUME_HOST;
> > + break;
> > + }
> > default:
> > r = RESUME_HOST;
> > break;
> > diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c
> > index 0cd0e7aad588..ca43b2d38dce 100644
> > --- a/arch/powerpc/kvm/book3s_hv_nested.c
> > +++ b/arch/powerpc/kvm/book3s_hv_nested.c
> > @@ -1191,6 +1191,83 @@ long kvmhv_do_nested_tlbie(struct kvm_vcpu *vcpu)
> > return H_SUCCESS;
> > }
> >
> > +static long do_tlb_invalidate_nested_tlb(struct kvm_vcpu *vcpu,
> > + unsigned long lpid,
> > + unsigned long page_size,
> > + unsigned long ap,
> > + unsigned long start,
> > + unsigned long end)
> > +{
> > + unsigned long addr = start;
> > + int ret;
> > +
> > + do {
> > + ret = kvmhv_emulate_tlbie_tlb_addr(vcpu, lpid, ap,
> > + get_epn(addr));
> > + if (ret)
> > + return ret;
> > + addr += page_size;
> > + } while (addr < end);
> > +
> > + return ret;
> > +}
> > +
> > +static long do_tlb_invalidate_nested_all(struct kvm_vcpu *vcpu,
> > + unsigned long lpid)
> > +{
> > + struct kvm *kvm = vcpu->kvm;
> > + struct kvm_nested_guest *gp;
> > +
> > + gp = kvmhv_get_nested(kvm, lpid, false);
> > + if (gp) {
> > + kvmhv_emulate_tlbie_lpid(vcpu, gp, RIC_FLUSH_ALL);
> > + kvmhv_put_nested(gp);
> > + }
> > + return H_SUCCESS;
> > +}
> > +
> > +long kvmhv_h_rpti_nested(struct kvm_vcpu *vcpu, unsigned long lpid,
> > + unsigned long type, unsigned long pg_sizes,
> > + unsigned long start, unsigned long end)
> > +{
> > + struct kvm_nested_guest *gp;
> > + long ret;
> > + unsigned long psize, ap;
> > +
> > + /*
> > + * If L2 lpid isn't valid, we need to return H_PARAMETER.
> > + *
> > + * However, nested KVM issues a L2 lpid flush call when creating
> > + * partition table entries for L2. This happens even before the
> > + * corresponding shadow lpid is created in HV which happens in
> > + * H_ENTER_NESTED call. Since we can't differentiate this case from
> > + * the invalid case, we ignore such flush requests and return success.
> > + */
>
> What if this is being called on behalf of an L3 or deeper? Do we need
> something to do a translation from L3 to L2 addresses?
I am not sure, I will have to check if gp->shadow_lpid points to
correct nested LPID in all the cases.
>
> > + gp = kvmhv_find_nested(vcpu->kvm, lpid);
> > + if (!gp)
> > + return H_SUCCESS;
Regards,
Bharata.
^ permalink raw reply
* Re: [PATCH v5 1/3] powerpc/book3s64/radix: Add H_RPT_INVALIDATE pgsize encodings to mmu_psize_def
From: Bharata B Rao @ 2021-03-02 4:21 UTC (permalink / raw)
To: David Gibson; +Cc: farosas, aneesh.kumar, npiggin, kvm-ppc, linuxppc-dev
In-Reply-To: <YD2UwhaweIpImZDv@yekko.fritz.box>
On Tue, Mar 02, 2021 at 12:28:34PM +1100, David Gibson wrote:
> On Wed, Feb 24, 2021 at 01:55:08PM +0530, Bharata B Rao wrote:
> > Add a field to mmu_psize_def to store the page size encodings
> > of H_RPT_INVALIDATE hcall. Initialize this while scanning the radix
> > AP encodings. This will be used when invalidating with required
> > page size encoding in the hcall.
> >
> > Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
> > ---
> > arch/powerpc/include/asm/book3s/64/mmu.h | 1 +
> > arch/powerpc/mm/book3s64/radix_pgtable.c | 5 +++++
> > 2 files changed, 6 insertions(+)
> >
> > diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
> > index eace8c3f7b0a..c02f42d1031e 100644
> > --- a/arch/powerpc/include/asm/book3s/64/mmu.h
> > +++ b/arch/powerpc/include/asm/book3s/64/mmu.h
> > @@ -19,6 +19,7 @@ struct mmu_psize_def {
> > int penc[MMU_PAGE_COUNT]; /* HPTE encoding */
> > unsigned int tlbiel; /* tlbiel supported for that page size */
> > unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */
> > + unsigned long h_rpt_pgsize; /* H_RPT_INVALIDATE page size encoding */
> > union {
> > unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */
> > unsigned long ap; /* Ap encoding used by PowerISA 3.0 */
> > diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c
> > index 98f0b243c1ab..1b749899016b 100644
> > --- a/arch/powerpc/mm/book3s64/radix_pgtable.c
> > +++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
> > @@ -486,6 +486,7 @@ static int __init radix_dt_scan_page_sizes(unsigned long node,
> > def = &mmu_psize_defs[idx];
> > def->shift = shift;
> > def->ap = ap;
> > + def->h_rpt_pgsize = psize_to_rpti_pgsize(idx);
> > }
> >
> > /* needed ? */
> > @@ -560,9 +561,13 @@ void __init radix__early_init_devtree(void)
> > */
> > mmu_psize_defs[MMU_PAGE_4K].shift = 12;
> > mmu_psize_defs[MMU_PAGE_4K].ap = 0x0;
> > + mmu_psize_defs[MMU_PAGE_4K].h_rpt_pgsize =
> > + psize_to_rpti_pgsize(MMU_PAGE_4K);
>
> Hm. TBH, I was thinking of this as replacing psize_to_rpti_pgsize() -
> that is, you directly put the correct codes in there, then just have
> psize_to_rpti_pgsize() look them up in the table.
>
> I guess that could be a followup change, though.
>
> >
> > mmu_psize_defs[MMU_PAGE_64K].shift = 16;
> > mmu_psize_defs[MMU_PAGE_64K].ap = 0x5;
> > + mmu_psize_defs[MMU_PAGE_64K].h_rpt_pgsize =
> > + psize_to_rpti_pgsize(MMU_PAGE_64K);
Hmm if you see I got rid of rpti_pgsize_to_psize() by having the
defines directly in mmu_psize_def[].
There are two cases in the above code (radix__early_init_devtree)
1. If radix pagesize encodings are present in the DT, we walk
the page sizes in the loop and populate the enconding for
H_RPT_INVALIDATE. I am not sure if we can use the direct codes
in this case.
2. If DT doesn't have the radix pagesize encodings, 4K and 64K
sizes are assumed as fallback sizes where we can use direct
encodings.
Regards,
Bharata.
^ permalink raw reply
* Re: [PATCH v5 2/3] KVM: PPC: Book3S HV: Add support for H_RPT_INVALIDATE
From: Bharata B Rao @ 2021-03-02 4:14 UTC (permalink / raw)
To: Fabiano Rosas; +Cc: aneesh.kumar, npiggin, kvm-ppc, linuxppc-dev, david
In-Reply-To: <87blc9xxth.fsf@linux.ibm.com>
On Wed, Feb 24, 2021 at 12:58:02PM -0300, Fabiano Rosas wrote:
> > @@ -1590,6 +1662,24 @@ static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)
> > if (!xics_on_xive())
> > kvmppc_xics_rm_complete(vcpu, 0);
> > break;
> > + case BOOK3S_INTERRUPT_SYSCALL:
> > + {
> > + unsigned long req = kvmppc_get_gpr(vcpu, 3);
> > +
> > + /*
> > + * The H_RPT_INVALIDATE hcalls issued by nested
> > + * guests for process scoped invalidations when
> > + * GTSE=0, are handled here in L0.
> > + */
> > + if (req == H_RPT_INVALIDATE) {
> > + kvmppc_nested_rpt_invalidate(vcpu);
> > + r = RESUME_GUEST;
> > + break;
> > + }
>
> I'm inclined to say this is a bit too early. We're handling the hcall
> before kvmhv_run_single_vcpu has fully finished and we'll skip some
> code that has been running in all guest exits:
>
> if (trap) {
> if (!nested)
> r = kvmppc_handle_exit_hv(vcpu, current);
> else
> r = kvmppc_handle_nested_exit(vcpu); <--- we're here
> }
> vcpu->arch.ret = r;
>
> (...)
>
> vcpu->arch.ceded = 0;
>
> vc->vcore_state = VCORE_INACTIVE;
> trace_kvmppc_run_core(vc, 1);
>
> done:
> kvmppc_remove_runnable(vc, vcpu);
> trace_kvmppc_run_vcpu_exit(vcpu);
>
> return vcpu->arch.ret;
>
> Especially the kvmppc_remove_runnable function because it sets the
> vcpu state:
>
> vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
>
> which should be the case if we're handling a hypercall.
>
> I suggest we do similarly to the L1 exit code and defer the hcall
> handling until after kvmppc_run_single_vcpu has exited, still inside the
> is_kvmppc_resume_guest(r) loop.
>
> So we'd set:
> case BOOK3S_INTERRUPT_SYSCALL:
> vcpu->run->exit_reason = KVM_EXIT_PAPR_HCALL;
> r = RESUME_HOST;
> break;
>
> and perhaps introduce a new kvmppc_pseries_do_nested_hcall that's called
> after kvmppc_run_single_vcpu.
Yes, looks like we should, but I wasn't sure if an exit similar to L1
exit for hcall handling is needed here too, hence took this approach.
Paul, could you please clarify?
Regards,
Bharata.
^ permalink raw reply
* Re: [PATCH] mm: Generalize HUGETLB_PAGE_SIZE_VARIABLE
From: Anshuman Khandual @ 2021-03-02 4:01 UTC (permalink / raw)
To: kernel test robot, linux-mm
Cc: kbuild-all, Paul Mackerras, linux-ia64, Andrew Morton,
linuxppc-dev, Christoph Hellwig
In-Reply-To: <202103011736.uYkOLJKy-lkp@intel.com>
On 3/1/21 3:22 PM, kernel test robot wrote:
> Hi Anshuman,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on powerpc/next]
> [also build test ERROR on linus/master v5.12-rc1 next-20210301]
> [cannot apply to hnaz-linux-mm/master]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url: https://github.com/0day-ci/linux/commits/Anshuman-Khandual/mm-Generalize-HUGETLB_PAGE_SIZE_VARIABLE/20210301-135205
> base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
> config: ia64-randconfig-r003-20210301 (attached as .config)
> compiler: ia64-linux-gcc (GCC) 9.3.0
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # https://github.com/0day-ci/linux/commit/fe78e3508e5221ac13aa288136e2a6506211be68
> git remote add linux-review https://github.com/0day-ci/linux
> git fetch --no-tags linux-review Anshuman-Khandual/mm-Generalize-HUGETLB_PAGE_SIZE_VARIABLE/20210301-135205
> git checkout fe78e3508e5221ac13aa288136e2a6506211be68
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=ia64
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All errors (new ones prefixed by >>):
>
> In file included from arch/ia64/include/asm/pgtable.h:154,
> from include/linux/pgtable.h:6,
> from include/linux/mm.h:33,
> from mm/page_alloc.c:19:
> arch/ia64/include/asm/mmu_context.h: In function 'reload_context':
> arch/ia64/include/asm/mmu_context.h:127:41: warning: variable 'old_rr4' set but not used [-Wunused-but-set-variable]
> 127 | unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4;
> | ^~~~~~~
> In file included from include/linux/kconfig.h:7,
> from <command-line>:
> mm/page_alloc.c: At top level:
>>> ./include/generated/autoconf.h:269:36: error: expected identifier or '(' before numeric constant
> 269 | #define CONFIG_FORCE_MAX_ZONEORDER 11
> | ^~
> include/linux/mmzone.h:29:19: note: in expansion of macro 'CONFIG_FORCE_MAX_ZONEORDER'
> 29 | #define MAX_ORDER CONFIG_FORCE_MAX_ZONEORDER
> | ^~~~~~~~~~~~~~~~~~~~~~~~~~
> include/linux/pageblock-flags.h:48:27: note: in expansion of macro 'MAX_ORDER'
> 48 | #define pageblock_order (MAX_ORDER-1)
> | ^~~~~~~~~
> mm/page_alloc.c:250:14: note: in expansion of macro 'pageblock_order'
> 250 | unsigned int pageblock_order __read_mostly;
> | ^~~~~~~~~~~~~~~
> mm/page_alloc.c:2618:5: warning: no previous prototype for 'find_suitable_fallback' [-Wmissing-prototypes]
> 2618 | int find_suitable_fallback(struct free_area *area, unsigned int order,
> | ^~~~~~~~~~~~~~~~~~~~~~
> mm/page_alloc.c:3596:15: warning: no previous prototype for 'should_fail_alloc_page' [-Wmissing-prototypes]
> 3596 | noinline bool should_fail_alloc_page(gfp_t gfp_mask, unsigned int order)
> | ^~~~~~~~~~~~~~~~~~~~~~
> mm/page_alloc.c:6257:23: warning: no previous prototype for 'memmap_init' [-Wmissing-prototypes]
> 6257 | void __meminit __weak memmap_init(unsigned long size, int nid,
> | ^~~~~~~~~~~
> mm/page_alloc.c: In function 'set_pageblock_order':
>>> mm/page_alloc.c:6798:6: error: 'HPAGE_SHIFT' undeclared (first use in this function); did you mean 'PAGE_SHIFT'?
> 6798 | if (HPAGE_SHIFT > PAGE_SHIFT)
> | ^~~~~~~~~~~
> | PAGE_SHIFT
> mm/page_alloc.c:6798:6: note: each undeclared identifier is reported only once for each function it appears in
>>> mm/page_alloc.c:6799:11: error: 'HUGETLB_PAGE_ORDER' undeclared (first use in this function)
> 6799 | order = HUGETLB_PAGE_ORDER;
> | ^~~~~~~~~~~~~~~~~~
>>> mm/page_alloc.c:6808:18: error: lvalue required as left operand of assignment
> 6808 | pageblock_order = order;
> | ^
>
> Kconfig warnings: (for reference only)
> WARNING: unmet direct dependencies detected for HUGETLB_PAGE_SIZE_VARIABLE
> Depends on HUGETLB_PAGE
> Selected by
> - IA64
This shows that HUGETLB_PAGE_SIZE_VARIABLE could be selected without HUGETLB_PAGE
being enabled, which was not intended. The dependency on HUGETLB_PAGE need to be
explicit for HUGETLB_PAGE_SIZE_VARIABLE.
^ permalink raw reply
* Re: [PATCH v3 2/2] powerpc: Remove remaining parts of oprofile
From: Viresh Kumar @ 2021-03-02 3:48 UTC (permalink / raw)
To: Christophe Leroy
Cc: Desnes A. Nunes do Rosario, Madhavan Srinivasan, linux-kernel,
Paul Mackerras, Rashmica Gupta, linuxppc-dev
In-Reply-To: <0085280627ee44927fc3f07590a8b4909cf8e56d.1614600516.git.christophe.leroy@csgroup.eu>
On 01-03-21, 12:09, Christophe Leroy wrote:
> Commit 9850b6c69356 ("arch: powerpc: Remove oprofile") removed
> oprofile.
>
> Remove all remaining parts of it.
>
> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
> ---
> arch/powerpc/include/asm/cputable.h | 3 --
> arch/powerpc/kernel/cputable.c | 66 +----------------------
> arch/powerpc/kernel/dt_cpu_ftrs.c | 4 --
> arch/powerpc/platforms/cell/spufs/spufs.h | 2 +-
> 4 files changed, 3 insertions(+), 72 deletions(-)
Great, I wasn't sure how the handle the cpu type stuff and so left it
for the right people to handle. :)
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
^ permalink raw reply
* Re: [PATCH v2 1/3] powerpc: sstep: Fix load and update emulation
From: Segher Boessenkool @ 2021-03-02 2:37 UTC (permalink / raw)
To: Naveen N. Rao
Cc: ravi.bangoria, ananth, jniethe5, paulus, Sandipan Das,
linuxppc-dev, dja
In-Reply-To: <20210204082753.GI210@DESKTOP-TDPLP67.localdomain>
Hi!
I didn't see this until now, almost a month later, sorry about that :-)
On Thu, Feb 04, 2021 at 01:57:53PM +0530, Naveen N. Rao wrote:
> On 2021/02/03 03:17PM, Segher Boessenkool wrote:
> > Power8 does:
> >
> > Load with Update Instructions (RA = 0)
> > EA is placed into R0.
> > Load with Update Instructions (RA = RT)
> > EA is placed into RT. The storage operand addressed by EA is
> > accessed, but the data returned by the load is discarded.
>
> I'm actually not seeing that. This is what I am testing with:
> li 8,0xaaa
> mr 6,1
> std 8,64(6)
> #ldu 6,64(6)
> .long 0xe8c60041
>
> And, r6 always ends up with 0xaea. It changes with the value I put into
> r6 though.
That is exactly the behaviour specified for p8. 0aaa+0040=0aea.
> Granted, this is all up in the air, but it does look like there is more
> going on and the value isn't the EA or the value at the address.
That *is* the EA. The EA is the address the insn does the access at.
Segher
^ permalink raw reply
* Re: [PATCH v5 1/3] powerpc/book3s64/radix: Add H_RPT_INVALIDATE pgsize encodings to mmu_psize_def
From: David Gibson @ 2021-03-02 1:28 UTC (permalink / raw)
To: Bharata B Rao; +Cc: farosas, aneesh.kumar, npiggin, kvm-ppc, linuxppc-dev
In-Reply-To: <20210224082510.3962423-2-bharata@linux.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 2627 bytes --]
On Wed, Feb 24, 2021 at 01:55:08PM +0530, Bharata B Rao wrote:
> Add a field to mmu_psize_def to store the page size encodings
> of H_RPT_INVALIDATE hcall. Initialize this while scanning the radix
> AP encodings. This will be used when invalidating with required
> page size encoding in the hcall.
>
> Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
> ---
> arch/powerpc/include/asm/book3s/64/mmu.h | 1 +
> arch/powerpc/mm/book3s64/radix_pgtable.c | 5 +++++
> 2 files changed, 6 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
> index eace8c3f7b0a..c02f42d1031e 100644
> --- a/arch/powerpc/include/asm/book3s/64/mmu.h
> +++ b/arch/powerpc/include/asm/book3s/64/mmu.h
> @@ -19,6 +19,7 @@ struct mmu_psize_def {
> int penc[MMU_PAGE_COUNT]; /* HPTE encoding */
> unsigned int tlbiel; /* tlbiel supported for that page size */
> unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */
> + unsigned long h_rpt_pgsize; /* H_RPT_INVALIDATE page size encoding */
> union {
> unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */
> unsigned long ap; /* Ap encoding used by PowerISA 3.0 */
> diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c
> index 98f0b243c1ab..1b749899016b 100644
> --- a/arch/powerpc/mm/book3s64/radix_pgtable.c
> +++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
> @@ -486,6 +486,7 @@ static int __init radix_dt_scan_page_sizes(unsigned long node,
> def = &mmu_psize_defs[idx];
> def->shift = shift;
> def->ap = ap;
> + def->h_rpt_pgsize = psize_to_rpti_pgsize(idx);
> }
>
> /* needed ? */
> @@ -560,9 +561,13 @@ void __init radix__early_init_devtree(void)
> */
> mmu_psize_defs[MMU_PAGE_4K].shift = 12;
> mmu_psize_defs[MMU_PAGE_4K].ap = 0x0;
> + mmu_psize_defs[MMU_PAGE_4K].h_rpt_pgsize =
> + psize_to_rpti_pgsize(MMU_PAGE_4K);
Hm. TBH, I was thinking of this as replacing psize_to_rpti_pgsize() -
that is, you directly put the correct codes in there, then just have
psize_to_rpti_pgsize() look them up in the table.
I guess that could be a followup change, though.
>
> mmu_psize_defs[MMU_PAGE_64K].shift = 16;
> mmu_psize_defs[MMU_PAGE_64K].ap = 0x5;
> + mmu_psize_defs[MMU_PAGE_64K].h_rpt_pgsize =
> + psize_to_rpti_pgsize(MMU_PAGE_64K);
> }
>
> /*
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* Re: [PATCH v5 2/3] KVM: PPC: Book3S HV: Add support for H_RPT_INVALIDATE
From: David Gibson @ 2021-03-02 1:45 UTC (permalink / raw)
To: Bharata B Rao; +Cc: farosas, aneesh.kumar, npiggin, kvm-ppc, linuxppc-dev
In-Reply-To: <20210224082510.3962423-3-bharata@linux.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 20757 bytes --]
On Wed, Feb 24, 2021 at 01:55:09PM +0530, Bharata B Rao wrote:
> Implement H_RPT_INVALIDATE hcall and add KVM capability
> KVM_CAP_PPC_RPT_INVALIDATE to indicate the support for the same.
>
> This hcall does two types of TLB invalidations:
>
> 1. Process-scoped invalidations for guests with LPCR[GTSE]=0.
> This is currently not used in KVM as GTSE is not usually
> disabled in KVM.
> 2. Partition-scoped invalidations that an L1 hypervisor does on
> behalf of an L2 guest. This replaces the uses of the existing
> hcall H_TLB_INVALIDATE.
>
> In order to handle process scoped invalidations of L2, we
> intercept the nested exit handling code in L0 only to handle
> H_TLB_INVALIDATE hcall.
>
> Process scoped tlbie invalidations from L1 and nested guests
> need RS register for TLBIE instruction to contain both PID and
> LPID. This patch introduces primitives that execute tlbie
> instruction with both PID and LPID set in prepartion for
> H_RPT_INVALIDATE hcall.
>
> Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
> ---
> Documentation/virt/kvm/api.rst | 18 +++
> .../include/asm/book3s/64/tlbflush-radix.h | 4 +
> arch/powerpc/include/asm/kvm_book3s.h | 3 +
> arch/powerpc/include/asm/mmu_context.h | 11 ++
> arch/powerpc/kvm/book3s_hv.c | 90 +++++++++++
> arch/powerpc/kvm/book3s_hv_nested.c | 77 +++++++++
> arch/powerpc/kvm/powerpc.c | 3 +
> arch/powerpc/mm/book3s64/radix_tlb.c | 147 +++++++++++++++++-
> include/uapi/linux/kvm.h | 1 +
> 9 files changed, 350 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
> index 45fd862ac128..38ce3f21b21f 100644
> --- a/Documentation/virt/kvm/api.rst
> +++ b/Documentation/virt/kvm/api.rst
> @@ -6225,6 +6225,24 @@ KVM_RUN_BUS_LOCK flag is used to distinguish between them.
> This capability can be used to check / enable 2nd DAWR feature provided
> by POWER10 processor.
>
> +7.23 KVM_CAP_PPC_RPT_INVALIDATE
> +------------------------------
> +
> +:Capability: KVM_CAP_PPC_RPT_INVALIDATE
> +:Architectures: ppc
> +:Type: vm
> +
> +This capability indicates that the kernel is capable of handling
> +H_RPT_INVALIDATE hcall.
> +
> +In order to enable the use of H_RPT_INVALIDATE in the guest,
> +user space might have to advertise it for the guest. For example,
> +IBM pSeries (sPAPR) guest starts using it if "hcall-rpt-invalidate" is
> +present in the "ibm,hypertas-functions" device-tree property.
> +
> +This capability is enabled for hypervisors on platforms like POWER9
> +that support radix MMU.
Does this mean that KVM will handle the hypercall, even if not
explicitly enabled by userspace (qemu)? That's generally not what we
want, since we need to allow qemu to set up backwards compatible
guests.
> +
> 8. Other capabilities.
> ======================
>
> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> index 8b33601cdb9d..a46fd37ad552 100644
> --- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> @@ -4,6 +4,10 @@
>
> #include <asm/hvcall.h>
>
> +#define RIC_FLUSH_TLB 0
> +#define RIC_FLUSH_PWC 1
> +#define RIC_FLUSH_ALL 2
> +
> struct vm_area_struct;
> struct mm_struct;
> struct mmu_gather;
> diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
> index 2f5f919f6cd3..a1515f94400e 100644
> --- a/arch/powerpc/include/asm/kvm_book3s.h
> +++ b/arch/powerpc/include/asm/kvm_book3s.h
> @@ -305,6 +305,9 @@ void kvmhv_set_ptbl_entry(unsigned int lpid, u64 dw0, u64 dw1);
> void kvmhv_release_all_nested(struct kvm *kvm);
> long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu);
> long kvmhv_do_nested_tlbie(struct kvm_vcpu *vcpu);
> +long kvmhv_h_rpti_nested(struct kvm_vcpu *vcpu, unsigned long lpid,
> + unsigned long type, unsigned long pg_sizes,
> + unsigned long start, unsigned long end);
> int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu,
> u64 time_limit, unsigned long lpcr);
> void kvmhv_save_hv_regs(struct kvm_vcpu *vcpu, struct hv_guest_state *hr);
> diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
> index 652ce85f9410..820caf4e01b7 100644
> --- a/arch/powerpc/include/asm/mmu_context.h
> +++ b/arch/powerpc/include/asm/mmu_context.h
> @@ -124,8 +124,19 @@ static inline bool need_extra_context(struct mm_struct *mm, unsigned long ea)
>
> #if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) && defined(CONFIG_PPC_RADIX_MMU)
> extern void radix_kvm_prefetch_workaround(struct mm_struct *mm);
> +void do_h_rpt_invalidate(unsigned long pid, unsigned long lpid,
> + unsigned long type, unsigned long page_size,
> + unsigned long psize, unsigned long start,
> + unsigned long end);
> #else
> static inline void radix_kvm_prefetch_workaround(struct mm_struct *mm) { }
> +static inline void do_h_rpt_invalidate(unsigned long pid,
> + unsigned long lpid,
> + unsigned long type,
> + unsigned long page_size,
> + unsigned long psize,
> + unsigned long start,
> + unsigned long end) { }
> #endif
>
> extern void switch_cop(struct mm_struct *next);
> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> index 13bad6bf4c95..d83f006fc19d 100644
> --- a/arch/powerpc/kvm/book3s_hv.c
> +++ b/arch/powerpc/kvm/book3s_hv.c
> @@ -921,6 +921,69 @@ static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
> return yield_count;
> }
>
> +static void do_h_rpt_invalidate_prs(unsigned long pid, unsigned long lpid,
> + unsigned long type, unsigned long pg_sizes,
> + unsigned long start, unsigned long end)
> +{
> + unsigned long psize;
> + struct mmu_psize_def *def;
> +
> + for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
> + def = &mmu_psize_defs[psize];
> + if (pg_sizes & def->h_rpt_pgsize)
> + do_h_rpt_invalidate(pid, lpid, type,
> + (1UL << def->shift), psize,
> + start, end);
> + }
> +}
> +
> +static void kvmppc_nested_rpt_invalidate(struct kvm_vcpu *vcpu)
> +{
> + do_h_rpt_invalidate_prs(kvmppc_get_gpr(vcpu, 4),
> + vcpu->arch.nested->shadow_lpid,
> + kvmppc_get_gpr(vcpu, 5),
> + kvmppc_get_gpr(vcpu, 6),
> + kvmppc_get_gpr(vcpu, 7),
> + kvmppc_get_gpr(vcpu, 8));
> + kvmppc_set_gpr(vcpu, 3, H_SUCCESS);
> +}
> +
> +static long kvmppc_h_rpt_invalidate(struct kvm_vcpu *vcpu,
> + unsigned long pid, unsigned long target,
> + unsigned long type, unsigned long pg_sizes,
> + unsigned long start, unsigned long end)
> +{
> + if (!kvm_is_radix(vcpu->kvm))
> + return H_UNSUPPORTED;
> +
> + /*
> + * For nested guests, this hcall is handled in
> + * L0. See kvmppc_handle_nested_exit() for details.
> + */
> + if (kvmhv_on_pseries())
> + return H_UNSUPPORTED;
> +
> + if (end < start)
> + return H_P5;
> +
> + if (type & H_RPTI_TYPE_NESTED) {
> + if (!nesting_enabled(vcpu->kvm))
> + return H_FUNCTION;
> +
> + /* Support only cores as target */
> + if (target != H_RPTI_TARGET_CMMU)
> + return H_P2;
> +
IIUC, we'll hit this code path if an L1 calls this on behalf of an L2,
whereas we'll hit the nested exit code path going straight to
kvmhv_h_rpti_nested() if an L2 calls it on behalf of an L3. Is that
right?
> + return kvmhv_h_rpti_nested(vcpu, pid,
> + (type & ~H_RPTI_TYPE_NESTED),
> + pg_sizes, start, end);
> + }
> +
> + do_h_rpt_invalidate_prs(pid, vcpu->kvm->arch.lpid, type, pg_sizes,
> + start, end);
> + return H_SUCCESS;
> +}
> +
> int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
> {
> unsigned long req = kvmppc_get_gpr(vcpu, 3);
> @@ -1129,6 +1192,14 @@ int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
> */
> ret = kvmppc_h_svm_init_abort(vcpu->kvm);
> break;
> + case H_RPT_INVALIDATE:
> + ret = kvmppc_h_rpt_invalidate(vcpu, kvmppc_get_gpr(vcpu, 4),
> + kvmppc_get_gpr(vcpu, 5),
> + kvmppc_get_gpr(vcpu, 6),
> + kvmppc_get_gpr(vcpu, 7),
> + kvmppc_get_gpr(vcpu, 8),
> + kvmppc_get_gpr(vcpu, 9));
> + break;
>
> default:
> return RESUME_HOST;
> @@ -1175,6 +1246,7 @@ static int kvmppc_hcall_impl_hv(unsigned long cmd)
> case H_XIRR_X:
> #endif
> case H_PAGE_INIT:
> + case H_RPT_INVALIDATE:
> return 1;
> }
>
> @@ -1590,6 +1662,24 @@ static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)
> if (!xics_on_xive())
> kvmppc_xics_rm_complete(vcpu, 0);
> break;
> + case BOOK3S_INTERRUPT_SYSCALL:
> + {
> + unsigned long req = kvmppc_get_gpr(vcpu, 3);
> +
> + /*
> + * The H_RPT_INVALIDATE hcalls issued by nested
> + * guests for process scoped invalidations when
> + * GTSE=0, are handled here in L0.
> + */
What if the L2 is not calling this for the GTSE=0 case, but on behalf
of an L3?
> + if (req == H_RPT_INVALIDATE) {
> + kvmppc_nested_rpt_invalidate(vcpu);
> + r = RESUME_GUEST;
> + break;
> + }
> +
> + r = RESUME_HOST;
> + break;
> + }
> default:
> r = RESUME_HOST;
> break;
> diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c
> index 0cd0e7aad588..ca43b2d38dce 100644
> --- a/arch/powerpc/kvm/book3s_hv_nested.c
> +++ b/arch/powerpc/kvm/book3s_hv_nested.c
> @@ -1191,6 +1191,83 @@ long kvmhv_do_nested_tlbie(struct kvm_vcpu *vcpu)
> return H_SUCCESS;
> }
>
> +static long do_tlb_invalidate_nested_tlb(struct kvm_vcpu *vcpu,
> + unsigned long lpid,
> + unsigned long page_size,
> + unsigned long ap,
> + unsigned long start,
> + unsigned long end)
> +{
> + unsigned long addr = start;
> + int ret;
> +
> + do {
> + ret = kvmhv_emulate_tlbie_tlb_addr(vcpu, lpid, ap,
> + get_epn(addr));
> + if (ret)
> + return ret;
> + addr += page_size;
> + } while (addr < end);
> +
> + return ret;
> +}
> +
> +static long do_tlb_invalidate_nested_all(struct kvm_vcpu *vcpu,
> + unsigned long lpid)
> +{
> + struct kvm *kvm = vcpu->kvm;
> + struct kvm_nested_guest *gp;
> +
> + gp = kvmhv_get_nested(kvm, lpid, false);
> + if (gp) {
> + kvmhv_emulate_tlbie_lpid(vcpu, gp, RIC_FLUSH_ALL);
> + kvmhv_put_nested(gp);
> + }
> + return H_SUCCESS;
> +}
> +
> +long kvmhv_h_rpti_nested(struct kvm_vcpu *vcpu, unsigned long lpid,
> + unsigned long type, unsigned long pg_sizes,
> + unsigned long start, unsigned long end)
> +{
> + struct kvm_nested_guest *gp;
> + long ret;
> + unsigned long psize, ap;
> +
> + /*
> + * If L2 lpid isn't valid, we need to return H_PARAMETER.
> + *
> + * However, nested KVM issues a L2 lpid flush call when creating
> + * partition table entries for L2. This happens even before the
> + * corresponding shadow lpid is created in HV which happens in
> + * H_ENTER_NESTED call. Since we can't differentiate this case from
> + * the invalid case, we ignore such flush requests and return success.
> + */
What if this is being called on behalf of an L3 or deeper? Do we need
something to do a translation from L3 to L2 addresses?
> + gp = kvmhv_find_nested(vcpu->kvm, lpid);
> + if (!gp)
> + return H_SUCCESS;
> +
> + if ((type & H_RPTI_TYPE_NESTED_ALL) == H_RPTI_TYPE_NESTED_ALL)
> + return do_tlb_invalidate_nested_all(vcpu, lpid);
> +
> + if ((type & H_RPTI_TYPE_TLB) == H_RPTI_TYPE_TLB) {
> + struct mmu_psize_def *def;
> +
> + for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
> + def = &mmu_psize_defs[psize];
> + if (!(pg_sizes & def->h_rpt_pgsize))
> + continue;
> +
> + ret = do_tlb_invalidate_nested_tlb(vcpu, lpid,
> + (1UL << def->shift),
> + ap, start, end);
> + if (ret)
> + return H_P4;
> + }
> + }
> + return H_SUCCESS;
> +}
> +
> /* Used to convert a nested guest real address to a L1 guest real address */
> static int kvmhv_translate_addr_nested(struct kvm_vcpu *vcpu,
> struct kvm_nested_guest *gp,
> diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
> index a2a68a958fa0..be33b5321a76 100644
> --- a/arch/powerpc/kvm/powerpc.c
> +++ b/arch/powerpc/kvm/powerpc.c
> @@ -682,6 +682,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
> r = !!(hv_enabled && kvmppc_hv_ops->enable_dawr1 &&
> !kvmppc_hv_ops->enable_dawr1(NULL));
> break;
> + case KVM_CAP_PPC_RPT_INVALIDATE:
> + r = 1;
> + break;
> #endif
> default:
> r = 0;
> diff --git a/arch/powerpc/mm/book3s64/radix_tlb.c b/arch/powerpc/mm/book3s64/radix_tlb.c
> index 409e61210789..440d84fffa8c 100644
> --- a/arch/powerpc/mm/book3s64/radix_tlb.c
> +++ b/arch/powerpc/mm/book3s64/radix_tlb.c
> @@ -20,10 +20,6 @@
>
> #include "internal.h"
>
> -#define RIC_FLUSH_TLB 0
> -#define RIC_FLUSH_PWC 1
> -#define RIC_FLUSH_ALL 2
> -
> /*
> * tlbiel instruction for radix, set invalidation
> * i.e., r=1 and is=01 or is=10 or is=11
> @@ -130,6 +126,21 @@ static __always_inline void __tlbie_pid(unsigned long pid, unsigned long ric)
> trace_tlbie(0, 0, rb, rs, ric, prs, r);
> }
>
> +static __always_inline void __tlbie_pid_lpid(unsigned long pid,
> + unsigned long lpid,
> + unsigned long ric)
> +{
> + unsigned long rb, rs, prs, r;
> +
> + rb = PPC_BIT(53); /* IS = 1 */
> + rs = (pid << PPC_BITLSHIFT(31)) | (lpid & ~(PPC_BITMASK(0, 31)));
> + prs = 1; /* process scoped */
> + r = 1; /* radix format */
> +
> + asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
> + : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
> + trace_tlbie(0, 0, rb, rs, ric, prs, r);
> +}
> static __always_inline void __tlbie_lpid(unsigned long lpid, unsigned long ric)
> {
> unsigned long rb,rs,prs,r;
> @@ -190,6 +201,23 @@ static __always_inline void __tlbie_va(unsigned long va, unsigned long pid,
> trace_tlbie(0, 0, rb, rs, ric, prs, r);
> }
>
> +static __always_inline void __tlbie_va_lpid(unsigned long va, unsigned long pid,
> + unsigned long lpid,
> + unsigned long ap, unsigned long ric)
> +{
> + unsigned long rb, rs, prs, r;
> +
> + rb = va & ~(PPC_BITMASK(52, 63));
> + rb |= ap << PPC_BITLSHIFT(58);
> + rs = (pid << PPC_BITLSHIFT(31)) | (lpid & ~(PPC_BITMASK(0, 31)));
> + prs = 1; /* process scoped */
> + r = 1; /* radix format */
> +
> + asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
> + : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
> + trace_tlbie(0, 0, rb, rs, ric, prs, r);
> +}
> +
> static __always_inline void __tlbie_lpid_va(unsigned long va, unsigned long lpid,
> unsigned long ap, unsigned long ric)
> {
> @@ -235,6 +263,22 @@ static inline void fixup_tlbie_va_range(unsigned long va, unsigned long pid,
> }
> }
>
> +static inline void fixup_tlbie_va_range_lpid(unsigned long va,
> + unsigned long pid,
> + unsigned long lpid,
> + unsigned long ap)
> +{
> + if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {
> + asm volatile("ptesync" : : : "memory");
> + __tlbie_pid_lpid(0, lpid, RIC_FLUSH_TLB);
> + }
> +
> + if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {
> + asm volatile("ptesync" : : : "memory");
> + __tlbie_va_lpid(va, pid, lpid, ap, RIC_FLUSH_TLB);
> + }
> +}
> +
> static inline void fixup_tlbie_pid(unsigned long pid)
> {
> /*
> @@ -254,6 +298,25 @@ static inline void fixup_tlbie_pid(unsigned long pid)
> }
> }
>
> +static inline void fixup_tlbie_pid_lpid(unsigned long pid, unsigned long lpid)
> +{
> + /*
> + * We can use any address for the invalidation, pick one which is
> + * probably unused as an optimisation.
> + */
> + unsigned long va = ((1UL << 52) - 1);
> +
> + if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {
> + asm volatile("ptesync" : : : "memory");
> + __tlbie_pid_lpid(0, lpid, RIC_FLUSH_TLB);
> + }
> +
> + if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {
> + asm volatile("ptesync" : : : "memory");
> + __tlbie_va_lpid(va, pid, lpid, mmu_get_ap(MMU_PAGE_64K),
> + RIC_FLUSH_TLB);
> + }
> +}
>
> static inline void fixup_tlbie_lpid_va(unsigned long va, unsigned long lpid,
> unsigned long ap)
> @@ -344,6 +407,31 @@ static inline void _tlbie_pid(unsigned long pid, unsigned long ric)
> asm volatile("eieio; tlbsync; ptesync": : :"memory");
> }
>
> +static inline void _tlbie_pid_lpid(unsigned long pid, unsigned long lpid,
> + unsigned long ric)
> +{
> + asm volatile("ptesync" : : : "memory");
> +
> + /*
> + * Workaround the fact that the "ric" argument to __tlbie_pid
> + * must be a compile-time contraint to match the "i" constraint
> + * in the asm statement.
> + */
> + switch (ric) {
> + case RIC_FLUSH_TLB:
> + __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_TLB);
> + fixup_tlbie_pid_lpid(pid, lpid);
> + break;
> + case RIC_FLUSH_PWC:
> + __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_PWC);
> + break;
> + case RIC_FLUSH_ALL:
> + default:
> + __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_ALL);
> + fixup_tlbie_pid_lpid(pid, lpid);
> + }
> + asm volatile("eieio; tlbsync; ptesync" : : : "memory");
> +}
> struct tlbiel_pid {
> unsigned long pid;
> unsigned long ric;
> @@ -469,6 +557,20 @@ static inline void __tlbie_va_range(unsigned long start, unsigned long end,
> fixup_tlbie_va_range(addr - page_size, pid, ap);
> }
>
> +static inline void __tlbie_va_range_lpid(unsigned long start, unsigned long end,
> + unsigned long pid, unsigned long lpid,
> + unsigned long page_size,
> + unsigned long psize)
> +{
> + unsigned long addr;
> + unsigned long ap = mmu_get_ap(psize);
> +
> + for (addr = start; addr < end; addr += page_size)
> + __tlbie_va_lpid(addr, pid, lpid, ap, RIC_FLUSH_TLB);
> +
> + fixup_tlbie_va_range_lpid(addr - page_size, pid, lpid, ap);
> +}
> +
> static __always_inline void _tlbie_va(unsigned long va, unsigned long pid,
> unsigned long psize, unsigned long ric)
> {
> @@ -549,6 +651,18 @@ static inline void _tlbie_va_range(unsigned long start, unsigned long end,
> asm volatile("eieio; tlbsync; ptesync": : :"memory");
> }
>
> +static inline void _tlbie_va_range_lpid(unsigned long start, unsigned long end,
> + unsigned long pid, unsigned long lpid,
> + unsigned long page_size,
> + unsigned long psize, bool also_pwc)
> +{
> + asm volatile("ptesync" : : : "memory");
> + if (also_pwc)
> + __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_PWC);
> + __tlbie_va_range_lpid(start, end, pid, lpid, page_size, psize);
> + asm volatile("eieio; tlbsync; ptesync" : : : "memory");
> +}
> +
> static inline void _tlbiel_va_range_multicast(struct mm_struct *mm,
> unsigned long start, unsigned long end,
> unsigned long pid, unsigned long page_size,
> @@ -1381,4 +1495,29 @@ extern void radix_kvm_prefetch_workaround(struct mm_struct *mm)
> }
> }
> EXPORT_SYMBOL_GPL(radix_kvm_prefetch_workaround);
> +
> +/*
> + * Process-scoped invalidations for a given LPID.
> + */
> +void do_h_rpt_invalidate(unsigned long pid, unsigned long lpid,
> + unsigned long type, unsigned long page_size,
> + unsigned long psize, unsigned long start,
> + unsigned long end)
> +{
> + if ((type & H_RPTI_TYPE_ALL) == H_RPTI_TYPE_ALL) {
> + _tlbie_pid_lpid(pid, lpid, RIC_FLUSH_ALL);
> + return;
> + }
> +
> + if (type & H_RPTI_TYPE_PWC)
> + _tlbie_pid_lpid(pid, lpid, RIC_FLUSH_PWC);
> +
> + if (!start && end == -1) /* PID */
> + _tlbie_pid_lpid(pid, lpid, RIC_FLUSH_TLB);
> + else /* EA */
> + _tlbie_va_range_lpid(start, end, pid, lpid, page_size,
> + psize, false);
> +}
> +EXPORT_SYMBOL_GPL(do_h_rpt_invalidate);
> +
> #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
> index 8b281f722e5b..f8c84a62e8f3 100644
> --- a/include/uapi/linux/kvm.h
> +++ b/include/uapi/linux/kvm.h
> @@ -1078,6 +1078,7 @@ struct kvm_ppc_resize_hpt {
> #define KVM_CAP_DIRTY_LOG_RING 192
> #define KVM_CAP_X86_BUS_LOCK_EXIT 193
> #define KVM_CAP_PPC_DAWR1 194
> +#define KVM_CAP_PPC_RPT_INVALIDATE 195
>
> #ifdef KVM_CAP_IRQ_ROUTING
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* [PATCH] powerpc/configs: Add IBMVNIC to some 64-bit configs
From: Michael Ellerman @ 2021-03-02 2:09 UTC (permalink / raw)
To: linuxppc-dev
This is an IBM specific driver that we should enable to get some
build/boot testing.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/configs/ppc64_defconfig | 1 +
arch/powerpc/configs/pseries_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index 4f05a6652478..f82675d4d44e 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -177,6 +177,7 @@ CONFIG_CHELSIO_T1=m
CONFIG_BE2NET=m
CONFIG_IBMVETH=m
CONFIG_EHEA=m
+CONFIG_IBMVNIC=m
CONFIG_E100=y
CONFIG_E1000=y
CONFIG_E1000E=y
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 777221775c83..a85ff7bc1fb7 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -159,6 +159,7 @@ CONFIG_BE2NET=m
CONFIG_S2IO=m
CONFIG_IBMVETH=y
CONFIG_EHEA=y
+CONFIG_IBMVNIC=y
CONFIG_E100=y
CONFIG_E1000=y
CONFIG_E1000E=y
--
2.25.1
^ permalink raw reply related
* Re: linux-next: build failure after merge of the powerpc-fixes tree
From: Michael Ellerman @ 2021-03-02 2:09 UTC (permalink / raw)
To: Stephen Rothwell, PowerPC
Cc: Linux Next Mailing List, Linux Kernel Mailing List,
Uwe Kleine-König
In-Reply-To: <20210302112131.5bb7b08b@canb.auug.org.au>
Stephen Rothwell <sfr@canb.auug.org.au> writes:
> Hi all,
>
> After merging the powerpc-fixes tree, today's linux-next build (powerpc
> allyesconfig) failed like this:
>
> drivers/net/ethernet/ibm/ibmvnic.c:5399:13: error: conflicting types for 'ibmvnic_remove'
> 5399 | static void ibmvnic_remove(struct vio_dev *dev)
> | ^~~~~~~~~~~~~~
> drivers/net/ethernet/ibm/ibmvnic.c:81:12: note: previous declaration of 'ibmvnic_remove' was here
> 81 | static int ibmvnic_remove(struct vio_dev *);
> | ^~~~~~~~~~~~~~
>
> Caused by commit
>
> 1bdd1e6f9320 ("vio: make remove callback return void")
Gah, is IBMVNIC in any of our defconfigs?! ... no it's not.
> I have applied the following patch for today:
Thanks, I'll squash it in.
cheers
> From: Stephen Rothwell <sfr@canb.auug.org.au>
> Date: Tue, 2 Mar 2021 11:06:37 +1100
> Subject: [PATCH] vio: fix for make remove callback return void
>
> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
> ---
> drivers/net/ethernet/ibm/ibmvnic.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/ibm/ibmvnic.c b/drivers/net/ethernet/ibm/ibmvnic.c
> index eb39318766f6..fe3201ba2034 100644
> --- a/drivers/net/ethernet/ibm/ibmvnic.c
> +++ b/drivers/net/ethernet/ibm/ibmvnic.c
> @@ -78,7 +78,6 @@ MODULE_LICENSE("GPL");
> MODULE_VERSION(IBMVNIC_DRIVER_VERSION);
>
> static int ibmvnic_version = IBMVNIC_INITIAL_VERSION;
> -static int ibmvnic_remove(struct vio_dev *);
> static void release_sub_crqs(struct ibmvnic_adapter *, bool);
> static int ibmvnic_reset_crq(struct ibmvnic_adapter *);
> static int ibmvnic_send_crq_init(struct ibmvnic_adapter *);
> --
> 2.30.0
>
> --
> Cheers,
> Stephen Rothwell
^ permalink raw reply
* [powerpc:merge] BUILD SUCCESS 91966823812efbd175f904599e5cf2a854b39809
From: kernel test robot @ 2021-03-02 1:08 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git merge
branch HEAD: 91966823812efbd175f904599e5cf2a854b39809 Automatic merge of 'master' into merge (2021-03-01 12:33)
elapsed time: 753m
configs tested: 110
configs skipped: 2
The following configs have been built successfully.
More configs may be tested in the coming days.
gcc tested configs:
arm64 allyesconfig
arm64 defconfig
arm defconfig
arm allyesconfig
arm allmodconfig
arm moxart_defconfig
m68k q40_defconfig
powerpc katmai_defconfig
alpha defconfig
ia64 alldefconfig
powerpc makalu_defconfig
powerpc ge_imp3a_defconfig
mips bmips_stb_defconfig
mips malta_defconfig
arm pxa255-idp_defconfig
mips nlm_xlr_defconfig
powerpc maple_defconfig
sh alldefconfig
sh kfr2r09_defconfig
powerpc mpc834x_itxgp_defconfig
riscv alldefconfig
arm spitz_defconfig
powerpc warp_defconfig
xtensa common_defconfig
arm neponset_defconfig
sh magicpanelr2_defconfig
arm zeus_defconfig
mips cu1830-neo_defconfig
sh rsk7269_defconfig
mips mpc30x_defconfig
arm versatile_defconfig
sh titan_defconfig
m68k sun3x_defconfig
sparc sparc64_defconfig
powerpc currituck_defconfig
powerpc iss476-smp_defconfig
nios2 alldefconfig
powerpc ebony_defconfig
powerpc mpc8313_rdb_defconfig
powerpc mpc834x_mds_defconfig
ia64 allmodconfig
ia64 defconfig
ia64 allyesconfig
m68k allmodconfig
m68k defconfig
m68k allyesconfig
nios2 defconfig
arc allyesconfig
nds32 allnoconfig
c6x allyesconfig
nds32 defconfig
nios2 allyesconfig
csky defconfig
alpha allyesconfig
xtensa allyesconfig
h8300 allyesconfig
arc defconfig
sh allmodconfig
parisc defconfig
s390 allyesconfig
parisc allyesconfig
s390 defconfig
s390 allmodconfig
i386 allyesconfig
sparc allyesconfig
sparc defconfig
i386 tinyconfig
i386 defconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
i386 randconfig-a005-20210301
i386 randconfig-a003-20210301
i386 randconfig-a002-20210301
i386 randconfig-a004-20210301
i386 randconfig-a006-20210301
i386 randconfig-a001-20210301
x86_64 randconfig-a013-20210301
x86_64 randconfig-a016-20210301
x86_64 randconfig-a015-20210301
x86_64 randconfig-a014-20210301
x86_64 randconfig-a012-20210301
x86_64 randconfig-a011-20210301
i386 randconfig-a016-20210301
i386 randconfig-a012-20210301
i386 randconfig-a014-20210301
i386 randconfig-a013-20210301
i386 randconfig-a011-20210301
i386 randconfig-a015-20210301
riscv nommu_k210_defconfig
riscv allyesconfig
riscv nommu_virt_defconfig
riscv allnoconfig
riscv defconfig
riscv rv32_defconfig
riscv allmodconfig
x86_64 allyesconfig
x86_64 rhel-7.6-kselftests
x86_64 defconfig
x86_64 rhel-8.3
x86_64 rhel-8.3-kbuiltin
x86_64 kexec
clang tested configs:
x86_64 randconfig-a006-20210301
x86_64 randconfig-a001-20210301
x86_64 randconfig-a004-20210301
x86_64 randconfig-a002-20210301
x86_64 randconfig-a005-20210301
x86_64 randconfig-a003-20210301
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
* [powerpc:next-test] BUILD SUCCESS 19d767f0429ab26cb3de6c1f7a805a973c5dbd26
From: kernel test robot @ 2021-03-02 1:09 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next-test
branch HEAD: 19d767f0429ab26cb3de6c1f7a805a973c5dbd26 KVM: PPC: Book3S HV: Convert tbacct/stoltb_lock to raw spinlocks
elapsed time: 751m
configs tested: 111
configs skipped: 2
The following configs have been built successfully.
More configs may be tested in the coming days.
gcc tested configs:
arm64 allyesconfig
arm64 defconfig
arm defconfig
arm allyesconfig
arm allmodconfig
ia64 defconfig
mips cu1000-neo_defconfig
arm hisi_defconfig
sparc64 alldefconfig
powerpc tqm8560_defconfig
powerpc allnoconfig
powerpc ge_imp3a_defconfig
mips bmips_stb_defconfig
mips malta_defconfig
powerpc katmai_defconfig
arm pxa255-idp_defconfig
mips nlm_xlr_defconfig
powerpc linkstation_defconfig
m68k m5272c3_defconfig
sh sh7785lcr_defconfig
powerpc maple_defconfig
sh alldefconfig
sh kfr2r09_defconfig
powerpc mpc834x_itxgp_defconfig
powerpc warp_defconfig
sh dreamcast_defconfig
mips loongson3_defconfig
ia64 gensparse_defconfig
riscv alldefconfig
arm spitz_defconfig
xtensa common_defconfig
arm neponset_defconfig
sh magicpanelr2_defconfig
sh titan_defconfig
m68k sun3x_defconfig
sparc sparc64_defconfig
powerpc currituck_defconfig
powerpc iss476-smp_defconfig
nios2 alldefconfig
powerpc ebony_defconfig
powerpc mpc8313_rdb_defconfig
powerpc mpc834x_mds_defconfig
ia64 allmodconfig
ia64 allyesconfig
m68k allmodconfig
m68k defconfig
m68k allyesconfig
nios2 defconfig
arc allyesconfig
nds32 allnoconfig
c6x allyesconfig
nds32 defconfig
nios2 allyesconfig
csky defconfig
alpha defconfig
alpha allyesconfig
xtensa allyesconfig
h8300 allyesconfig
arc defconfig
sh allmodconfig
parisc defconfig
s390 allyesconfig
parisc allyesconfig
s390 defconfig
s390 allmodconfig
i386 allyesconfig
sparc allyesconfig
sparc defconfig
i386 tinyconfig
i386 defconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
i386 randconfig-a005-20210301
i386 randconfig-a003-20210301
i386 randconfig-a002-20210301
i386 randconfig-a004-20210301
i386 randconfig-a006-20210301
i386 randconfig-a001-20210301
x86_64 randconfig-a013-20210301
x86_64 randconfig-a016-20210301
x86_64 randconfig-a015-20210301
x86_64 randconfig-a014-20210301
x86_64 randconfig-a012-20210301
x86_64 randconfig-a011-20210301
i386 randconfig-a016-20210301
i386 randconfig-a012-20210301
i386 randconfig-a014-20210301
i386 randconfig-a013-20210301
i386 randconfig-a011-20210301
i386 randconfig-a015-20210301
riscv nommu_k210_defconfig
riscv allyesconfig
riscv nommu_virt_defconfig
riscv allnoconfig
riscv defconfig
riscv rv32_defconfig
riscv allmodconfig
x86_64 allyesconfig
x86_64 rhel-7.6-kselftests
x86_64 defconfig
x86_64 rhel-8.3
x86_64 rhel-8.3-kbuiltin
x86_64 kexec
clang tested configs:
x86_64 randconfig-a006-20210301
x86_64 randconfig-a001-20210301
x86_64 randconfig-a004-20210301
x86_64 randconfig-a002-20210301
x86_64 randconfig-a005-20210301
x86_64 randconfig-a003-20210301
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
* [powerpc:fixes-test] BUILD SUCCESS e3d773ddb5a1140780a15703b3e0e2618274cce9
From: kernel test robot @ 2021-03-02 1:00 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git fixes-test
branch HEAD: e3d773ddb5a1140780a15703b3e0e2618274cce9 powerpc/sstep: Fix VSX instruction emulation
elapsed time: 747m
configs tested: 131
configs skipped: 3
The following configs have been built successfully.
More configs may be tested in the coming days.
gcc tested configs:
arm defconfig
arm allyesconfig
arm allmodconfig
arm64 allyesconfig
arm64 defconfig
mips cu1000-neo_defconfig
arm hisi_defconfig
sparc64 alldefconfig
powerpc tqm8560_defconfig
powerpc allnoconfig
arm hackkit_defconfig
powerpc ep88xc_defconfig
mips malta_defconfig
h8300 defconfig
powerpc ge_imp3a_defconfig
mips bmips_stb_defconfig
powerpc katmai_defconfig
arm pxa255-idp_defconfig
mips nlm_xlr_defconfig
powerpc linkstation_defconfig
m68k m5272c3_defconfig
sh sh7785lcr_defconfig
s390 zfcpdump_defconfig
xtensa xip_kc705_defconfig
sparc sparc32_defconfig
nios2 10m50_defconfig
powerpc ep8248e_defconfig
powerpc asp8347_defconfig
xtensa cadence_csp_defconfig
powerpc maple_defconfig
sh alldefconfig
sh kfr2r09_defconfig
powerpc mpc834x_itxgp_defconfig
sh landisk_defconfig
mips xway_defconfig
arm stm32_defconfig
powerpc stx_gp3_defconfig
m68k m5475evb_defconfig
mips bigsur_defconfig
powerpc sequoia_defconfig
powerpc mpc5200_defconfig
mips rt305x_defconfig
arm pxa_defconfig
sh rsk7269_defconfig
mips capcella_defconfig
riscv alldefconfig
arm spitz_defconfig
powerpc warp_defconfig
xtensa common_defconfig
arm neponset_defconfig
sh magicpanelr2_defconfig
sh titan_defconfig
m68k sun3x_defconfig
sparc sparc64_defconfig
powerpc currituck_defconfig
powerpc iss476-smp_defconfig
i386 alldefconfig
sh secureedge5410_defconfig
mips qi_lb60_defconfig
powerpc eiger_defconfig
sh rsk7201_defconfig
ia64 allmodconfig
ia64 defconfig
ia64 allyesconfig
m68k allmodconfig
m68k defconfig
m68k allyesconfig
nios2 defconfig
arc allyesconfig
nds32 allnoconfig
c6x allyesconfig
nds32 defconfig
nios2 allyesconfig
csky defconfig
alpha defconfig
alpha allyesconfig
xtensa allyesconfig
h8300 allyesconfig
arc defconfig
sh allmodconfig
parisc defconfig
s390 allyesconfig
s390 allmodconfig
parisc allyesconfig
s390 defconfig
i386 allyesconfig
sparc allyesconfig
sparc defconfig
i386 tinyconfig
i386 defconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
i386 randconfig-a005-20210301
i386 randconfig-a003-20210301
i386 randconfig-a002-20210301
i386 randconfig-a004-20210301
i386 randconfig-a006-20210301
i386 randconfig-a001-20210301
x86_64 randconfig-a015-20210301
x86_64 randconfig-a014-20210301
x86_64 randconfig-a013-20210301
x86_64 randconfig-a016-20210301
x86_64 randconfig-a012-20210301
x86_64 randconfig-a011-20210301
i386 randconfig-a016-20210301
i386 randconfig-a012-20210301
i386 randconfig-a014-20210301
i386 randconfig-a013-20210301
i386 randconfig-a011-20210301
i386 randconfig-a015-20210301
riscv nommu_k210_defconfig
riscv allyesconfig
riscv nommu_virt_defconfig
riscv allnoconfig
riscv defconfig
riscv rv32_defconfig
riscv allmodconfig
x86_64 allyesconfig
x86_64 rhel-7.6-kselftests
x86_64 defconfig
x86_64 rhel-8.3
x86_64 rhel-8.3-kbuiltin
x86_64 kexec
clang tested configs:
x86_64 randconfig-a006-20210301
x86_64 randconfig-a001-20210301
x86_64 randconfig-a004-20210301
x86_64 randconfig-a002-20210301
x86_64 randconfig-a005-20210301
x86_64 randconfig-a003-20210301
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
* linux-next: build failure after merge of the powerpc-fixes tree
From: Stephen Rothwell @ 2021-03-02 0:21 UTC (permalink / raw)
To: Michael Ellerman, PowerPC
Cc: Linux Next Mailing List, Linux Kernel Mailing List,
Uwe Kleine-König
[-- Attachment #1: Type: text/plain, Size: 1543 bytes --]
Hi all,
After merging the powerpc-fixes tree, today's linux-next build (powerpc
allyesconfig) failed like this:
drivers/net/ethernet/ibm/ibmvnic.c:5399:13: error: conflicting types for 'ibmvnic_remove'
5399 | static void ibmvnic_remove(struct vio_dev *dev)
| ^~~~~~~~~~~~~~
drivers/net/ethernet/ibm/ibmvnic.c:81:12: note: previous declaration of 'ibmvnic_remove' was here
81 | static int ibmvnic_remove(struct vio_dev *);
| ^~~~~~~~~~~~~~
Caused by commit
1bdd1e6f9320 ("vio: make remove callback return void")
I have applied the following patch for today:
From: Stephen Rothwell <sfr@canb.auug.org.au>
Date: Tue, 2 Mar 2021 11:06:37 +1100
Subject: [PATCH] vio: fix for make remove callback return void
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
drivers/net/ethernet/ibm/ibmvnic.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/ethernet/ibm/ibmvnic.c b/drivers/net/ethernet/ibm/ibmvnic.c
index eb39318766f6..fe3201ba2034 100644
--- a/drivers/net/ethernet/ibm/ibmvnic.c
+++ b/drivers/net/ethernet/ibm/ibmvnic.c
@@ -78,7 +78,6 @@ MODULE_LICENSE("GPL");
MODULE_VERSION(IBMVNIC_DRIVER_VERSION);
static int ibmvnic_version = IBMVNIC_INITIAL_VERSION;
-static int ibmvnic_remove(struct vio_dev *);
static void release_sub_crqs(struct ibmvnic_adapter *, bool);
static int ibmvnic_reset_crq(struct ibmvnic_adapter *);
static int ibmvnic_send_crq_init(struct ibmvnic_adapter *);
--
2.30.0
--
Cheers,
Stephen Rothwell
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply related
* Re: [PATCH] ASoC: fsl_xcvr: move reset assert into runtime_resume
From: Mark Brown @ 2021-03-01 23:34 UTC (permalink / raw)
To: timur, Xiubo.Lee, tiwai, Shengjiu Wang, nicoleotsuka, festevam,
perex, alsa-devel
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <1613984990-5534-1-git-send-email-shengjiu.wang@nxp.com>
On Mon, 22 Feb 2021 17:09:50 +0800, Shengjiu Wang wrote:
> Move reset assert into runtime_resume since we
> cannot rely on reset assert state when the device
> is put out from suspend.
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/1] ASoC: fsl_xcvr: move reset assert into runtime_resume
commit: 0f780e4bef4587f07060109040955d6b6aa179a2
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
^ permalink raw reply
* Re: [PATCH] ASoC: fsl_sai: Add pm qos cpu latency support
From: Mark Brown @ 2021-03-01 23:34 UTC (permalink / raw)
To: timur, Xiubo.Lee, tiwai, Shengjiu Wang, nicoleotsuka, festevam,
perex, alsa-devel
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <1613983220-5373-1-git-send-email-shengjiu.wang@nxp.com>
On Mon, 22 Feb 2021 16:40:20 +0800, Shengjiu Wang wrote:
> On SoCs such as i.MX7ULP, cpuidle has some levels which
> may disable system/bus clocks, so need to add pm_qos to
> prevent cpuidle from entering low level idles and make sure
> system/bus clocks are enabled when sai is active.
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/1] ASoC: fsl_sai: Add pm qos cpu latency support
commit: 6d85d770c171972c0f33f74b84bf0fedc111e89f
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
^ permalink raw reply
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