* Re: [PATCH v3 14/41] KVM: PPC: Book3S 64: move bad_host_intr check to HV handler
From: Alexey Kardashevskiy @ 2021-03-20 9:07 UTC (permalink / raw)
To: Nicholas Piggin, kvm-ppc; +Cc: linuxppc-dev
In-Reply-To: <20210305150638.2675513-15-npiggin@gmail.com>
On 06/03/2021 02:06, Nicholas Piggin wrote:
> This is not used by PR KVM.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
a small tote - it probably makes sense to move this before 09/41 as this
one removes what 09/41 added to book3s_64_entry.S. Thanks,
> ---
> arch/powerpc/kvm/book3s_64_entry.S | 3 ---
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 +++-
> arch/powerpc/kvm/book3s_segment.S | 7 +++++++
> 3 files changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/arch/powerpc/kvm/book3s_64_entry.S b/arch/powerpc/kvm/book3s_64_entry.S
> index d06e81842368..7a6b060ceed8 100644
> --- a/arch/powerpc/kvm/book3s_64_entry.S
> +++ b/arch/powerpc/kvm/book3s_64_entry.S
> @@ -78,11 +78,8 @@ do_kvm_interrupt:
> beq- .Lmaybe_skip
> .Lno_skip:
> #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> - cmpwi r9,KVM_GUEST_MODE_HOST_HV
> - beq kvmppc_bad_host_intr
> #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
> cmpwi r9,KVM_GUEST_MODE_GUEST
> - ld r9,HSTATE_SCRATCH2(r13)
> beq kvmppc_interrupt_pr
> #endif
> b kvmppc_interrupt_hv
> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> index f976efb7e4a9..75405ef53238 100644
> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> @@ -1265,6 +1265,7 @@ hdec_soon:
> kvmppc_interrupt_hv:
> /*
> * Register contents:
> + * R9 = HSTATE_IN_GUEST
> * R12 = (guest CR << 32) | interrupt vector
> * R13 = PACA
> * guest R12 saved in shadow VCPU SCRATCH0
> @@ -1272,6 +1273,8 @@ kvmppc_interrupt_hv:
> * guest R9 saved in HSTATE_SCRATCH2
> */
> /* We're now back in the host but in guest MMU context */
> + cmpwi r9,KVM_GUEST_MODE_HOST_HV
> + beq kvmppc_bad_host_intr
> li r9, KVM_GUEST_MODE_HOST_HV
> stb r9, HSTATE_IN_GUEST(r13)
>
> @@ -3272,7 +3275,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_P9_TM_HV_ASSIST)
> * cfar is saved in HSTATE_CFAR(r13)
> * ppr is saved in HSTATE_PPR(r13)
> */
> -.global kvmppc_bad_host_intr
> kvmppc_bad_host_intr:
> /*
> * Switch to the emergency stack, but start half-way down in
> diff --git a/arch/powerpc/kvm/book3s_segment.S b/arch/powerpc/kvm/book3s_segment.S
> index 1f492aa4c8d6..ef1d88b869bf 100644
> --- a/arch/powerpc/kvm/book3s_segment.S
> +++ b/arch/powerpc/kvm/book3s_segment.S
> @@ -167,8 +167,15 @@ kvmppc_interrupt_pr:
> * R12 = (guest CR << 32) | exit handler id
> * R13 = PACA
> * HSTATE.SCRATCH0 = guest R12
> + *
> + * If HV is possible, additionally:
> + * R9 = HSTATE_IN_GUEST
> + * HSTATE.SCRATCH2 = guest R9
> */
> #ifdef CONFIG_PPC64
> +#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> + ld r9,HSTATE_SCRATCH2(r13)
> +#endif
> /* Match 32-bit entry */
> rotldi r12, r12, 32 /* Flip R12 halves for stw */
> stw r12, HSTATE_SCRATCH1(r13) /* CR is now in the low half */
>
--
Alexey
^ permalink raw reply
* Patch "vmlinux.lds.h: Create section for protection against instrumentation" has been added to the 4.19-stable tree
From: gregkh @ 2021-03-20 10:56 UTC (permalink / raw)
To: alexandre.chartre, arnd, benh, dja, drinkcat, gregkh, groeck,
linuxppc-dev, michal.lkml, mpe, naveen.n.rao, npiggin, paulus,
peterz, sparse, tglx, yamada.masahiro
Cc: stable-commits
In-Reply-To: <20210320121614.for-stable-4.19.v2.1.I222f801866f71be9f7d85e5b10665cd4506d78ec@changeid>
This is a note to let you know that I've just added the patch titled
vmlinux.lds.h: Create section for protection against instrumentation
to the 4.19-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
vmlinux.lds.h-create-section-for-protection-against-instrumentation.patch
and it can be found in the queue-4.19 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.
From foo@baz Sat Mar 20 11:54:47 AM CET 2021
From: Nicolas Boichat <drinkcat@chromium.org>
Date: Sat, 20 Mar 2021 12:16:25 +0800
Subject: vmlinux.lds.h: Create section for protection against instrumentation
To: stable@vger.kernel.org
Cc: groeck@chromium.org, Thomas Gleixner <tglx@linutronix.de>, Alexandre Chartre <alexandre.chartre@oracle.com>, Peter Zijlstra <peterz@infradead.org>, Nicolas Boichat <drinkcat@chromium.org>, Arnd Bergmann <arnd@arndb.de>, Benjamin Herrenschmidt <benh@kernel.crashing.org>, Christopher Li <sparse@chrisli.org>, Daniel Axtens <dja@axtens.net>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Masahiro Yamada <yamada.masahiro@socionext.com>, Michael Ellerman <mpe@ellerman.id.au>, Michal Marek <michal.lkml@markovi.net>, "Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com>, Nicholas Piggin <npiggin@gmail.com>, Paul Mackerras <paulus@samba.org>, linux-arch@vger.kernel.org, linux-kbuild@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sparse@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Message-ID: <20210320121614.for-stable-4.19.v2.1.I222f801866f71be9f7d85e5b10665cd4506d78ec@changeid>
From: Nicolas Boichat <drinkcat@chromium.org>
From: Thomas Gleixner <tglx@linutronix.de>
commit 6553896666433e7efec589838b400a2a652b3ffa upstream.
Some code pathes, especially the low level entry code, must be protected
against instrumentation for various reasons:
- Low level entry code can be a fragile beast, especially on x86.
- With NO_HZ_FULL RCU state needs to be established before using it.
Having a dedicated section for such code allows to validate with tooling
that no unsafe functions are invoked.
Add the .noinstr.text section and the noinstr attribute to mark
functions. noinstr implies notrace. Kprobes will gain a section check
later.
Provide also a set of markers: instrumentation_begin()/end()
These are used to mark code inside a noinstr function which calls
into regular instrumentable text section as safe.
The instrumentation markers are only active when CONFIG_DEBUG_ENTRY is
enabled as the end marker emits a NOP to prevent the compiler from merging
the annotation points. This means the objtool verification requires a
kernel compiled with this option.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200505134100.075416272@linutronix.de
[Nicolas:
Guard noinstr macro in include/linux/compiler_types.h in __KERNEL__
&& !__ASSEMBLY__, otherwise noinstr is expanded in the linker
script construct.
Upstream does not have this problem as many macros were moved by
commit 71391bdd2e9a ("include/linux/compiler_types.h: don't pollute
userspace with macro definitions"). We take the minimal approach here
and just guard the new macro.
Minor context conflicts in:
arch/powerpc/kernel/vmlinux.lds.S
include/asm-generic/vmlinux.lds.h
include/linux/compiler.h]
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
Technically guarding with !__ASSEMBLY__ should be enough, but
there seems to be no reason to expose this new macro when
!__KERNEL__, so let's just match what upstream does.
Changes in v2:
- Guard noinstr macro by __KERNEL__ && !__ASSEMBLY__ to prevent
expansion in linker script and match upstream.
arch/powerpc/kernel/vmlinux.lds.S | 1
include/asm-generic/sections.h | 3 ++
include/asm-generic/vmlinux.lds.h | 10 +++++++
include/linux/compiler.h | 54 ++++++++++++++++++++++++++++++++++++++
include/linux/compiler_types.h | 6 ++++
scripts/mod/modpost.c | 2 -
6 files changed, 75 insertions(+), 1 deletion(-)
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -99,6 +99,7 @@ SECTIONS
#endif
/* careful! __ftr_alt_* sections need to be close to .text */
*(.text.hot TEXT_MAIN .text.fixup .text.unlikely .fixup __ftr_alt_* .ref.text);
+ NOINSTR_TEXT
SCHED_TEXT
CPUIDLE_TEXT
LOCK_TEXT
--- a/include/asm-generic/sections.h
+++ b/include/asm-generic/sections.h
@@ -53,6 +53,9 @@ extern char __ctors_start[], __ctors_end
/* Start and end of .opd section - used for function descriptors. */
extern char __start_opd[], __end_opd[];
+/* Start and end of instrumentation protected text section */
+extern char __noinstr_text_start[], __noinstr_text_end[];
+
extern __visible const void __nosave_begin, __nosave_end;
/* Function descriptor handling (if any). Override in asm/sections.h */
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -483,6 +483,15 @@
}
/*
+ * Non-instrumentable text section
+ */
+#define NOINSTR_TEXT \
+ ALIGN_FUNCTION(); \
+ __noinstr_text_start = .; \
+ *(.noinstr.text) \
+ __noinstr_text_end = .;
+
+/*
* .text section. Map to function alignment to avoid address changes
* during second ld run in second ld pass when generating System.map
*
@@ -496,6 +505,7 @@
*(TEXT_MAIN .text.fixup) \
*(.text.unlikely .text.unlikely.*) \
*(.text.unknown .text.unknown.*) \
+ NOINSTR_TEXT \
*(.text..refcount) \
*(.ref.text) \
MEM_KEEP(init.text*) \
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -129,11 +129,65 @@ void ftrace_likely_update(struct ftrace_
".pushsection .discard.unreachable\n\t" \
".long 999b - .\n\t" \
".popsection\n\t"
+
+#ifdef CONFIG_DEBUG_ENTRY
+/* Begin/end of an instrumentation safe region */
+#define instrumentation_begin() ({ \
+ asm volatile("%c0:\n\t" \
+ ".pushsection .discard.instr_begin\n\t" \
+ ".long %c0b - .\n\t" \
+ ".popsection\n\t" : : "i" (__COUNTER__)); \
+})
+
+/*
+ * Because instrumentation_{begin,end}() can nest, objtool validation considers
+ * _begin() a +1 and _end() a -1 and computes a sum over the instructions.
+ * When the value is greater than 0, we consider instrumentation allowed.
+ *
+ * There is a problem with code like:
+ *
+ * noinstr void foo()
+ * {
+ * instrumentation_begin();
+ * ...
+ * if (cond) {
+ * instrumentation_begin();
+ * ...
+ * instrumentation_end();
+ * }
+ * bar();
+ * instrumentation_end();
+ * }
+ *
+ * If instrumentation_end() would be an empty label, like all the other
+ * annotations, the inner _end(), which is at the end of a conditional block,
+ * would land on the instruction after the block.
+ *
+ * If we then consider the sum of the !cond path, we'll see that the call to
+ * bar() is with a 0-value, even though, we meant it to happen with a positive
+ * value.
+ *
+ * To avoid this, have _end() be a NOP instruction, this ensures it will be
+ * part of the condition block and does not escape.
+ */
+#define instrumentation_end() ({ \
+ asm volatile("%c0: nop\n\t" \
+ ".pushsection .discard.instr_end\n\t" \
+ ".long %c0b - .\n\t" \
+ ".popsection\n\t" : : "i" (__COUNTER__)); \
+})
+#endif /* CONFIG_DEBUG_ENTRY */
+
#else
#define annotate_reachable()
#define annotate_unreachable()
#endif
+#ifndef instrumentation_begin
+#define instrumentation_begin() do { } while(0)
+#define instrumentation_end() do { } while(0)
+#endif
+
#ifndef ASM_UNREACHABLE
# define ASM_UNREACHABLE
#endif
--- a/include/linux/compiler_types.h
+++ b/include/linux/compiler_types.h
@@ -234,6 +234,12 @@ struct ftrace_likely_data {
#define notrace __attribute__((no_instrument_function))
#endif
+#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
+/* Section for code which can't be instrumented at all */
+#define noinstr \
+ noinline notrace __attribute((__section__(".noinstr.text")))
+#endif
+
/*
* it doesn't make sense on ARM (currently the only user of __naked)
* to trace naked functions because then mcount is called without
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
@@ -895,7 +895,7 @@ static void check_section(const char *mo
#define DATA_SECTIONS ".data", ".data.rel"
#define TEXT_SECTIONS ".text", ".text.unlikely", ".sched.text", \
- ".kprobes.text", ".cpuidle.text"
+ ".kprobes.text", ".cpuidle.text", ".noinstr.text"
#define OTHER_TEXT_SECTIONS ".ref.text", ".head.text", ".spinlock.text", \
".fixup", ".entry.text", ".exception.text", ".text.*", \
".coldtext"
Patches currently in stable-queue which might be from drinkcat@chromium.org are
queue-4.19/vmlinux.lds.h-create-section-for-protection-against-instrumentation.patch
queue-4.19/lkdtm-don-t-move-ctors-to-.rodata.patch
^ permalink raw reply
* Re: [for-stable-4.19 PATCH v2 0/2] Backport patches to fix KASAN+LKDTM with recent clang on ARM64
From: Greg Kroah-Hartman @ 2021-03-20 10:57 UTC (permalink / raw)
To: Nicolas Boichat
Cc: Alexandre Chartre, Peter Zijlstra, Christopher Li,
Masahiro Yamada, Paul Mackerras, groeck, linux-arch,
clang-built-linux, linux-sparse, Naveen N. Rao, Kees Cook,
Arnd Bergmann, linux-kbuild, Nicholas Piggin, Thomas Gleixner,
Daniel Axtens, Michal Marek, linux-kernel, stable, linuxppc-dev
In-Reply-To: <20210320041626.885806-1-drinkcat@chromium.org>
On Sat, Mar 20, 2021 at 12:16:24PM +0800, Nicolas Boichat wrote:
> Backport 2 patches that are required to make KASAN+LKDTM work
> with recent clang (patch 2/2 has a complete description).
> Tested on our chromeos-4.19 branch.
> Also compile tested on x86-64 and arm64 with gcc this time
> around.
>
> Patch 1/2 adds a guard around noinstr that matches upstream,
> to prevent a build issue, and has some minor context conflicts.
> Patch 2/2 is a clean backport.
>
> These patches have been merged to 5.4 stable already. We might
> need to backport to older stable branches, but this is what I
> could test for now.
Ok, trying this again, let's see what breaks :)
thanks,
greg k-h
^ permalink raw reply
* [PATCH v7] powerpc/irq: Inline call_do_irq() and call_do_softirq()
From: Michael Ellerman @ 2021-03-20 12:22 UTC (permalink / raw)
To: linuxppc-dev
From: Christophe Leroy <christophe.leroy@csgroup.eu>
call_do_irq() and call_do_softirq() are simple enough to be
worth inlining.
Inlining them avoids an mflr/mtlr pair plus a save/reload on stack. It
also allows GCC to keep the saved ksp_limit in an nonvolatile reg.
This is inspired from S390 arch. Several other arches do more or
less the same. The way sparc arch does seems odd thought.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
v2: no change.
v3: no change.
v4:
- comment reminding the purpose of the inline asm block.
- added r2 as clobbered reg
v5:
- Limiting the change to PPC32 for now.
- removed r2 from the clobbered regs list (on PPC32 r2 points to current all the time)
- Removed patch 1 and merged ksp_limit handling in here.
v6:
- Rebase on top of merge-test (ca6e327fefb2).
- Remove the ksp_limit stuff as it's doesn't exist anymore.
v7:
mpe:
- Enable for 64-bit too. This all in-kernel code calling in-kernel
code, and must use the kernel TOC.
- Use named parameters for the inline asm.
- Reformat inline asm.
- Mark as always_inline.
- Drop unused ret from call_do_softirq(), add r3 as clobbered.
---
arch/powerpc/include/asm/irq.h | 2 --
arch/powerpc/kernel/irq.c | 41 ++++++++++++++++++++++++++++++++++
arch/powerpc/kernel/misc_32.S | 25 ---------------------
arch/powerpc/kernel/misc_64.S | 22 ------------------
4 files changed, 41 insertions(+), 49 deletions(-)
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index f3f264e441a7..b2bd58830430 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -53,8 +53,6 @@ extern void *mcheckirq_ctx[NR_CPUS];
extern void *hardirq_ctx[NR_CPUS];
extern void *softirq_ctx[NR_CPUS];
-void call_do_softirq(void *sp);
-void call_do_irq(struct pt_regs *regs, void *sp);
extern void do_IRQ(struct pt_regs *regs);
extern void __init init_IRQ(void);
extern void __do_irq(struct pt_regs *regs);
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 5b72abbff96c..260effc0a435 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -667,6 +667,47 @@ static inline void check_stack_overflow(void)
}
}
+static __always_inline void call_do_softirq(const void *sp)
+{
+ /* Temporarily switch r1 to sp, call __do_softirq() then restore r1. */
+ asm volatile (
+ PPC_STLU " %%r1, %[offset](%[sp]) ;"
+ "mr %%r1, %[sp] ;"
+ "bl %[callee] ;"
+ PPC_LL " %%r1, 0(%%r1) ;"
+ : // Outputs
+ : // Inputs
+ [sp] "b" (sp), [offset] "i" (THREAD_SIZE - STACK_FRAME_OVERHEAD),
+ [callee] "i" (__do_softirq)
+ : // Clobbers
+ "lr", "xer", "ctr", "memory", "cr0", "cr1", "cr5", "cr6",
+ "cr7", "r0", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
+ "r11", "r12"
+ );
+}
+
+static __always_inline void call_do_irq(struct pt_regs *regs, void *sp)
+{
+ register unsigned long r3 asm("r3") = (unsigned long)regs;
+
+ /* Temporarily switch r1 to sp, call __do_irq() then restore r1. */
+ asm volatile (
+ PPC_STLU " %%r1, %[offset](%[sp]) ;"
+ "mr %%r1, %[sp] ;"
+ "bl %[callee] ;"
+ PPC_LL " %%r1, 0(%%r1) ;"
+ : // Outputs
+ "+r" (r3)
+ : // Inputs
+ [sp] "b" (sp), [offset] "i" (THREAD_SIZE - STACK_FRAME_OVERHEAD),
+ [callee] "i" (__do_irq)
+ : // Clobbers
+ "lr", "xer", "ctr", "memory", "cr0", "cr1", "cr5", "cr6",
+ "cr7", "r0", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
+ "r11", "r12"
+ );
+}
+
void __do_irq(struct pt_regs *regs)
{
unsigned int irq;
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index acc410043b96..6a076bef2932 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -27,31 +27,6 @@
.text
-_GLOBAL(call_do_softirq)
- mflr r0
- stw r0,4(r1)
- stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
- mr r1,r3
- bl __do_softirq
- lwz r1,0(r1)
- lwz r0,4(r1)
- mtlr r0
- blr
-
-/*
- * void call_do_irq(struct pt_regs *regs, void *sp);
- */
-_GLOBAL(call_do_irq)
- mflr r0
- stw r0,4(r1)
- stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4)
- mr r1,r4
- bl __do_irq
- lwz r1,0(r1)
- lwz r0,4(r1)
- mtlr r0
- blr
-
/*
* This returns the high 64 bits of the product of two 64-bit numbers.
*/
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 070465825c21..4b761a18a74d 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -27,28 +27,6 @@
.text
-_GLOBAL(call_do_softirq)
- mflr r0
- std r0,16(r1)
- stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
- mr r1,r3
- bl __do_softirq
- ld r1,0(r1)
- ld r0,16(r1)
- mtlr r0
- blr
-
-_GLOBAL(call_do_irq)
- mflr r0
- std r0,16(r1)
- stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4)
- mr r1,r4
- bl __do_irq
- ld r1,0(r1)
- ld r0,16(r1)
- mtlr r0
- blr
-
_GLOBAL(__bswapdi2)
EXPORT_SYMBOL(__bswapdi2)
srdi r8,r3,32
--
2.25.1
^ permalink raw reply related
* Re: [PATCH 5/6] powerpc/mm/64s/hash: Add real-mode change_memory_range() for hash LPAR
From: Michael Ellerman @ 2021-03-20 13:04 UTC (permalink / raw)
To: Nicholas Piggin, linuxppc-dev; +Cc: aneesh.kumar
In-Reply-To: <1613084139.rsms9jxmax.astroid@bobo.none>
Nicholas Piggin <npiggin@gmail.com> writes:
> Excerpts from Michael Ellerman's message of February 11, 2021 11:51 pm:
...
>> diff --git a/arch/powerpc/mm/book3s64/hash_pgtable.c b/arch/powerpc/mm/book3s64/hash_pgtable.c
>> index 3663d3cdffac..01de985df2c4 100644
>> --- a/arch/powerpc/mm/book3s64/hash_pgtable.c
>> +++ b/arch/powerpc/mm/book3s64/hash_pgtable.c
>> @@ -414,6 +428,73 @@ static void change_memory_range(unsigned long start, unsigned long end,
>> mmu_kernel_ssize);
>> }
>>
>> +static int notrace chmem_secondary_loop(struct change_memory_parms *parms)
>> +{
>> + unsigned long msr, tmp, flags;
>> + int *p;
>> +
>> + p = &parms->cpu_counter.counter;
>> +
>> + local_irq_save(flags);
>> + __hard_EE_RI_disable();
>> +
>> + asm volatile (
>> + // Switch to real mode and leave interrupts off
>> + "mfmsr %[msr] ;"
>> + "li %[tmp], %[MSR_IR_DR] ;"
>> + "andc %[tmp], %[msr], %[tmp] ;"
>> + "mtmsrd %[tmp] ;"
>> +
>> + // Tell the master we are in real mode
>> + "1: "
>> + "lwarx %[tmp], 0, %[p] ;"
>> + "addic %[tmp], %[tmp], -1 ;"
>> + "stwcx. %[tmp], 0, %[p] ;"
>> + "bne- 1b ;"
>> +
>> + // Spin until the counter goes to zero
>> + "2: ;"
>> + "lwz %[tmp], 0(%[p]) ;"
>> + "cmpwi %[tmp], 0 ;"
>> + "bne- 2b ;"
>> +
>> + // Switch back to virtual mode
>> + "mtmsrd %[msr] ;"
>> +
>> + : // outputs
>> + [msr] "=&r" (msr), [tmp] "=&b" (tmp), "+m" (*p)
>> + : // inputs
>> + [p] "b" (p), [MSR_IR_DR] "i" (MSR_IR | MSR_DR)
>> + : // clobbers
>> + "cc", "xer"
>> + );
>> +
>> + local_irq_restore(flags);
>
> Hmm. __hard_EE_RI_disable won't get restored by this because it doesn't
> set the HARD_DIS flag. Also we don't want RI disabled here because
> tracing will get called first (which might take SLB or HPTE fault).
Thanks for noticing. I originally wrote hard_irq_disable() but then
thought disabling RI also would be good.
> But it's also slightly rude to ever enable EE under an irq soft mask,
> because you don't know if it had been disabled by the masked interrupt
> handler. It's not strictly a problem AFAIK because the interrupt would
> just get masked again, but if we try to maintain a good pattern would
> be good. Hmm that means we should add a check for irqs soft masked in
> __hard_irq_enable(), I'm not sure if all existing users would follow
> this rule.
>
> Might be better to call hard_irq_disable(); after the local_irq_save();
> and then clear and reset RI inside that region (could just do it at the
> same time as disabling MMU).
Thinking about it more, there's no real reason to disable RI.
We should be able to return from an interrupt in there, it's just that
if we do take one we'll probably die before we get a chance to return
because the mapping of text will be missing.
So disabling RI doesn't really gain us anything I don't think.
cheers
^ permalink raw reply
* [PATCH] crypto: vmx: fix incorrect kernel-doc comment syntax in files
From: Aditya Srivastava @ 2021-03-20 20:25 UTC (permalink / raw)
To: leitao
Cc: rdunlap, herbert, corbet, nayna, linuxppc-dev, linux-kernel,
yashsri421, pfsmorigo, linux-crypto, lukas.bulwahn,
linux-kernel-mentees, davem, paulus
The opening comment mark '/**' is used for highlighting the beginning of
kernel-doc comments.
There are certain files in drivers/crypto/vmx, which follow this syntax,
but the content inside does not comply with kernel-doc.
Such lines were probably not meant for kernel-doc parsing, but are parsed
due to the presence of kernel-doc like comment syntax(i.e, '/**'), which
causes unexpected warnings from kernel-doc.
E.g., presence of kernel-doc like comment in the header line for
drivers/crypto/vmx/vmx.c causes this warning by kernel-doc:
"warning: expecting prototype for Routines supporting VMX instructions on the Power 8(). Prototype was for p8_init() instead"
Similarly for other files too.
Provide a simple fix by replacing such occurrences with general comment
format, i.e. '/*', to prevent kernel-doc from parsing it.
Signed-off-by: Aditya Srivastava <yashsri421@gmail.com>
---
* Applies perfectly on next-20210319
drivers/crypto/vmx/aes.c | 2 +-
drivers/crypto/vmx/aes_cbc.c | 2 +-
drivers/crypto/vmx/aes_ctr.c | 2 +-
drivers/crypto/vmx/aes_xts.c | 2 +-
drivers/crypto/vmx/ghash.c | 2 +-
drivers/crypto/vmx/vmx.c | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/crypto/vmx/aes.c b/drivers/crypto/vmx/aes.c
index d05c02baebcf..ec06189fbf99 100644
--- a/drivers/crypto/vmx/aes.c
+++ b/drivers/crypto/vmx/aes.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* AES routines supporting VMX instructions on the Power 8
*
* Copyright (C) 2015 International Business Machines Inc.
diff --git a/drivers/crypto/vmx/aes_cbc.c b/drivers/crypto/vmx/aes_cbc.c
index d88084447f1c..ed0debc7acb5 100644
--- a/drivers/crypto/vmx/aes_cbc.c
+++ b/drivers/crypto/vmx/aes_cbc.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* AES CBC routines supporting VMX instructions on the Power 8
*
* Copyright (C) 2015 International Business Machines Inc.
diff --git a/drivers/crypto/vmx/aes_ctr.c b/drivers/crypto/vmx/aes_ctr.c
index 79ba062ee1c1..9a3da8cd62f3 100644
--- a/drivers/crypto/vmx/aes_ctr.c
+++ b/drivers/crypto/vmx/aes_ctr.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* AES CTR routines supporting VMX instructions on the Power 8
*
* Copyright (C) 2015 International Business Machines Inc.
diff --git a/drivers/crypto/vmx/aes_xts.c b/drivers/crypto/vmx/aes_xts.c
index 9fee1b1532a4..dabbccb41550 100644
--- a/drivers/crypto/vmx/aes_xts.c
+++ b/drivers/crypto/vmx/aes_xts.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* AES XTS routines supporting VMX In-core instructions on Power 8
*
* Copyright (C) 2015 International Business Machines Inc.
diff --git a/drivers/crypto/vmx/ghash.c b/drivers/crypto/vmx/ghash.c
index 14807ac2e3b9..5bc5710a6de0 100644
--- a/drivers/crypto/vmx/ghash.c
+++ b/drivers/crypto/vmx/ghash.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0
-/**
+/*
* GHASH routines supporting VMX instructions on the Power 8
*
* Copyright (C) 2015, 2019 International Business Machines Inc.
diff --git a/drivers/crypto/vmx/vmx.c b/drivers/crypto/vmx/vmx.c
index a40d08e75fc0..7eb713cc87c8 100644
--- a/drivers/crypto/vmx/vmx.c
+++ b/drivers/crypto/vmx/vmx.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* Routines supporting VMX instructions on the Power 8
*
* Copyright (C) 2015 International Business Machines Inc.
--
2.17.1
^ permalink raw reply related
* [PATCH] powerpc: epapr: A typo fix
From: Bhaskar Chowdhury @ 2021-03-20 21:39 UTC (permalink / raw)
To: mpe, benh, paulus, unixbhaskar, rdunlap, linuxppc-dev,
linux-kernel
s/parmeters/parameters/
Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
---
arch/powerpc/include/asm/epapr_hcalls.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/epapr_hcalls.h b/arch/powerpc/include/asm/epapr_hcalls.h
index c99ba08a408d..cdf3c6df5123 100644
--- a/arch/powerpc/include/asm/epapr_hcalls.h
+++ b/arch/powerpc/include/asm/epapr_hcalls.h
@@ -65,7 +65,7 @@
* but the gcc inline assembly syntax does not allow us to specify registers
* on the clobber list that are also on the input/output list. Therefore,
* the lists of clobbered registers depends on the number of register
- * parmeters ("+r" and "=r") passed to the hypercall.
+ * parameters ("+r" and "=r") passed to the hypercall.
*
* Each assembly block should use one of the HCALL_CLOBBERSx macros. As a
* general rule, 'x' is the number of parameters passed to the assembly
--
2.26.2
^ permalink raw reply related
* Re: [PATCH 00/36] [Set 4] Rid W=1 warnings in SCSI
From: Lee Jones @ 2021-03-19 8:10 UTC (permalink / raw)
To: Martin K. Petersen
Cc: Uma Krishnan, Brian Macy, Hannes Reinecke, Anil Ravindranath,
Tyrel Datwyler, willy, Le Moal, Dave Boutcher, Marvell,
Jirka Hanika, Linda Xie, C.L. Huang, target-devel, Drew Eckhardt,
Brian King, Christoph Hellwig, Alan Cox, linux-drivers,
Nicholas A. Bellinger, Linux GmbH, linux-scsi, Shaun Tancheff,
Subbu Seetharaman, Sathya Prakash, Doug Ledford,
Leonard N. Zubkoff, Ketan Mukadam, Dave Boutcher, Colin DeVilbiss,
Karan Tilak Kumar, Badari Pulavarty, Bryant G. Ly,
Douglas Gilbert, Jamie Lenehan, MPT-FusionLinux.pdl,
Richard Gooch, MPT-FusionLinux.pdl, Bas Vermeulen,
Artur Paszkiewicz, Michael Cyr, dc395x, Satish Kharat,
Suganath Prabu Subramani, James E.J. Bottomley, Luben Tuikov,
Ali Akcaagac, Kurt Garloff, Jitendra Bhivare, Brian King,
Hannes Reinecke, Erich Chen, David Chaw, Santiago Leon,
Matthew R. Ochs, Manoj N. Kumar, Sreekanth Reddy, Eric Youngdale,
Oliver Neukum, linux-kernel, Sesidhar Baddela, Alex Davis,
Torben Mathiasen, Paul Mackerras, FUJITA Tomonori, linuxppc-dev
In-Reply-To: <yq1zgyzolqx.fsf@ca-mkp.ca.oracle.com>
On Thu, 18 Mar 2021, Martin K. Petersen wrote:
>
> Lee,
>
> > This set is part of a larger effort attempting to clean-up W=1 kernel
> > builds, which are currently overwhelmingly riddled with niggly little
> > warnings.
>
> Applied to 5.13/scsi-staging, thanks! I fixed a few little things.
Thanks for your continued support Martin.
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply
* Re: [for-stable-4.19 PATCH 1/2] vmlinux.lds.h: Create section for protection against instrumentation
From: Alexandre Chartre @ 2021-03-19 11:20 UTC (permalink / raw)
To: Greg Kroah-Hartman, Nicolas Boichat
Cc: Sasha Levin, linux-arch, Michal Marek, Arnd Bergmann,
linux-kbuild, Peter Zijlstra, Christopher Li, linux-kernel,
stable, Masahiro Yamada, linux-sparse, Paul Mackerras,
Nicholas Piggin, Thomas Gleixner, linuxppc-dev, Naveen N. Rao,
Daniel Axtens
In-Reply-To: <YFR/fQIePjDQcO5W@kroah.com>
On 3/19/21 11:39 AM, Greg Kroah-Hartman wrote:
> On Fri, Mar 19, 2021 at 07:54:15AM +0800, Nicolas Boichat wrote:
>> From: Thomas Gleixner <tglx@linutronix.de>
>>
>> commit 6553896666433e7efec589838b400a2a652b3ffa upstream.
>>
>> Some code pathes, especially the low level entry code, must be protected
>> against instrumentation for various reasons:
>>
>> - Low level entry code can be a fragile beast, especially on x86.
>>
>> - With NO_HZ_FULL RCU state needs to be established before using it.
>>
>> Having a dedicated section for such code allows to validate with tooling
>> that no unsafe functions are invoked.
>>
>> Add the .noinstr.text section and the noinstr attribute to mark
>> functions. noinstr implies notrace. Kprobes will gain a section check
>> later.
>>
>> Provide also a set of markers: instrumentation_begin()/end()
>>
>> These are used to mark code inside a noinstr function which calls
>> into regular instrumentable text section as safe.
>>
>> The instrumentation markers are only active when CONFIG_DEBUG_ENTRY is
>> enabled as the end marker emits a NOP to prevent the compiler from merging
>> the annotation points. This means the objtool verification requires a
>> kernel compiled with this option.
>>
>> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
>> Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
>> Acked-by: Peter Zijlstra <peterz@infradead.org>
>> Link: https://lkml.kernel.org/r/20200505134100.075416272@linutronix.de
>>
>> [Nicolas: context conflicts in:
>> arch/powerpc/kernel/vmlinux.lds.S
>> include/asm-generic/vmlinux.lds.h
>> include/linux/compiler.h
>> include/linux/compiler_types.h]
>> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
>
> Did you build this on x86?
>
> I get the following build error:
>
> ld:./arch/x86/kernel/vmlinux.lds:20: syntax error
>
> And that line looks like:
>
> . = ALIGN(8); *(.text.hot .text.hot.*) *(.text .text.fixup) *(.text.unlikely .text.unlikely.*) *(.text.unknown .text.unknown.*) . = ALIGN(8); __noinstr_text_start = .; *(.__attribute__((noinline)) __attribute__((no_instrument_function)) __attribute((__section__(".noinstr.text"))).text) __noinstr_text_end = .; *(.text..refcount) *(.ref.text) *(.meminit.text*) *(.memexit.text*)
>
In the NOINSTR_TEXT macro, noinstr is expanded with the value of the noinstr
macro from linux/compiler_types.h while it shouldn't.
The problem is possibly that the noinstr macro is defined for assembly. Make
sure that the macro is not defined for assembly e.g.:
#ifndef __ASSEMBLY__
/* Section for code which can't be instrumented at all */
#define noinstr \
noinline notrace __attribute((__section__(".noinstr.text")))
#endif
alex.
^ permalink raw reply
* Re: [PATCH] powerpc: epapr: A typo fix
From: Randy Dunlap @ 2021-03-20 22:41 UTC (permalink / raw)
To: Bhaskar Chowdhury; +Cc: paulus, linuxppc-dev, linux-kernel
In-Reply-To: <20210320213932.22697-1-unixbhaskar@gmail.com>
On Sun, 21 Mar 2021, Bhaskar Chowdhury wrote:
>
> s/parmeters/parameters/
>
> Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
> ---
> arch/powerpc/include/asm/epapr_hcalls.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/include/asm/epapr_hcalls.h b/arch/powerpc/include/asm/epapr_hcalls.h
> index c99ba08a408d..cdf3c6df5123 100644
> --- a/arch/powerpc/include/asm/epapr_hcalls.h
> +++ b/arch/powerpc/include/asm/epapr_hcalls.h
> @@ -65,7 +65,7 @@
> * but the gcc inline assembly syntax does not allow us to specify registers
> * on the clobber list that are also on the input/output list. Therefore,
> * the lists of clobbered registers depends on the number of register
> - * parmeters ("+r" and "=r") passed to the hypercall.
> + * parameters ("+r" and "=r") passed to the hypercall.
> *
> * Each assembly block should use one of the HCALL_CLOBBERSx macros. As a
> * general rule, 'x' is the number of parameters passed to the assembly
> --
> 2.26.2
>
>
^ permalink raw reply
* [GIT PULL] Please pull powerpc/linux.git powerpc-5.12-4 tag
From: Michael Ellerman @ 2021-03-21 5:15 UTC (permalink / raw)
To: Linus Torvalds; +Cc: tyreld, linuxppc-dev, linux-kernel
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256
Hi Linus,
Please pull some more powerpc fixes for 5.12:
The following changes since commit 0b736881c8f1a6cd912f7a9162b9e097b28c1c30:
powerpc/traps: unrecoverable_exception() is not an interrupt handler (2021-03-12 11:02:12 +1100)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git tags/powerpc-5.12-4
for you to fetch changes up to cc7a0bb058b85ea03db87169c60c7cfdd5d34678:
PCI: rpadlpar: Fix potential drc_name corruption in store functions (2021-03-17 13:48:07 +1100)
- ------------------------------------------------------------------
powerpc fixes for 5.12 #4
Fix a possible stack corruption and subsequent DLPAR failure in the rpadlpar_io
PCI hotplug driver.
Two build fixes for uncommon configurations.
Thanks to Christophe Leroy, Tyrel Datwyler.
- ------------------------------------------------------------------
Christophe Leroy (2):
powerpc/vdso32: Add missing _restgpr_31_x to fix build failure
powerpc: Force inlining of cpu_has_feature() to avoid build failure
Tyrel Datwyler (1):
PCI: rpadlpar: Fix potential drc_name corruption in store functions
arch/powerpc/include/asm/cpu_has_feature.h | 4 ++--
arch/powerpc/kernel/vdso32/gettimeofday.S | 11 +++++++++++
drivers/pci/hotplug/rpadlpar_sysfs.c | 14 ++++++--------
3 files changed, 19 insertions(+), 10 deletions(-)
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^ permalink raw reply
* Re: remove the legacy ide driver
From: John Paul Adrian Glaubitz @ 2021-03-21 9:20 UTC (permalink / raw)
To: Christoph Hellwig, David S. Miller, Jens Axboe,
Geert Uytterhoeven
Cc: Thomas Bogendoerfer, linux-doc, Bartlomiej Zolnierkiewicz,
Russell King, linux-kernel, linux-ide, linux-m68k,
Ivan Kokshaysky, linux-alpha, Matt Turner, linux-mips,
linuxppc-dev, linux-arm-kernel, Richard Henderson
In-Reply-To: <20210318045706.200458-1-hch@lst.de>
Hello Christoph!
On 3/18/21 5:56 AM, Christoph Hellwig wrote:
> libata mostly covers all hardware supported by the legacy ide driver.
> There are three mips drivers that are not supported, but the linux-mips
> list could not identify any users of those. There also are two m68k
> drivers that do not have libata equivalents, which might or might not
> have users, so we'll need some input and possibly help from the m68k
> community here.
I think those drivers were the Q60 driver and the MacIDE driver, weren't they?
Either way, I have so far been unsuccessful in obtaining access to these machines
but I assume once we gain access to such machines, Bartlomiej could convert the
drivers the same way he already converted the falcon, gayle and buddha drivers,
for example.
One could also just convert the drivers to libata and include them untested, the
conversion itself seems pretty little work for someone experienced with libata.
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply
* Re: [PATCH next v1 2/3] printk: remove safe buffers
From: Sergey Senozhatsky @ 2021-03-21 5:26 UTC (permalink / raw)
To: John Ogness
Cc: Rafael Aquini, Peter Zijlstra, Paul Mackerras, Tiezhu Yang,
Alexey Kardashevskiy, Yue Hu, Jordan Niethe, Petr Mladek,
Kees Cook, Paul E. McKenney, Alistair Popple,
Guilherme G. Piccoli, Nicholas Piggin, Steven Rostedt,
Thomas Gleixner, kexec, linux-kernel, Eric Biederman,
Andrew Morton, linuxppc-dev, Cédric Le Goater
In-Reply-To: <20210316233326.10778-3-john.ogness@linutronix.de>
On (21/03/17 00:33), John Ogness wrote:
[..]
> void printk_nmi_direct_enter(void)
> {
> @@ -324,27 +44,8 @@ void printk_nmi_direct_exit(void)
> this_cpu_and(printk_context, ~PRINTK_NMI_DIRECT_CONTEXT_MASK);
> }
>
> -#else
> -
> -static __printf(1, 0) int vprintk_nmi(const char *fmt, va_list args)
> -{
> - return 0;
> -}
> -
> #endif /* CONFIG_PRINTK_NMI */
>
> -/*
> - * Lock-less printk(), to avoid deadlocks should the printk() recurse
> - * into itself. It uses a per-CPU buffer to store the message, just like
> - * NMI.
> - */
> -static __printf(1, 0) int vprintk_safe(const char *fmt, va_list args)
> -{
> - struct printk_safe_seq_buf *s = this_cpu_ptr(&safe_print_seq);
> -
> - return printk_safe_log_store(s, fmt, args);
> -}
> -
> /* Can be preempted by NMI. */
> void __printk_safe_enter(void)
> {
> @@ -369,7 +70,10 @@ __printf(1, 0) int vprintk_func(const char *fmt, va_list args)
> * Use the main logbuf even in NMI. But avoid calling console
> * drivers that might have their own locks.
> */
> - if ((this_cpu_read(printk_context) & PRINTK_NMI_DIRECT_CONTEXT_MASK)) {
> + if (this_cpu_read(printk_context) &
> + (PRINTK_NMI_DIRECT_CONTEXT_MASK |
> + PRINTK_NMI_CONTEXT_MASK |
> + PRINTK_SAFE_CONTEXT_MASK)) {
Do we need printk_nmi_direct_enter/exit() and PRINTK_NMI_DIRECT_CONTEXT_MASK?
Seems like all printk_safe() paths are now DIRECT - we store messages to the
prb, but don't call console drivers.
-ss
^ permalink raw reply
* [PATCH] crypto: nx: fix incorrect kernel-doc comment syntax in files
From: Aditya Srivastava @ 2021-03-21 12:30 UTC (permalink / raw)
To: linux-kernel
Cc: nayna, herbert, corbet, rdunlap, linuxppc-dev, yashsri421,
pfsmorigo, linux-crypto, leitao, lukas.bulwahn,
linux-kernel-mentees, davem, paulus
The opening comment mark '/**' is used for highlighting the beginning of
kernel-doc comments.
There are certain files in drivers/crypto/nx, which follow this syntax,
but the content inside does not comply with kernel-doc.
Such lines were probably not meant for kernel-doc parsing, but are parsed
due to the presence of kernel-doc like comment syntax(i.e, '/**'), which
causes unexpected warnings from kernel-doc.
E.g., presence of kernel-doc like comment in the header lines for
drivers/crypto/nx/nx-sha256.c at header causes these warnings:
"warning: Function parameter or member 'tfm' not described in 'nx_crypto_ctx_sha256_init'"
"warning: expecting prototype for SHA(). Prototype was for nx_crypto_ctx_sha256_init() instead"
Similarly for other files too.
Provide a simple fix by replacing such occurrences with general comment
format, i.e. '/*', to prevent kernel-doc from parsing it.
Signed-off-by: Aditya Srivastava <yashsri421@gmail.com>
---
* Applies perfectly on next-20210319
drivers/crypto/nx/nx-aes-cbc.c | 2 +-
drivers/crypto/nx/nx-aes-ccm.c | 2 +-
drivers/crypto/nx/nx-aes-ctr.c | 2 +-
drivers/crypto/nx/nx-aes-ecb.c | 2 +-
drivers/crypto/nx/nx-aes-gcm.c | 2 +-
drivers/crypto/nx/nx-aes-xcbc.c | 2 +-
drivers/crypto/nx/nx-sha256.c | 2 +-
drivers/crypto/nx/nx-sha512.c | 2 +-
drivers/crypto/nx/nx.c | 2 +-
drivers/crypto/nx/nx_debugfs.c | 2 +-
10 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/crypto/nx/nx-aes-cbc.c b/drivers/crypto/nx/nx-aes-cbc.c
index 92e921eceed7..d6314ea9ae89 100644
--- a/drivers/crypto/nx/nx-aes-cbc.c
+++ b/drivers/crypto/nx/nx-aes-cbc.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* AES CBC routines supporting the Power 7+ Nest Accelerators driver
*
* Copyright (C) 2011-2012 International Business Machines Inc.
diff --git a/drivers/crypto/nx/nx-aes-ccm.c b/drivers/crypto/nx/nx-aes-ccm.c
index 4c9362eebefd..e7384d107573 100644
--- a/drivers/crypto/nx/nx-aes-ccm.c
+++ b/drivers/crypto/nx/nx-aes-ccm.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* AES CCM routines supporting the Power 7+ Nest Accelerators driver
*
* Copyright (C) 2012 International Business Machines Inc.
diff --git a/drivers/crypto/nx/nx-aes-ctr.c b/drivers/crypto/nx/nx-aes-ctr.c
index 6d5ce1a66f1e..13f518802343 100644
--- a/drivers/crypto/nx/nx-aes-ctr.c
+++ b/drivers/crypto/nx/nx-aes-ctr.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* AES CTR routines supporting the Power 7+ Nest Accelerators driver
*
* Copyright (C) 2011-2012 International Business Machines Inc.
diff --git a/drivers/crypto/nx/nx-aes-ecb.c b/drivers/crypto/nx/nx-aes-ecb.c
index 77e338dc33f1..7a729dc2bc17 100644
--- a/drivers/crypto/nx/nx-aes-ecb.c
+++ b/drivers/crypto/nx/nx-aes-ecb.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* AES ECB routines supporting the Power 7+ Nest Accelerators driver
*
* Copyright (C) 2011-2012 International Business Machines Inc.
diff --git a/drivers/crypto/nx/nx-aes-gcm.c b/drivers/crypto/nx/nx-aes-gcm.c
index 19c6ed5baea4..fc9baca13920 100644
--- a/drivers/crypto/nx/nx-aes-gcm.c
+++ b/drivers/crypto/nx/nx-aes-gcm.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* AES GCM routines supporting the Power 7+ Nest Accelerators driver
*
* Copyright (C) 2012 International Business Machines Inc.
diff --git a/drivers/crypto/nx/nx-aes-xcbc.c b/drivers/crypto/nx/nx-aes-xcbc.c
index 48dc1c98ca52..eb5c8f689360 100644
--- a/drivers/crypto/nx/nx-aes-xcbc.c
+++ b/drivers/crypto/nx/nx-aes-xcbc.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* AES XCBC routines supporting the Power 7+ Nest Accelerators driver
*
* Copyright (C) 2011-2012 International Business Machines Inc.
diff --git a/drivers/crypto/nx/nx-sha256.c b/drivers/crypto/nx/nx-sha256.c
index 90d9a37a57f6..b0ad665e4bda 100644
--- a/drivers/crypto/nx/nx-sha256.c
+++ b/drivers/crypto/nx/nx-sha256.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* SHA-256 routines supporting the Power 7+ Nest Accelerators driver
*
* Copyright (C) 2011-2012 International Business Machines Inc.
diff --git a/drivers/crypto/nx/nx-sha512.c b/drivers/crypto/nx/nx-sha512.c
index eb8627a0f317..c29103a1a0b6 100644
--- a/drivers/crypto/nx/nx-sha512.c
+++ b/drivers/crypto/nx/nx-sha512.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* SHA-512 routines supporting the Power 7+ Nest Accelerators driver
*
* Copyright (C) 2011-2012 International Business Machines Inc.
diff --git a/drivers/crypto/nx/nx.c b/drivers/crypto/nx/nx.c
index 1d0e8a1ba160..13bb705ba6a4 100644
--- a/drivers/crypto/nx/nx.c
+++ b/drivers/crypto/nx/nx.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* Routines supporting the Power 7+ Nest Accelerators driver
*
* Copyright (C) 2011-2012 International Business Machines Inc.
diff --git a/drivers/crypto/nx/nx_debugfs.c b/drivers/crypto/nx/nx_debugfs.c
index 1975bcbee997..ee7cd88bb10a 100644
--- a/drivers/crypto/nx/nx_debugfs.c
+++ b/drivers/crypto/nx/nx_debugfs.c
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
* debugfs routines supporting the Power 7+ Nest Accelerators driver
*
* Copyright (C) 2011-2012 International Business Machines Inc.
--
2.17.1
^ permalink raw reply related
* Re: [PATCH] crypto: nx: fix incorrect kernel-doc comment syntax in files
From: Randy Dunlap @ 2021-03-21 17:34 UTC (permalink / raw)
To: Aditya Srivastava
Cc: linuxppc-dev, herbert, corbet, nayna, linux-kernel, pfsmorigo,
linux-crypto, leitao, lukas.bulwahn, linux-kernel-mentees, davem,
paulus
In-Reply-To: <20210321123007.15505-1-yashsri421@gmail.com>
Looks good. Thanks.
Acked-by: Randy Dunlap <rdunlap@infradead.org>
^ permalink raw reply
* Re: [GIT PULL] Please pull powerpc/linux.git powerpc-5.12-4 tag
From: pr-tracker-bot @ 2021-03-21 18:45 UTC (permalink / raw)
To: Michael Ellerman; +Cc: tyreld, Linus Torvalds, linuxppc-dev, linux-kernel
In-Reply-To: <875z1lhytk.fsf@mpe.ellerman.id.au>
The pull request you sent on Sun, 21 Mar 2021 16:15:35 +1100:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git tags/powerpc-5.12-4
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/b35660a7cebdf438e01bba05075ae2bcc0125650
Thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/prtracker.html
^ permalink raw reply
* Re: [PATCH v11 1/6] kasan: allow an architecture to disable inline instrumentation
From: Daniel Axtens @ 2021-03-22 0:29 UTC (permalink / raw)
To: Balbir Singh
Cc: aneesh.kumar, linux-kernel, linux-mm, kasan-dev, linuxppc-dev
In-Reply-To: <20210320014606.GB77072@balbir-desktop>
Balbir Singh <bsingharora@gmail.com> writes:
> On Sat, Mar 20, 2021 at 01:40:53AM +1100, Daniel Axtens wrote:
>> For annoying architectural reasons, it's very difficult to support inline
>> instrumentation on powerpc64.
>
> I think we can expand here and talk about how in hash mode, the vmalloc
> address space is in a region of memory different than where kernel virtual
> addresses are mapped. Did I recollect the reason correctly?
I think that's _a_ reason, but for radix mode (which is all I support at
the moment), the reason is a bit simpler. We call into generic code like
the DT parser and printk when we have translations off. The shadow
region lives at c00e.... which is not part of the linear mapping, so if
you try to access the shadow while in real mode you will access unmapped
memory and (at least on PowerNV) take a machine check.
>>
>> Add a Kconfig flag to allow an arch to disable inline. (It's a bit
>> annoying to be 'backwards', but I'm not aware of any way to have
>> an arch force a symbol to be 'n', rather than 'y'.)
>>
>> We also disable stack instrumentation in this case as it does things that
>> are functionally equivalent to inline instrumentation, namely adding
>> code that touches the shadow directly without going through a C helper.
>>
>> Signed-off-by: Daniel Axtens <dja@axtens.net>
>> ---
>> lib/Kconfig.kasan | 8 ++++++++
>> 1 file changed, 8 insertions(+)
>>
>> diff --git a/lib/Kconfig.kasan b/lib/Kconfig.kasan
>> index cffc2ebbf185..7e237dbb6df3 100644
>> --- a/lib/Kconfig.kasan
>> +++ b/lib/Kconfig.kasan
>> @@ -12,6 +12,9 @@ config HAVE_ARCH_KASAN_HW_TAGS
>> config HAVE_ARCH_KASAN_VMALLOC
>> bool
>>
>> +config ARCH_DISABLE_KASAN_INLINE
>> + def_bool n
>> +
>
> Some comments on what arch's want to disable kasan inline would
> be helpful and why.
Sure, added.
Kind regards,
Daniel
^ permalink raw reply
* Re: [PATCH v11 6/6] powerpc: Book3S 64-bit outline-only KASAN support
From: Daniel Axtens @ 2021-03-22 0:55 UTC (permalink / raw)
To: Balbir Singh
Cc: aneesh.kumar, linux-kernel, linux-mm, kasan-dev, linuxppc-dev
In-Reply-To: <20210320060259.GF77072@balbir-desktop>
Hi Balbir,
> Could you highlight the changes from
> https://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170729140901.5887-1-bsingharora@gmail.com/?
>
> Feel free to use my signed-off-by if you need to and add/update copyright
> headers if appropriate.
There's not really anything in common any more:
- ppc32 KASAN landed, so there was already a kasan.h for powerpc, the
explicit memcpy changes, the support for non-instrumented files,
prom_check.sh, etc. all already landed.
- I locate the shadow region differently and don't resize any virtual
memory areas.
- The ARCH_DEFINES_KASAN_ZERO_PTE handling changed upstream and our
handling for that is now handled more by patch 3.
- The outline hook is now an inline function rather than a #define.
- The init function has been totally rewritten as it's gone from
supporting real mode to not supporting real mode and back.
- The list of non-instrumented files has grown a lot.
- There's new stuff: stack walking is now safe, KASAN vmalloc support
means modules are better supported now, ptdump works, and there's
documentation.
It's been a while now, but I don't think when I started this process 2
years ago that I directly reused much of your code. So I'm not sure that
a signed-off-by makes sense here? Would a different tag (Originally-by?)
make more sense?
>> + * The shadow ends before the highest accessible address
>> + * because we don't need a shadow for the shadow. Instead:
>> + * c00e000000000000 << 3 + a80e 0000 0000 0000 000 = c00fc00000000000
>
> The comment has one extra 0 in a80e.., I did the math and had to use
> the data from the defines :)
3 extra 0s, even! Fixed.
>> +void __init kasan_init(void)
>> +{
>> + /*
>> + * We want to do the following things:
>> + * 1) Map real memory into the shadow for all physical memblocks
>> + * This takes us from c000... to c008...
>> + * 2) Leave a hole over the shadow of vmalloc space. KASAN_VMALLOC
>> + * will manage this for us.
>> + * This takes us from c008... to c00a...
>> + * 3) Map the 'early shadow'/zero page over iomap and vmemmap space.
>> + * This takes us up to where we start at c00e...
>> + */
>> +
>
> assuming we have
> #define VMEMMAP_END R_VMEMMAP_END
> and ditto for hash we probably need
>
> BUILD_BUG_ON(VMEMMAP_END + KASAN_SHADOW_OFFSET != KASAN_SHADOW_END);
Sorry, I'm not sure what this is supposed to be testing? In what
situation would this trigger?
Kind regards,
Daniel
>
> Looks good otherwise, I've not been able to test it yet
>
> Balbir Singh.
^ permalink raw reply
* Re: [PATCH v3 15/41] KVM: PPC: Book3S 64: Minimise hcall handler calling convention differences
From: Alexey Kardashevskiy @ 2021-03-22 2:09 UTC (permalink / raw)
To: Nicholas Piggin, kvm-ppc; +Cc: linuxppc-dev
In-Reply-To: <20210305150638.2675513-16-npiggin@gmail.com>
On 06/03/2021 02:06, Nicholas Piggin wrote:
> This sets up the same calling convention from interrupt entry to
> KVM interrupt handler for system calls as exists for other interrupt
> types.
>
> This is a better API, it uses a save area rather than SPR, and it has
> more registers free to use. Using a single common API helps maintain
> it, and it becomes easier to use in C in a later patch.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> ---
> arch/powerpc/kernel/exceptions-64s.S | 16 +++++++++++++++-
> arch/powerpc/kvm/book3s_64_entry.S | 22 +++-------------------
> 2 files changed, 18 insertions(+), 20 deletions(-)
>
> diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
> index b4eab5084964..ce6f5f863d3d 100644
> --- a/arch/powerpc/kernel/exceptions-64s.S
> +++ b/arch/powerpc/kernel/exceptions-64s.S
> @@ -1892,8 +1892,22 @@ EXC_VIRT_END(system_call, 0x4c00, 0x100)
>
> #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
> TRAMP_REAL_BEGIN(kvm_hcall)
> + std r9,PACA_EXGEN+EX_R9(r13)
> + std r11,PACA_EXGEN+EX_R11(r13)
> + std r12,PACA_EXGEN+EX_R12(r13)
> + mfcr r9
> mfctr r10
> - SET_SCRATCH0(r10) /* Save r13 in SCRATCH0 */
> + std r10,PACA_EXGEN+EX_R13(r13)
> + li r10,0
> + std r10,PACA_EXGEN+EX_CFAR(r13)
> + std r10,PACA_EXGEN+EX_CTR(r13)
> +BEGIN_FTR_SECTION
> + mfspr r10,SPRN_PPR
> + std r10,PACA_EXGEN+EX_PPR(r13)
> +END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
> +
> + HMT_MEDIUM
> +
> #ifdef CONFIG_RELOCATABLE
> /*
> * Requires __LOAD_FAR_HANDLER beause kvmppc_hcall lives
> diff --git a/arch/powerpc/kvm/book3s_64_entry.S b/arch/powerpc/kvm/book3s_64_entry.S
> index 7a6b060ceed8..129d3f81800e 100644
> --- a/arch/powerpc/kvm/book3s_64_entry.S
> +++ b/arch/powerpc/kvm/book3s_64_entry.S
> @@ -14,24 +14,9 @@
> .global kvmppc_hcall
> .balign IFETCH_ALIGN_BYTES
> kvmppc_hcall:
> - /*
> - * This is a hcall, so register convention is as
> - * Documentation/powerpc/papr_hcalls.rst, with these additions:
> - * R13 = PACA
> - * guest R13 saved in SPRN_SCRATCH0
> - * R10 = free
> - */
> -BEGIN_FTR_SECTION
> - mfspr r10,SPRN_PPR
> - std r10,HSTATE_PPR(r13)
> -END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
> - HMT_MEDIUM
> - mfcr r10
> - std r12,HSTATE_SCRATCH0(r13)
> - sldi r12,r10,32
> - ori r12,r12,0xc00
> - ld r10,PACA_EXGEN+EX_R10(r13)
> - b do_kvm_interrupt
> + ld r10,PACA_EXGEN+EX_R13(r13)
> + SET_SCRATCH0(r10)
> + li r10,0xc00
>
> .global kvmppc_interrupt
> .balign IFETCH_ALIGN_BYTES
> @@ -62,7 +47,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
> ld r10,EX_R10(r11)
> ld r11,EX_R11(r11)
>
> -do_kvm_interrupt:
> /*
> * Hcalls and other interrupts come here after normalising register
> * contents and save locations:
>
--
Alexey
^ permalink raw reply
* [PATCH] cxl: Fix couple of spellings
From: Bhaskar Chowdhury @ 2021-03-22 2:33 UTC (permalink / raw)
To: fbarrat, ajd, arnd, gregkh, linuxppc-dev, linux-kernel
Cc: rdunlap, Bhaskar Chowdhury
s/filesytem/filesystem/
s/symantics/semantics/
Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
---
drivers/misc/cxl/context.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/cxl/context.c b/drivers/misc/cxl/context.c
index fb2eff69e449..e627b4056623 100644
--- a/drivers/misc/cxl/context.c
+++ b/drivers/misc/cxl/context.c
@@ -52,7 +52,7 @@ int cxl_context_init(struct cxl_context *ctx, struct cxl_afu *afu, bool master)
* can always access it when dereferenced from IDR. For the same
* reason, the segment table is only destroyed after the context is
* removed from the IDR. Access to this in the IOCTL is protected by
- * Linux filesytem symantics (can't IOCTL until open is complete).
+ * Linux filesystem semantics (can't IOCTL until open is complete).
*/
i = cxl_alloc_sst(ctx);
if (i)
--
2.31.0
^ permalink raw reply related
* Re: [PATCH 5/6] powerpc/mm/64s/hash: Add real-mode change_memory_range() for hash LPAR
From: Nicholas Piggin @ 2021-03-22 2:56 UTC (permalink / raw)
To: linuxppc-dev, Michael Ellerman; +Cc: aneesh.kumar
In-Reply-To: <878s6iht88.fsf@mpe.ellerman.id.au>
Excerpts from Michael Ellerman's message of March 20, 2021 11:04 pm:
> Nicholas Piggin <npiggin@gmail.com> writes:
>> Excerpts from Michael Ellerman's message of February 11, 2021 11:51 pm:
> ...
>>> diff --git a/arch/powerpc/mm/book3s64/hash_pgtable.c b/arch/powerpc/mm/book3s64/hash_pgtable.c
>>> index 3663d3cdffac..01de985df2c4 100644
>>> --- a/arch/powerpc/mm/book3s64/hash_pgtable.c
>>> +++ b/arch/powerpc/mm/book3s64/hash_pgtable.c
>>> @@ -414,6 +428,73 @@ static void change_memory_range(unsigned long start, unsigned long end,
>>> mmu_kernel_ssize);
>>> }
>>>
>>> +static int notrace chmem_secondary_loop(struct change_memory_parms *parms)
>>> +{
>>> + unsigned long msr, tmp, flags;
>>> + int *p;
>>> +
>>> + p = &parms->cpu_counter.counter;
>>> +
>>> + local_irq_save(flags);
>>> + __hard_EE_RI_disable();
>>> +
>>> + asm volatile (
>>> + // Switch to real mode and leave interrupts off
>>> + "mfmsr %[msr] ;"
>>> + "li %[tmp], %[MSR_IR_DR] ;"
>>> + "andc %[tmp], %[msr], %[tmp] ;"
>>> + "mtmsrd %[tmp] ;"
>>> +
>>> + // Tell the master we are in real mode
>>> + "1: "
>>> + "lwarx %[tmp], 0, %[p] ;"
>>> + "addic %[tmp], %[tmp], -1 ;"
>>> + "stwcx. %[tmp], 0, %[p] ;"
>>> + "bne- 1b ;"
>>> +
>>> + // Spin until the counter goes to zero
>>> + "2: ;"
>>> + "lwz %[tmp], 0(%[p]) ;"
>>> + "cmpwi %[tmp], 0 ;"
>>> + "bne- 2b ;"
>>> +
>>> + // Switch back to virtual mode
>>> + "mtmsrd %[msr] ;"
>>> +
>>> + : // outputs
>>> + [msr] "=&r" (msr), [tmp] "=&b" (tmp), "+m" (*p)
>>> + : // inputs
>>> + [p] "b" (p), [MSR_IR_DR] "i" (MSR_IR | MSR_DR)
>>> + : // clobbers
>>> + "cc", "xer"
>>> + );
>>> +
>>> + local_irq_restore(flags);
>>
>> Hmm. __hard_EE_RI_disable won't get restored by this because it doesn't
>> set the HARD_DIS flag. Also we don't want RI disabled here because
>> tracing will get called first (which might take SLB or HPTE fault).
>
> Thanks for noticing. I originally wrote hard_irq_disable() but then
> thought disabling RI also would be good.
>
>> But it's also slightly rude to ever enable EE under an irq soft mask,
>> because you don't know if it had been disabled by the masked interrupt
>> handler. It's not strictly a problem AFAIK because the interrupt would
>> just get masked again, but if we try to maintain a good pattern would
>> be good. Hmm that means we should add a check for irqs soft masked in
>> __hard_irq_enable(), I'm not sure if all existing users would follow
>> this rule.
>>
>> Might be better to call hard_irq_disable(); after the local_irq_save();
>> and then clear and reset RI inside that region (could just do it at the
>> same time as disabling MMU).
>
> Thinking about it more, there's no real reason to disable RI.
>
> We should be able to return from an interrupt in there, it's just that
> if we do take one we'll probably die before we get a chance to return
> because the mapping of text will be missing.
Yeah it probably will because the pseries hash machine check handler has
some hacks in it that require turning the MMU on. We might never fix
that if we're moving to radix, but if we did then in theory we'd be able
to take a MCE here and recover.
> So disabling RI doesn't really gain us anything I don't think.
Yeah I probably agree. So local_irq_save(flags); hard_irq_disable();
should do the trick.
Thanks,
Nick
^ permalink raw reply
* Re: [PATCH v11 6/6] powerpc: Book3S 64-bit outline-only KASAN support
From: Balbir Singh @ 2021-03-22 2:59 UTC (permalink / raw)
To: Daniel Axtens
Cc: aneesh.kumar, linux-kernel, linux-mm, kasan-dev, linuxppc-dev
In-Reply-To: <87o8fcatxv.fsf@dja-thinkpad.axtens.net>
On Mon, Mar 22, 2021 at 11:55:08AM +1100, Daniel Axtens wrote:
> Hi Balbir,
>
> > Could you highlight the changes from
> > https://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170729140901.5887-1-bsingharora@gmail.com/?
> >
> > Feel free to use my signed-off-by if you need to and add/update copyright
> > headers if appropriate.
>
> There's not really anything in common any more:
>
> - ppc32 KASAN landed, so there was already a kasan.h for powerpc, the
> explicit memcpy changes, the support for non-instrumented files,
> prom_check.sh, etc. all already landed.
>
> - I locate the shadow region differently and don't resize any virtual
> memory areas.
>
> - The ARCH_DEFINES_KASAN_ZERO_PTE handling changed upstream and our
> handling for that is now handled more by patch 3.
>
> - The outline hook is now an inline function rather than a #define.
>
> - The init function has been totally rewritten as it's gone from
> supporting real mode to not supporting real mode and back.
>
> - The list of non-instrumented files has grown a lot.
>
> - There's new stuff: stack walking is now safe, KASAN vmalloc support
> means modules are better supported now, ptdump works, and there's
> documentation.
>
> It's been a while now, but I don't think when I started this process 2
> years ago that I directly reused much of your code. So I'm not sure that
> a signed-off-by makes sense here? Would a different tag (Originally-by?)
> make more sense?
>
Sure
> >> + * The shadow ends before the highest accessible address
> >> + * because we don't need a shadow for the shadow. Instead:
> >> + * c00e000000000000 << 3 + a80e 0000 0000 0000 000 = c00fc00000000000
> >
> > The comment has one extra 0 in a80e.., I did the math and had to use
> > the data from the defines :)
>
> 3 extra 0s, even! Fixed.
>
> >> +void __init kasan_init(void)
> >> +{
> >> + /*
> >> + * We want to do the following things:
> >> + * 1) Map real memory into the shadow for all physical memblocks
> >> + * This takes us from c000... to c008...
> >> + * 2) Leave a hole over the shadow of vmalloc space. KASAN_VMALLOC
> >> + * will manage this for us.
> >> + * This takes us from c008... to c00a...
> >> + * 3) Map the 'early shadow'/zero page over iomap and vmemmap space.
> >> + * This takes us up to where we start at c00e...
> >> + */
> >> +
> >
> > assuming we have
> > #define VMEMMAP_END R_VMEMMAP_END
> > and ditto for hash we probably need
> >
> > BUILD_BUG_ON(VMEMMAP_END + KASAN_SHADOW_OFFSET != KASAN_SHADOW_END);
>
> Sorry, I'm not sure what this is supposed to be testing? In what
> situation would this trigger?
>
I am bit concerned that we have hard coded (IIR) 0xa80e... in the
config, any changes to VMEMMAP_END, KASAN_SHADOW_OFFSET/END
should be guarded.
Balbir Singh.
^ permalink raw reply
* Re: [PATCH] cxl: Fix couple of spellings
From: Randy Dunlap @ 2021-03-22 3:02 UTC (permalink / raw)
To: Bhaskar Chowdhury, fbarrat, ajd, arnd, gregkh, linuxppc-dev,
linux-kernel
In-Reply-To: <20210322023307.168754-1-unixbhaskar@gmail.com>
On 3/21/21 7:33 PM, Bhaskar Chowdhury wrote:
>
> s/filesytem/filesystem/
> s/symantics/semantics/
>
> Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
> ---
> drivers/misc/cxl/context.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/misc/cxl/context.c b/drivers/misc/cxl/context.c
> index fb2eff69e449..e627b4056623 100644
> --- a/drivers/misc/cxl/context.c
> +++ b/drivers/misc/cxl/context.c
> @@ -52,7 +52,7 @@ int cxl_context_init(struct cxl_context *ctx, struct cxl_afu *afu, bool master)
> * can always access it when dereferenced from IDR. For the same
> * reason, the segment table is only destroyed after the context is
> * removed from the IDR. Access to this in the IOCTL is protected by
> - * Linux filesytem symantics (can't IOCTL until open is complete).
> + * Linux filesystem semantics (can't IOCTL until open is complete).
> */
> i = cxl_alloc_sst(ctx);
> if (i)
> --
--
~Randy
^ permalink raw reply
* Re: [PATCH 5/6] powerpc/mm/64s/hash: Add real-mode change_memory_range() for hash LPAR
From: Nicholas Piggin @ 2021-03-22 3:09 UTC (permalink / raw)
To: linuxppc-dev, Michael Ellerman; +Cc: aneesh.kumar
In-Reply-To: <87czvz4n47.fsf@mpe.ellerman.id.au>
Excerpts from Michael Ellerman's message of March 16, 2021 4:40 pm:
> Nicholas Piggin <npiggin@gmail.com> writes:
>> Excerpts from Michael Ellerman's message of February 11, 2021 11:51 pm:
>>> When we enabled STRICT_KERNEL_RWX we received some reports of boot
>>> failures when using the Hash MMU and running under phyp. The crashes
>>> are intermittent, and often exhibit as a completely unresponsive
>>> system, or possibly an oops.
> ...
>>>
>>> diff --git a/arch/powerpc/mm/book3s64/hash_pgtable.c b/arch/powerpc/mm/book3s64/hash_pgtable.c
>>> index 3663d3cdffac..01de985df2c4 100644
>>> --- a/arch/powerpc/mm/book3s64/hash_pgtable.c
>>> +++ b/arch/powerpc/mm/book3s64/hash_pgtable.c
>>> @@ -414,6 +428,73 @@ static void change_memory_range(unsigned long start, unsigned long end,
>>> mmu_kernel_ssize);
>>> }
>>>
>>> +static int notrace chmem_secondary_loop(struct change_memory_parms *parms)
>>> +{
>>> + unsigned long msr, tmp, flags;
>>> + int *p;
>>> +
>>> + p = &parms->cpu_counter.counter;
>>> +
>>> + local_irq_save(flags);
>>> + __hard_EE_RI_disable();
>>> +
>>> + asm volatile (
>>> + // Switch to real mode and leave interrupts off
>>> + "mfmsr %[msr] ;"
>>> + "li %[tmp], %[MSR_IR_DR] ;"
>>> + "andc %[tmp], %[msr], %[tmp] ;"
>>> + "mtmsrd %[tmp] ;"
>>> +
>>> + // Tell the master we are in real mode
>>> + "1: "
>>> + "lwarx %[tmp], 0, %[p] ;"
>>> + "addic %[tmp], %[tmp], -1 ;"
>>> + "stwcx. %[tmp], 0, %[p] ;"
>>> + "bne- 1b ;"
>>> +
>>> + // Spin until the counter goes to zero
>>> + "2: ;"
>>> + "lwz %[tmp], 0(%[p]) ;"
>>> + "cmpwi %[tmp], 0 ;"
>>> + "bne- 2b ;"
>>> +
>>> + // Switch back to virtual mode
>>> + "mtmsrd %[msr] ;"
>>
>> Pity we don't have something that can switch to emergency stack and
>> so we can write this stuff in C.
>>
>> How's something like this suit you?
>
> It looks like it would be really good for writing exploits :)
Hmm. In that case maybe the callee function could be inlined into it
like the interrupt wrappers, and the asm real-mode entry/exit gets
added around it rather than have this little exploit stub. So similar to
yours but with a stack switch as well so you can come back up in real
mode.
> I think at the very least we would want the asm part to load the SP
> from the paca itself, rather than taking it as a parameter.
>
> But I'm not sure writing these type of things in C is a big win, because
> you have to be so careful about what you call anyway. It's almost better
> in asm because it's so restrictive.
>
> Obviously having said that, my first attempt got the IRQ save/restore
> wrong, so maybe we should at least have some macros to help with it.
>
> Did you have another user for this in mind? The only one that I can
> think of at the moment is the subcore stuff.
Possibly rtas entry/exit (although that has other issues). But I guess
it's not a huge amount of asm compared with what I'm dealing with.
I'm okay if you just put your thing in at the moment, we might or might
not get keen and c-ify it later.
Thanks,
Nick
^ permalink raw reply
* Re: [PATCH v3 14/41] KVM: PPC: Book3S 64: move bad_host_intr check to HV handler
From: Nicholas Piggin @ 2021-03-22 3:18 UTC (permalink / raw)
To: Alexey Kardashevskiy, kvm-ppc; +Cc: linuxppc-dev
In-Reply-To: <1f68b37c-7167-30d7-ee19-f6ebc69bd4a6@ozlabs.ru>
Excerpts from Alexey Kardashevskiy's message of March 20, 2021 7:07 pm:
>
>
> On 06/03/2021 02:06, Nicholas Piggin wrote:
>> This is not used by PR KVM.
>>
>> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
>
>
> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
>
> a small tote - it probably makes sense to move this before 09/41 as this
> one removes what 09/41 added to book3s_64_entry.S. Thanks,
Thanks.
I do realise there's a bit of shuffling around in this part of the
series, I'm trying to see if that can be improved a bit. But 9/41
is just moving the code without change which I prefer to do first.
This one changes the calling convention for PR which I think is
better to do after we have the entry point in a common file.
Thanks,
Nick
>
>
>> ---
>> arch/powerpc/kvm/book3s_64_entry.S | 3 ---
>> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 +++-
>> arch/powerpc/kvm/book3s_segment.S | 7 +++++++
>> 3 files changed, 10 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/powerpc/kvm/book3s_64_entry.S b/arch/powerpc/kvm/book3s_64_entry.S
>> index d06e81842368..7a6b060ceed8 100644
>> --- a/arch/powerpc/kvm/book3s_64_entry.S
>> +++ b/arch/powerpc/kvm/book3s_64_entry.S
>> @@ -78,11 +78,8 @@ do_kvm_interrupt:
>> beq- .Lmaybe_skip
>> .Lno_skip:
>> #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
>> - cmpwi r9,KVM_GUEST_MODE_HOST_HV
>> - beq kvmppc_bad_host_intr
>> #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
>> cmpwi r9,KVM_GUEST_MODE_GUEST
>> - ld r9,HSTATE_SCRATCH2(r13)
>> beq kvmppc_interrupt_pr
>> #endif
>> b kvmppc_interrupt_hv
>> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
>> index f976efb7e4a9..75405ef53238 100644
>> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
>> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
>> @@ -1265,6 +1265,7 @@ hdec_soon:
>> kvmppc_interrupt_hv:
>> /*
>> * Register contents:
>> + * R9 = HSTATE_IN_GUEST
>> * R12 = (guest CR << 32) | interrupt vector
>> * R13 = PACA
>> * guest R12 saved in shadow VCPU SCRATCH0
>> @@ -1272,6 +1273,8 @@ kvmppc_interrupt_hv:
>> * guest R9 saved in HSTATE_SCRATCH2
>> */
>> /* We're now back in the host but in guest MMU context */
>> + cmpwi r9,KVM_GUEST_MODE_HOST_HV
>> + beq kvmppc_bad_host_intr
>> li r9, KVM_GUEST_MODE_HOST_HV
>> stb r9, HSTATE_IN_GUEST(r13)
>>
>> @@ -3272,7 +3275,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_P9_TM_HV_ASSIST)
>> * cfar is saved in HSTATE_CFAR(r13)
>> * ppr is saved in HSTATE_PPR(r13)
>> */
>> -.global kvmppc_bad_host_intr
>> kvmppc_bad_host_intr:
>> /*
>> * Switch to the emergency stack, but start half-way down in
>> diff --git a/arch/powerpc/kvm/book3s_segment.S b/arch/powerpc/kvm/book3s_segment.S
>> index 1f492aa4c8d6..ef1d88b869bf 100644
>> --- a/arch/powerpc/kvm/book3s_segment.S
>> +++ b/arch/powerpc/kvm/book3s_segment.S
>> @@ -167,8 +167,15 @@ kvmppc_interrupt_pr:
>> * R12 = (guest CR << 32) | exit handler id
>> * R13 = PACA
>> * HSTATE.SCRATCH0 = guest R12
>> + *
>> + * If HV is possible, additionally:
>> + * R9 = HSTATE_IN_GUEST
>> + * HSTATE.SCRATCH2 = guest R9
>> */
>> #ifdef CONFIG_PPC64
>> +#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
>> + ld r9,HSTATE_SCRATCH2(r13)
>> +#endif
>> /* Match 32-bit entry */
>> rotldi r12, r12, 32 /* Flip R12 halves for stw */
>> stw r12, HSTATE_SCRATCH1(r13) /* CR is now in the low half */
>>
>
> --
> Alexey
>
^ permalink raw reply
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