* Re: [PATCH linux-next] selftests/powerpc: remove duplicate include
From: Christophe Leroy @ 2021-08-24 16:35 UTC (permalink / raw)
To: Shuah Khan, CGEL, Michael Ellerman
Cc: Shuah Khan, Zeal Robot, linux-kernel, Changcheng Deng,
Paul Mackerras, linux-kselftest, linuxppc-dev
In-Reply-To: <9096738b-7e57-418d-6253-16a107789dac@linuxfoundation.org>
Le 24/08/2021 à 16:41, Shuah Khan a écrit :
> On 8/23/21 9:05 PM, CGEL wrote:
>> From: Changcheng Deng <deng.changcheng@zte.com.cn>
>>
>> Clean up the following includecheck warning:
>>
>> ./tools/testing/selftests/powerpc/tm/tm-poison.c: inttypes.h is included
>> more than once.
>>
>> No functional change.
>>
>> Reported-by: Zeal Robot <zealci@zte.com.cn>
>> Signed-off-by: Changcheng Deng <deng.changcheng@zte.com.cn>
>> ---
>> tools/testing/selftests/powerpc/tm/tm-poison.c | 1 -
>> 1 file changed, 1 deletion(-)
>>
>> diff --git a/tools/testing/selftests/powerpc/tm/tm-poison.c
>> b/tools/testing/selftests/powerpc/tm/tm-poison.c
>> index 29e5f26..27c083a 100644
>> --- a/tools/testing/selftests/powerpc/tm/tm-poison.c
>> +++ b/tools/testing/selftests/powerpc/tm/tm-poison.c
>> @@ -20,7 +20,6 @@
>> #include <sched.h>
>> #include <sys/types.h>
>> #include <signal.h>
>> -#include <inttypes.h>
>> #include "tm.h"
>>
>
> We can't accept this patch. The from and Signed-off-by don't match.
As far as I can see they match:
From: Changcheng Deng <deng.changcheng@zte.com.cn>
Signed-off-by: Changcheng Deng <deng.changcheng@zte.com.cn>
Christophe
^ permalink raw reply
* Re: [PATCH linux-next] powerpc/tm: remove duplicate include in tm-poison.c
From: Christophe Leroy @ 2021-08-24 16:34 UTC (permalink / raw)
To: Shuah Khan, cgel.zte, mpe
Cc: yong.yiran, shuah, Zeal Robot, linux-kernel, paulus,
linux-kselftest, linuxppc-dev
In-Reply-To: <c5e9900b-1c2d-8e72-ad83-a6024b876fd2@linuxfoundation.org>
Le 24/08/2021 à 16:40, Shuah Khan a écrit :
> On 8/5/21 12:52 AM, cgel.zte@gmail.com wrote:
>> From: yong yiran <yong.yiran@zte.com.cn>
>>
>> 'inttypes.h' included in 'tm-poison.c' is duplicated.
>> Remove all but the first include of inttypes.h from tm-poison.c.
>>
>> Reported-by: Zeal Robot <zealci@zte.com.cn>
>> Signed-off-by: yong yiran <yong.yiran@zte.com.cn>
>> ---
>> tools/testing/selftests/powerpc/tm/tm-poison.c | 1 -
>> 1 file changed, 1 deletion(-)
>>
>> diff --git a/tools/testing/selftests/powerpc/tm/tm-poison.c
>> b/tools/testing/selftests/powerpc/tm/tm-poison.c
>> index 29e5f26af7b9..27c083a03d1f 100644
>> --- a/tools/testing/selftests/powerpc/tm/tm-poison.c
>> +++ b/tools/testing/selftests/powerpc/tm/tm-poison.c
>> @@ -20,7 +20,6 @@
>> #include <sched.h>
>> #include <sys/types.h>
>> #include <signal.h>
>> -#include <inttypes.h>
>> #include "tm.h"
>>
>
> We can't accept this patch. The from and Signed-off-by don't match.
>
As far as I can see they match. You have:
From: yong yiran <yong.yiran@zte.com.cn>
Signed-off-by: yong yiran <yong.yiran@zte.com.cn>
^ permalink raw reply
* Re: [PATCH] powerpc/32: Don't use lmw/stmw for saving/restoring non volatile regs
From: Segher Boessenkool @ 2021-08-24 15:28 UTC (permalink / raw)
To: Christophe Leroy; +Cc: linuxppc-dev, Paul Mackerras, linux-kernel
In-Reply-To: <20210824131600.GF1583@gate.crashing.org>
On Tue, Aug 24, 2021 at 08:16:00AM -0500, Segher Boessenkool wrote:
> On Tue, Aug 24, 2021 at 07:54:22AM +0200, Christophe Leroy wrote:
> > >On mpccore both lmw and stmw are only N+1 btw. But the serialization
> > >might cost another cycle here?
> >
> > That coherent on MPC8xx, that's only 2 cycles.
> > But on the mpc832x which has a e300c2 core, it looks like I have 10 cycles
> > difference. Is anything wrong ?
>
> I don't know that core very well, I'll have a look.
So, I don't see any difference between e300c2 and e300c1 (which is 603
basically, for this) that is significant here. The e300c2 has two
integer units instead of just one, but it still has only one load/store
unit, and I don't see anything else that could matter either. Huh.
Segher
^ permalink raw reply
* Re: [PATCH v2 RESEND] powerpc/audit: Convert powerpc to AUDIT_ARCH_COMPAT_GENERIC
From: Paul Moore @ 2021-08-24 14:47 UTC (permalink / raw)
To: Christophe Leroy
Cc: linux-kernel, Eric Paris, linux-audit, Paul Mackerras,
linuxppc-dev
In-Reply-To: <a4b3951d1191d4183d92a07a6097566bde60d00a.1629812058.git.christophe.leroy@csgroup.eu>
On Tue, Aug 24, 2021 at 9:36 AM Christophe Leroy
<christophe.leroy@csgroup.eu> wrote:
>
> Commit e65e1fc2d24b ("[PATCH] syscall class hookup for all normal
> targets") added generic support for AUDIT but that didn't include
> support for bi-arch like powerpc.
>
> Commit 4b58841149dc ("audit: Add generic compat syscall support")
> added generic support for bi-arch.
>
> Convert powerpc to that bi-arch generic audit support.
>
> Cc: Paul Moore <paul@paul-moore.com>
> Cc: Eric Paris <eparis@redhat.com>
> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
> ---
> Resending v2 with Audit people in Cc
>
> v2:
> - Missing 'git add' for arch/powerpc/include/asm/unistd32.h
> - Finalised commit description
> ---
> arch/powerpc/Kconfig | 5 +-
> arch/powerpc/include/asm/unistd32.h | 7 +++
> arch/powerpc/kernel/Makefile | 3 --
> arch/powerpc/kernel/audit.c | 84 -----------------------------
> arch/powerpc/kernel/compat_audit.c | 44 ---------------
> 5 files changed, 8 insertions(+), 135 deletions(-)
> create mode 100644 arch/powerpc/include/asm/unistd32.h
> delete mode 100644 arch/powerpc/kernel/audit.c
> delete mode 100644 arch/powerpc/kernel/compat_audit.c
Can you explain, in detail please, the testing you have done to verify
this patch?
--
paul moore
www.paul-moore.com
^ permalink raw reply
* Re: [PATCH linux-next] selftests/powerpc: remove duplicate include
From: Shuah Khan @ 2021-08-24 14:41 UTC (permalink / raw)
To: CGEL, Michael Ellerman
Cc: Zeal Robot, linuxppc-dev, linux-kernel, Paul Mackerras,
linux-kselftest, Shuah Khan, Changcheng Deng, Shuah Khan
In-Reply-To: <20210824030550.57467-1-deng.changcheng@zte.com.cn>
On 8/23/21 9:05 PM, CGEL wrote:
> From: Changcheng Deng <deng.changcheng@zte.com.cn>
>
> Clean up the following includecheck warning:
>
> ./tools/testing/selftests/powerpc/tm/tm-poison.c: inttypes.h is included
> more than once.
>
> No functional change.
>
> Reported-by: Zeal Robot <zealci@zte.com.cn>
> Signed-off-by: Changcheng Deng <deng.changcheng@zte.com.cn>
> ---
> tools/testing/selftests/powerpc/tm/tm-poison.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/tools/testing/selftests/powerpc/tm/tm-poison.c b/tools/testing/selftests/powerpc/tm/tm-poison.c
> index 29e5f26..27c083a 100644
> --- a/tools/testing/selftests/powerpc/tm/tm-poison.c
> +++ b/tools/testing/selftests/powerpc/tm/tm-poison.c
> @@ -20,7 +20,6 @@
> #include <sched.h>
> #include <sys/types.h>
> #include <signal.h>
> -#include <inttypes.h>
>
> #include "tm.h"
>
>
We can't accept this patch. The from and Signed-off-by don't match.
thanks,
-- Shuah
^ permalink raw reply
* Re: [PATCH linux-next] powerpc/tm: remove duplicate include in tm-poison.c
From: Shuah Khan @ 2021-08-24 14:40 UTC (permalink / raw)
To: cgel.zte, mpe
Cc: yong.yiran, Zeal Robot, linuxppc-dev, linux-kernel, paulus,
linux-kselftest, shuah
In-Reply-To: <20210805065255.628170-1-yong.yiran@zte.com.cn>
On 8/5/21 12:52 AM, cgel.zte@gmail.com wrote:
> From: yong yiran <yong.yiran@zte.com.cn>
>
> 'inttypes.h' included in 'tm-poison.c' is duplicated.
> Remove all but the first include of inttypes.h from tm-poison.c.
>
> Reported-by: Zeal Robot <zealci@zte.com.cn>
> Signed-off-by: yong yiran <yong.yiran@zte.com.cn>
> ---
> tools/testing/selftests/powerpc/tm/tm-poison.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/tools/testing/selftests/powerpc/tm/tm-poison.c b/tools/testing/selftests/powerpc/tm/tm-poison.c
> index 29e5f26af7b9..27c083a03d1f 100644
> --- a/tools/testing/selftests/powerpc/tm/tm-poison.c
> +++ b/tools/testing/selftests/powerpc/tm/tm-poison.c
> @@ -20,7 +20,6 @@
> #include <sched.h>
> #include <sys/types.h>
> #include <signal.h>
> -#include <inttypes.h>
>
> #include "tm.h"
>
>
We can't accept this patch. The from and Signed-off-by don't match.
thanks,
-- Shuah
^ permalink raw reply
* Re: [PATCH v15 10/12] swiotlb: Add restricted DMA pool initialization
From: Guenter Roeck @ 2021-08-24 14:26 UTC (permalink / raw)
To: Claire Chang
Cc: heikki.krogerus, thomas.hellstrom, peterz, joonas.lahtinen,
dri-devel, chris, grant.likely, paulus, Frank Rowand, mingo,
Marek Szyprowski, sstabellini, Saravana Kannan, Joerg Roedel,
Rafael J . Wysocki, Christoph Hellwig, Bartosz Golaszewski,
bskeggs, linux-pci, xen-devel, Thierry Reding, intel-gfx,
matthew.auld, linux-devicetree, jxgao, daniel, Will Deacon,
Konrad Rzeszutek Wilk, maarten.lankhorst, airlied, Dan Williams,
linuxppc-dev, jani.nikula, Rob Herring, rodrigo.vivi, bhelgaas,
boris.ostrovsky, Andy Shevchenko, jgross, Nicolas Boichat,
Greg KH, Randy Dunlap, quic_qiancai, lkml, tfiga,
list@263.net:IOMMU DRIVERS, Jim Quinlan, xypron.glpk,
thomas.lendacky, Robin Murphy, bauerman
In-Reply-To: <20210624155526.2775863-11-tientzu@chromium.org>
Hi Claire,
On Thu, Jun 24, 2021 at 11:55:24PM +0800, Claire Chang wrote:
> Add the initialization function to create restricted DMA pools from
> matching reserved-memory nodes.
>
> Regardless of swiotlb setting, the restricted DMA pool is preferred if
> available.
>
> The restricted DMA pools provide a basic level of protection against the
> DMA overwriting buffer contents at unexpected times. However, to protect
> against general data leakage and system memory corruption, the system
> needs to provide a way to lock down the memory access, e.g., MPU.
>
> Signed-off-by: Claire Chang <tientzu@chromium.org>
> Reviewed-by: Christoph Hellwig <hch@lst.de>
> Tested-by: Stefano Stabellini <sstabellini@kernel.org>
> Tested-by: Will Deacon <will@kernel.org>
> ---
> include/linux/swiotlb.h | 3 +-
> kernel/dma/Kconfig | 14 ++++++++
> kernel/dma/swiotlb.c | 76 +++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 92 insertions(+), 1 deletion(-)
>
> diff --git a/include/linux/swiotlb.h b/include/linux/swiotlb.h
> index 3b9454d1e498..39284ff2a6cd 100644
> --- a/include/linux/swiotlb.h
> +++ b/include/linux/swiotlb.h
> @@ -73,7 +73,8 @@ extern enum swiotlb_force swiotlb_force;
> * range check to see if the memory was in fact allocated by this
> * API.
> * @nslabs: The number of IO TLB blocks (in groups of 64) between @start and
> - * @end. This is command line adjustable via setup_io_tlb_npages.
> + * @end. For default swiotlb, this is command line adjustable via
> + * setup_io_tlb_npages.
> * @used: The number of used IO TLB block.
> * @list: The free list describing the number of free entries available
> * from each index.
> diff --git a/kernel/dma/Kconfig b/kernel/dma/Kconfig
> index 77b405508743..3e961dc39634 100644
> --- a/kernel/dma/Kconfig
> +++ b/kernel/dma/Kconfig
> @@ -80,6 +80,20 @@ config SWIOTLB
> bool
> select NEED_DMA_MAP_STATE
>
> +config DMA_RESTRICTED_POOL
> + bool "DMA Restricted Pool"
> + depends on OF && OF_RESERVED_MEM
> + select SWIOTLB
This makes SWIOTLB user configurable, which in turn results in
mips64-linux-ld: arch/mips/kernel/setup.o: in function `arch_mem_init':
setup.c:(.init.text+0x19c8): undefined reference to `plat_swiotlb_setup'
make[1]: *** [Makefile:1280: vmlinux] Error 1
when building mips:allmodconfig.
Should this possibly be "depends on SWIOTLB" ?
Thanks,
Guenter
^ permalink raw reply
* Re: linux-next: build warning after merge of the powerpc tree
From: Jonathan Corbet @ 2021-08-24 13:46 UTC (permalink / raw)
To: Aneesh Kumar K.V, Stephen Rothwell, Michael Ellerman, PowerPC
Cc: Daniel Henrique Barboza, Linux Next Mailing List,
Linux Kernel Mailing List
In-Reply-To: <87v93ve7yg.fsf@linux.ibm.com>
"Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com> writes:
> Thanks for looking into this. I guess we also need to format the below table?
>
> | 0 8 40
> --|------------
> |
> 0 | 10 20 80
> |
> 8 | 20 10 160
> |
> 40| 80 160 10
>
>
> I don't know how to represent that in the documentation file. A table is
> probably not the right one?
The cheap way out is to put it in a literal block, of course. Sphinx
makes tables pretty easy, though:
https://www.sphinx-doc.org/en/master/usage/restructuredtext/basics.html#tables
jon
^ permalink raw reply
* [PATCH v2 RESEND] powerpc/audit: Convert powerpc to AUDIT_ARCH_COMPAT_GENERIC
From: Christophe Leroy @ 2021-08-24 13:36 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman
Cc: linux-audit, linuxppc-dev, linux-kernel, Eric Paris, Paul Moore
Commit e65e1fc2d24b ("[PATCH] syscall class hookup for all normal
targets") added generic support for AUDIT but that didn't include
support for bi-arch like powerpc.
Commit 4b58841149dc ("audit: Add generic compat syscall support")
added generic support for bi-arch.
Convert powerpc to that bi-arch generic audit support.
Cc: Paul Moore <paul@paul-moore.com>
Cc: Eric Paris <eparis@redhat.com>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
Resending v2 with Audit people in Cc
v2:
- Missing 'git add' for arch/powerpc/include/asm/unistd32.h
- Finalised commit description
---
arch/powerpc/Kconfig | 5 +-
arch/powerpc/include/asm/unistd32.h | 7 +++
arch/powerpc/kernel/Makefile | 3 --
arch/powerpc/kernel/audit.c | 84 -----------------------------
arch/powerpc/kernel/compat_audit.c | 44 ---------------
5 files changed, 8 insertions(+), 135 deletions(-)
create mode 100644 arch/powerpc/include/asm/unistd32.h
delete mode 100644 arch/powerpc/kernel/audit.c
delete mode 100644 arch/powerpc/kernel/compat_audit.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 663766fbf505..5472358609d2 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -163,6 +163,7 @@ config PPC
select ARCH_WANT_IRQS_OFF_ACTIVATE_MM
select ARCH_WANT_LD_ORPHAN_WARN
select ARCH_WEAK_RELEASE_ACQUIRE
+ select AUDIT_ARCH_COMPAT_GENERIC
select BINFMT_ELF
select BUILDTIME_TABLE_SORT
select CLONE_BACKWARDS
@@ -316,10 +317,6 @@ config GENERIC_TBSYNC
bool
default y if PPC32 && SMP
-config AUDIT_ARCH
- bool
- default y
-
config GENERIC_BUG
bool
default y
diff --git a/arch/powerpc/include/asm/unistd32.h b/arch/powerpc/include/asm/unistd32.h
new file mode 100644
index 000000000000..07689897d206
--- /dev/null
+++ b/arch/powerpc/include/asm/unistd32.h
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+#ifndef _ASM_POWERPC_UNISTD32_H_
+#define _ASM_POWERPC_UNISTD32_H_
+
+#include <asm/unistd_32.h>
+
+#endif /* _ASM_POWERPC_UNISTD32_H_ */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 7be36c1e1db6..825121eba3c2 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -125,9 +125,6 @@ obj-$(CONFIG_PCI) += pci_$(BITS).o $(pci64-y) \
pci-common.o pci_of_scan.o
obj-$(CONFIG_PCI_MSI) += msi.o
-obj-$(CONFIG_AUDIT) += audit.o
-obj64-$(CONFIG_AUDIT) += compat_audit.o
-
obj-$(CONFIG_PPC_IO_WORKAROUNDS) += io-workarounds.o
obj-y += trace/
diff --git a/arch/powerpc/kernel/audit.c b/arch/powerpc/kernel/audit.c
deleted file mode 100644
index a2dddd7f3d09..000000000000
--- a/arch/powerpc/kernel/audit.c
+++ /dev/null
@@ -1,84 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/audit.h>
-#include <asm/unistd.h>
-
-static unsigned dir_class[] = {
-#include <asm-generic/audit_dir_write.h>
-~0U
-};
-
-static unsigned read_class[] = {
-#include <asm-generic/audit_read.h>
-~0U
-};
-
-static unsigned write_class[] = {
-#include <asm-generic/audit_write.h>
-~0U
-};
-
-static unsigned chattr_class[] = {
-#include <asm-generic/audit_change_attr.h>
-~0U
-};
-
-static unsigned signal_class[] = {
-#include <asm-generic/audit_signal.h>
-~0U
-};
-
-int audit_classify_arch(int arch)
-{
-#ifdef CONFIG_PPC64
- if (arch == AUDIT_ARCH_PPC)
- return 1;
-#endif
- return 0;
-}
-
-int audit_classify_syscall(int abi, unsigned syscall)
-{
-#ifdef CONFIG_PPC64
- extern int ppc32_classify_syscall(unsigned);
- if (abi == AUDIT_ARCH_PPC)
- return ppc32_classify_syscall(syscall);
-#endif
- switch(syscall) {
- case __NR_open:
- return 2;
- case __NR_openat:
- return 3;
- case __NR_socketcall:
- return 4;
- case __NR_execve:
- return 5;
- default:
- return 0;
- }
-}
-
-static int __init audit_classes_init(void)
-{
-#ifdef CONFIG_PPC64
- extern __u32 ppc32_dir_class[];
- extern __u32 ppc32_write_class[];
- extern __u32 ppc32_read_class[];
- extern __u32 ppc32_chattr_class[];
- extern __u32 ppc32_signal_class[];
- audit_register_class(AUDIT_CLASS_WRITE_32, ppc32_write_class);
- audit_register_class(AUDIT_CLASS_READ_32, ppc32_read_class);
- audit_register_class(AUDIT_CLASS_DIR_WRITE_32, ppc32_dir_class);
- audit_register_class(AUDIT_CLASS_CHATTR_32, ppc32_chattr_class);
- audit_register_class(AUDIT_CLASS_SIGNAL_32, ppc32_signal_class);
-#endif
- audit_register_class(AUDIT_CLASS_WRITE, write_class);
- audit_register_class(AUDIT_CLASS_READ, read_class);
- audit_register_class(AUDIT_CLASS_DIR_WRITE, dir_class);
- audit_register_class(AUDIT_CLASS_CHATTR, chattr_class);
- audit_register_class(AUDIT_CLASS_SIGNAL, signal_class);
- return 0;
-}
-
-__initcall(audit_classes_init);
diff --git a/arch/powerpc/kernel/compat_audit.c b/arch/powerpc/kernel/compat_audit.c
deleted file mode 100644
index 55c6ccda0a85..000000000000
--- a/arch/powerpc/kernel/compat_audit.c
+++ /dev/null
@@ -1,44 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#undef __powerpc64__
-#include <asm/unistd.h>
-
-unsigned ppc32_dir_class[] = {
-#include <asm-generic/audit_dir_write.h>
-~0U
-};
-
-unsigned ppc32_chattr_class[] = {
-#include <asm-generic/audit_change_attr.h>
-~0U
-};
-
-unsigned ppc32_write_class[] = {
-#include <asm-generic/audit_write.h>
-~0U
-};
-
-unsigned ppc32_read_class[] = {
-#include <asm-generic/audit_read.h>
-~0U
-};
-
-unsigned ppc32_signal_class[] = {
-#include <asm-generic/audit_signal.h>
-~0U
-};
-
-int ppc32_classify_syscall(unsigned syscall)
-{
- switch(syscall) {
- case __NR_open:
- return 2;
- case __NR_openat:
- return 3;
- case __NR_socketcall:
- return 4;
- case __NR_execve:
- return 5;
- default:
- return 1;
- }
-}
--
2.25.0
^ permalink raw reply related
* Re: [PATCH v2] powerpc/audit: Convert powerpc to AUDIT_ARCH_COMPAT_GENERIC
From: Christophe Leroy @ 2021-08-24 13:26 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Paul Mackerras
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <877dgbc6vx.fsf@mpe.ellerman.id.au>
Le 24/08/2021 à 15:24, Michael Ellerman a écrit :
> Christophe Leroy <christophe.leroy@csgroup.eu> writes:
>> Commit e65e1fc2d24b ("[PATCH] syscall class hookup for all normal
>> targets") added generic support for AUDIT but that didn't include
>> support for bi-arch like powerpc.
>>
>> Commit 4b58841149dc ("audit: Add generic compat syscall support")
>> added generic support for bi-arch.
>>
>> Convert powerpc to that bi-arch generic audit support.
>>
>> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
>> ---
>> v2:
>> - Missing 'git add' for arch/powerpc/include/asm/unistd32.h
>> - Finalised commit description
>> ---
>> arch/powerpc/Kconfig | 5 +-
>> arch/powerpc/include/asm/unistd32.h | 7 +++
>> arch/powerpc/kernel/Makefile | 3 --
>> arch/powerpc/kernel/audit.c | 84 -----------------------------
>> arch/powerpc/kernel/compat_audit.c | 44 ---------------
>> 5 files changed, 8 insertions(+), 135 deletions(-)
>> create mode 100644 arch/powerpc/include/asm/unistd32.h
>> delete mode 100644 arch/powerpc/kernel/audit.c
>> delete mode 100644 arch/powerpc/kernel/compat_audit.c
>
> This looks OK, but I don't know much about audit.
>
> Can you resend with the audit maintainers on Cc?
>
Sure.
^ permalink raw reply
* Re: [PATCH v2] powerpc/audit: Convert powerpc to AUDIT_ARCH_COMPAT_GENERIC
From: Michael Ellerman @ 2021-08-24 13:24 UTC (permalink / raw)
To: Christophe Leroy, Benjamin Herrenschmidt, Paul Mackerras
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <dc14509a28a993738b1325211f412be72a4f9b1e.1629701132.git.christophe.leroy@csgroup.eu>
Christophe Leroy <christophe.leroy@csgroup.eu> writes:
> Commit e65e1fc2d24b ("[PATCH] syscall class hookup for all normal
> targets") added generic support for AUDIT but that didn't include
> support for bi-arch like powerpc.
>
> Commit 4b58841149dc ("audit: Add generic compat syscall support")
> added generic support for bi-arch.
>
> Convert powerpc to that bi-arch generic audit support.
>
> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
> ---
> v2:
> - Missing 'git add' for arch/powerpc/include/asm/unistd32.h
> - Finalised commit description
> ---
> arch/powerpc/Kconfig | 5 +-
> arch/powerpc/include/asm/unistd32.h | 7 +++
> arch/powerpc/kernel/Makefile | 3 --
> arch/powerpc/kernel/audit.c | 84 -----------------------------
> arch/powerpc/kernel/compat_audit.c | 44 ---------------
> 5 files changed, 8 insertions(+), 135 deletions(-)
> create mode 100644 arch/powerpc/include/asm/unistd32.h
> delete mode 100644 arch/powerpc/kernel/audit.c
> delete mode 100644 arch/powerpc/kernel/compat_audit.c
This looks OK, but I don't know much about audit.
Can you resend with the audit maintainers on Cc?
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/32: Don't use lmw/stmw for saving/restoring non volatile regs
From: Segher Boessenkool @ 2021-08-24 13:16 UTC (permalink / raw)
To: Christophe Leroy; +Cc: Paul Mackerras, linuxppc-dev, linux-kernel
In-Reply-To: <9bbc9797-cfc7-1484-90ad-2146ff1a5e18@csgroup.eu>
Hi!
On Tue, Aug 24, 2021 at 07:54:22AM +0200, Christophe Leroy wrote:
> Le 23/08/2021 à 20:46, Segher Boessenkool a écrit :
> >On Mon, Aug 23, 2021 at 03:29:12PM +0000, Christophe Leroy wrote:
> >>Instructions lmw/stmw are interesting for functions that are rarely
> >>used and not in the cache, because only one instruction is to be
> >>copied into the instruction cache instead of 19. However those
> >>instruction are less performant than 19x raw lwz/stw as they require
> >>synchronisation plus one additional cycle.
> >
> >lmw takes N+2 cycles for loading N words on 603/604/750/7400, and N+3 on
> >7450. stmw takes N+1 cycles for storing N words on 603, N+2 on 604/750/
> >7400, and N+3 on 7450 (load latency is 3 instead of 2 on 7450).
> >
> >There is no synchronisation needed, although there is some serialisation,
> >which of course doesn't mean much since there can be only 6 or 8 or so
> >insns executing at once anyway.
>
> Yes I meant serialisation, isn't it the same as synchronisation ?
Ha no, synchronisation are insns like sync and eieio :-) Synchronisation
is architectural, serialisation is (mostly) not, it is a feature of the
specific core.
> >So, these insns are almost never slower, they can easily win cycles back
> >because of the smaller code, too.
> >
> >What 32-bit core do you see where load/store multiple are more than a
> >fraction of a cycle (per memory access) slower?
> >
> >>SAVE_NVGPRS / REST_NVGPRS are used in only a few places which are
> >>mostly in interrupts entries/exits and in task switch so they are
> >>likely already in the cache.
> >
> >Nothing is likely in the cache on the older cores (except in
> >microbenchmarks), the caches are not big enough for that!
>
> Even syscall entries/exit pathes and/or most frequent interrupts entries
> and interrupt exit ?
It has to be measured. You are probably right for programs that use a
lot of system calls, and (unmeasurably :-) ) wrong for those that don't.
So that is a good argument: it speeds up some scenarios, and does not
make any real impact on anything else.
This also does not replace all {l,st}mw in the kernel, only those on
interrupt paths. So it is not necessarily bad :-)
> >>Using standard lwz improves null_syscall selftest by:
> >>- 10 cycles on mpc832x.
> >>- 2 cycles on mpc8xx.
> >
> >And in real benchmarks?
>
> Don't know, what benchmark should I use to evaluate syscall entry/exit if
> 'null_syscall' selftest is not relevant ?
Some real workload (something that uses memory and computational insns a
lot, in addition to many syscalls).
> >On mpccore both lmw and stmw are only N+1 btw. But the serialization
> >might cost another cycle here?
>
> That coherent on MPC8xx, that's only 2 cycles.
> But on the mpc832x which has a e300c2 core, it looks like I have 10 cycles
> difference. Is anything wrong ?
I don't know that core very well, I'll have a look.
Segher
^ permalink raw reply
* Re: [PATCH v2 2/3] selftests/powerpc: Add test for real address error handling
From: Michael Ellerman @ 2021-08-24 12:48 UTC (permalink / raw)
To: Ganesh Goudar, linuxppc-dev; +Cc: mikey, Ganesh Goudar, mahesh, npiggin
In-Reply-To: <20210805092025.272871-2-ganeshgr@linux.ibm.com>
Ganesh Goudar <ganeshgr@linux.ibm.com> writes:
> Add test for real address or control memory address access
> error handling, using NX-GZIP engine.
>
> The error is injected by accessing the control memory address
> using illegal instruction, on successful handling the process
> attempting to access control memory address using illegal
> instruction receives SIGBUS.
...
> diff --git a/tools/testing/selftests/powerpc/mce/inject-ra-err.sh b/tools/testing/selftests/powerpc/mce/inject-ra-err.sh
> new file mode 100755
> index 000000000000..3633cdc651a1
> --- /dev/null
> +++ b/tools/testing/selftests/powerpc/mce/inject-ra-err.sh
> @@ -0,0 +1,18 @@
> +#!/bin/bash
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +
> +if [[ ! -w /dev/crypto/nx-gzip ]]; then
> + echo "WARN: Can't access /dev/crypto/nx-gzip, skipping"
> + exit 0
> +fi
> +
> +timeout 5 ./inject-ra-err
> +
> +# 128 + 7 (SIGBUS) = 135, 128 is a exit code with special meaning.
> +if [ $? -ne 135 ]; then
> + echo "FAILED: Real address or Control memory access error not handled"
> + exit $?
> +fi
> +
> +echo "OK: Real address or Control memory access error is handled"
> +exit 0
I don't think we really need the shell script, we should be able to do
all that in the C code.
Can you try this?
cheers
diff --git a/tools/testing/selftests/powerpc/mce/Makefile b/tools/testing/selftests/powerpc/mce/Makefile
new file mode 100644
index 000000000000..2424513982d9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/mce/Makefile
@@ -0,0 +1,7 @@
+#SPDX-License-Identifier: GPL-2.0-or-later
+
+TEST_GEN_PROGS := inject-ra-err
+
+include ../../lib.mk
+
+$(TEST_GEN_PROGS): ../harness.c
diff --git a/tools/testing/selftests/powerpc/mce/inject-ra-err.c b/tools/testing/selftests/powerpc/mce/inject-ra-err.c
new file mode 100644
index 000000000000..ba0f9c28f786
--- /dev/null
+++ b/tools/testing/selftests/powerpc/mce/inject-ra-err.c
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include <errno.h>
+#include <fcntl.h>
+#include <signal.h>
+#include <stdio.h>
+#include <string.h>
+#include <sys/ioctl.h>
+#include <sys/mman.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include "vas-api.h"
+#include "utils.h"
+
+static bool faulted;
+
+static void sigbus_handler(int n, siginfo_t *info, void *ctxt_v)
+{
+ ucontext_t *ctxt = (ucontext_t *)ctxt_v;
+ struct pt_regs *regs = ctxt->uc_mcontext.regs;
+
+ faulted = true;
+ regs->nip += 4;
+}
+
+static int test_ra_error(void)
+{
+ struct vas_tx_win_open_attr attr;
+ int fd, *paste_addr;
+ char *devname = "/dev/crypto/nx-gzip";
+ struct sigaction act = {
+ .sa_sigaction = sigbus_handler,
+ .sa_flags = SA_SIGINFO,
+ };
+
+ memset(&attr, 0, sizeof(attr));
+ attr.version = 1;
+ attr.vas_id = 0;
+
+ SKIP_IF(!access(devname, F_OK));
+
+ fd = open(devname, O_RDWR);
+ FAIL_IF(fd < 0);
+ FAIL_IF(ioctl(fd, VAS_TX_WIN_OPEN, &attr) < 0);
+ FAIL_IF(sigaction(SIGBUS, &act, NULL) != 0);
+
+ paste_addr = mmap(NULL, 4096, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0ULL);
+
+ /* The following assignment triggers exception */
+ mb();
+ *paste_addr = 1;
+ mb();
+
+ FAIL_IF(!faulted);
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(test_ra_error, "inject-ra-err");
+}
^ permalink raw reply related
* Re: [PATCH 3/3] powerpc/smp: Enable CACHE domain for shared processor
From: Gautham R Shenoy @ 2021-08-24 8:55 UTC (permalink / raw)
To: Srikar Dronamraju
Cc: Nathan Lynch, Gautham R Shenoy, Vincent Guittot, Peter Zijlstra,
Valentin Schneider, linuxppc-dev, Ingo Molnar
In-Reply-To: <20210821092419.167454-4-srikar@linux.vnet.ibm.com>
Hello Srikar,
On Sat, Aug 21, 2021 at 02:54:19PM +0530, Srikar Dronamraju wrote:
[..snip..]
The patch looks good to me.
Reviewed-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
> ---
> arch/powerpc/kernel/smp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
> index 3d26d3c61e94..47b15f31cc29 100644
> --- a/arch/powerpc/kernel/smp.c
> +++ b/arch/powerpc/kernel/smp.c
> @@ -1365,7 +1365,7 @@ static bool update_mask_by_l2(int cpu, cpumask_var_t *mask)
> l2_cache = cpu_to_l2cache(cpu);
> if (!l2_cache || !*mask) {
> /* Assume only core siblings share cache with this CPU */
> - for_each_cpu(i, submask_fn(cpu))
> + for_each_cpu(i, cpu_sibling_mask(cpu))
> set_cpus_related(cpu, i, cpu_l2_cache_mask);
>
> return false;
> --
> 2.18.2
>
^ permalink raw reply
* Re: [PATCH kernel] KVM: PPC: Book3S HV: Make unique debugfs nodename
From: Alexey Kardashevskiy @ 2021-08-24 8:37 UTC (permalink / raw)
To: Fabiano Rosas; +Cc: linuxppc-dev, linux-kernel, kvm-ppc
In-Reply-To: <87pmubu306.fsf@linux.ibm.com>
On 18/08/2021 08:20, Fabiano Rosas wrote:
> Alexey Kardashevskiy <aik@ozlabs.ru> writes:
>
>> On 07/07/2021 14:13, Alexey Kardashevskiy wrote:
>
>> alternatively move this debugfs stuff under the platform-independent
>> directory, how about that?
>
> That's a good idea. I only now realized we have two separate directories
> for the same guest:
>
> $ ls /sys/kernel/debug/kvm/ | grep $pid
> 19062-11
> vm19062
>
> Looks like we would have to implement kvm_arch_create_vcpu_debugfs for
> the vcpu information and add a similar hook for the vm.
Something like that. From the git history, it looks like the ppc folder
was added first and then the generic kvm folder was added but apparently
they did not notice the ppc one due to natural reasons :)
If you are not too busy, can you please merge the ppc one into the
generic one and post the patch, so we won't need to fix these
duplication warnings again? Thanks,
>>> ---
>>> arch/powerpc/kvm/book3s_hv.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
>>> index 1d1fcc290fca..0223ddc0eed0 100644
>>> --- a/arch/powerpc/kvm/book3s_hv.c
>>> +++ b/arch/powerpc/kvm/book3s_hv.c
>>> @@ -5227,7 +5227,7 @@ static int kvmppc_core_init_vm_hv(struct kvm *kvm)
>>> /*
>>> * Create a debugfs directory for the VM
>>> */
>>> - snprintf(buf, sizeof(buf), "vm%d", current->pid);
>>> + snprintf(buf, sizeof(buf), "vm%d-lp%ld", current->pid, lpid);
>>> kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir);
>>> kvmppc_mmu_debugfs_init(kvm);
>>> if (radix_enabled())
>>>
--
Alexey
^ permalink raw reply
* [PATCH v2] powerpc: Avoid link stack corruption in misc asm functions
From: Christophe Leroy @ 2021-08-24 7:56 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman
Cc: linuxppc-dev, linux-kernel
bl;mflr is used at several places to get code position.
Use bcl 20,31,+4 instead of bl in order to preserve link stack.
See commit c974809a26a1 ("powerpc/vdso: Avoid link stack corruption
in __get_datapage()") for details.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
v2: Use $+4 instead of label ; squashed several commits together
---
arch/powerpc/kernel/misc.S | 2 +-
arch/powerpc/kernel/misc_32.S | 2 +-
arch/powerpc/kernel/misc_64.S | 2 +-
arch/powerpc/kernel/reloc_32.S | 2 +-
arch/powerpc/kexec/relocate_32.S | 12 ++++++------
5 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S
index 5be96feccb55..fb7de3543c03 100644
--- a/arch/powerpc/kernel/misc.S
+++ b/arch/powerpc/kernel/misc.S
@@ -29,7 +29,7 @@ _GLOBAL(reloc_offset)
li r3, 0
_GLOBAL(add_reloc_offset)
mflr r0
- bl 1f
+ bcl 20,31,$+4
1: mflr r5
PPC_LL r4,(2f-1b)(r5)
subf r5,r4,r5
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index d8645efff902..e5127b19fec2 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -67,7 +67,7 @@ _GLOBAL(reloc_got2)
srwi. r8,r8,2
beqlr
mtctr r8
- bl 1f
+ bcl 20,31,$+4
1: mflr r0
lis r4,1b@ha
addi r4,r4,1b@l
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 4b761a18a74d..d38a019b38e1 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -255,7 +255,7 @@ _GLOBAL(scom970_write)
* Physical (hardware) cpu id should be in r3.
*/
_GLOBAL(kexec_wait)
- bl 1f
+ bcl 20,31,$+4
1: mflr r5
addi r5,r5,kexec_flag-1b
diff --git a/arch/powerpc/kernel/reloc_32.S b/arch/powerpc/kernel/reloc_32.S
index 10e96f3e22fe..0508c14b4c28 100644
--- a/arch/powerpc/kernel/reloc_32.S
+++ b/arch/powerpc/kernel/reloc_32.S
@@ -30,7 +30,7 @@ R_PPC_RELATIVE = 22
_GLOBAL(relocate)
mflr r0 /* Save our LR */
- bl 0f /* Find our current runtime address */
+ bcl 20,31,$+4 /* Find our current runtime address */
0: mflr r12 /* Make it accessible */
mtlr r0
diff --git a/arch/powerpc/kexec/relocate_32.S b/arch/powerpc/kexec/relocate_32.S
index 61946c19e07c..cf6e52bdf8d8 100644
--- a/arch/powerpc/kexec/relocate_32.S
+++ b/arch/powerpc/kexec/relocate_32.S
@@ -93,7 +93,7 @@ wmmucr:
* Invalidate all the TLB entries except the current entry
* where we are running from
*/
- bl 0f /* Find our address */
+ bcl 20,31,$+4 /* Find our address */
0: mflr r5 /* Make it accessible */
tlbsx r23,0,r5 /* Find entry we are in */
li r4,0 /* Start at TLB entry 0 */
@@ -158,7 +158,7 @@ write_out:
/* Switch to other address space in MSR */
insrwi r9, r7, 1, 26 /* Set MSR[IS] = r7 */
- bl 1f
+ bcl 20,31,$+4
1: mflr r8
addi r8, r8, (2f-1b) /* Find the target offset */
@@ -202,7 +202,7 @@ next_tlb:
li r9,0
insrwi r9, r7, 1, 26 /* Set MSR[IS] = r7 */
- bl 1f
+ bcl 20,31,$+4
1: mflr r8
and r8, r8, r11 /* Get our offset within page */
addi r8, r8, (2f-1b)
@@ -240,7 +240,7 @@ setup_map_47x:
sync
/* Find the entry we are running from */
- bl 2f
+ bcl 20,31,$+4
2: mflr r23
tlbsx r23, 0, r23
tlbre r24, r23, 0 /* TLB Word 0 */
@@ -296,7 +296,7 @@ clear_utlb_entry:
/* Update the msr to the new TS */
insrwi r5, r7, 1, 26
- bl 1f
+ bcl 20,31,$+4
1: mflr r6
addi r6, r6, (2f-1b)
@@ -355,7 +355,7 @@ write_utlb:
/* Defaults to 256M */
lis r10, 0x1000
- bl 1f
+ bcl 20,31,$+4
1: mflr r4
addi r4, r4, (2f-1b) /* virtual address of 2f */
--
2.25.0
^ permalink raw reply related
* [PATCH v3] powerpc/booke: Avoid link stack corruption in several places
From: Christophe Leroy @ 2021-08-24 7:56 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman
Cc: linuxppc-dev, linux-kernel
Use bcl 20,31,+4 instead of bl in order to preserve link stack.
See commit c974809a26a1 ("powerpc/vdso: Avoid link stack corruption
in __get_datapage()") for details.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
v3: Use $+4 as destination instead of label
v2: Added missing ; in LOAD_REG_ADDR_PIC()
---
arch/powerpc/include/asm/ppc_asm.h | 2 +-
arch/powerpc/kernel/exceptions-64e.S | 6 +++---
arch/powerpc/kernel/fsl_booke_entry_mapping.S | 8 ++++----
arch/powerpc/kernel/head_44x.S | 6 +++---
arch/powerpc/kernel/head_fsl_booke.S | 6 +++---
arch/powerpc/mm/nohash/tlb_low.S | 4 ++--
6 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 349fc0ec0dbb..7be24048b8d1 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -260,7 +260,7 @@ GLUE(.,name):
/* Be careful, this will clobber the lr register. */
#define LOAD_REG_ADDR_PIC(reg, name) \
- bl 0f; \
+ bcl 20,31,$+4; \
0: mflr reg; \
addis reg,reg,(name - 0b)@ha; \
addi reg,reg,(name - 0b)@l;
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 1401787b0b93..7e0943d9f9b0 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -1127,7 +1127,7 @@ found_iprot:
* r3 = MAS0_TLBSEL (for the iprot array)
* r4 = SPRN_TLBnCFG
*/
- bl invstr /* Find our address */
+ bcl 20,31,$+4 /* Find our address */
invstr: mflr r6 /* Make it accessible */
mfmsr r7
rlwinm r5,r7,27,31,31 /* extract MSR[IS] */
@@ -1196,7 +1196,7 @@ skpinv: addi r6,r6,1 /* Increment */
mfmsr r6
xori r6,r6,MSR_IS
mtspr SPRN_SRR1,r6
- bl 1f /* Find our address */
+ bcl 20,31,$+4 /* Find our address */
1: mflr r6
addi r6,r6,(2f - 1b)
mtspr SPRN_SRR0,r6
@@ -1256,7 +1256,7 @@ skpinv: addi r6,r6,1 /* Increment */
* r4 = MAS0 w/TLBSEL & ESEL for the temp mapping
*/
/* Now we branch the new virtual address mapped by this entry */
- bl 1f /* Find our address */
+ bcl 20,31,$+4 /* Find our address */
1: mflr r6
addi r6,r6,(2f - 1b)
tovirt(r6,r6)
diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
index 8bccce6544b5..dedc17fac8f8 100644
--- a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
+++ b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* 1. Find the index of the entry we're executing in */
- bl invstr /* Find our address */
+ bcl 20,31,$+4 /* Find our address */
invstr: mflr r6 /* Make it accessible */
mfmsr r7
rlwinm r4,r7,27,31,31 /* extract MSR[IS] */
@@ -85,7 +85,7 @@ skpinv: addi r6,r6,1 /* Increment */
addi r6,r6,10
slw r6,r8,r6 /* convert to mask */
- bl 1f /* Find our address */
+ bcl 20,31,$+4 /* Find our address */
1: mflr r7
mfspr r8,SPRN_MAS3
@@ -117,7 +117,7 @@ skpinv: addi r6,r6,1 /* Increment */
xori r6,r4,1
slwi r6,r6,5 /* setup new context with other address space */
- bl 1f /* Find our address */
+ bcl 20,31,$+4 /* Find our address */
1: mflr r9
rlwimi r7,r9,0,20,31
addi r7,r7,(2f - 1b)
@@ -207,7 +207,7 @@ next_tlb_setup:
lis r7,MSR_KERNEL@h
ori r7,r7,MSR_KERNEL@l
- bl 1f /* Find our address */
+ bcl 20,31,$+4 /* Find our address */
1: mflr r9
rlwimi r6,r9,0,20,31
addi r6,r6,(2f - 1b)
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index ddc978a2d381..02d2928d1e01 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -70,7 +70,7 @@ _ENTRY(_start);
* address.
* r21 will be loaded with the physical runtime address of _stext
*/
- bl 0f /* Get our runtime address */
+ bcl 20,31,$+4 /* Get our runtime address */
0: mflr r21 /* Make it accessible */
addis r21,r21,(_stext - 0b)@ha
addi r21,r21,(_stext - 0b)@l /* Get our current runtime base */
@@ -853,7 +853,7 @@ _GLOBAL(init_cpu_state)
wmmucr: mtspr SPRN_MMUCR,r3 /* Put MMUCR */
sync
- bl invstr /* Find our address */
+ bcl 20,31,$+4 /* Find our address */
invstr: mflr r5 /* Make it accessible */
tlbsx r23,0,r5 /* Find entry we are in */
li r4,0 /* Start at TLB entry 0 */
@@ -1045,7 +1045,7 @@ head_start_47x:
sync
/* Find the entry we are running from */
- bl 1f
+ bcl 20,31,$+4
1: mflr r23
tlbsx r23,0,r23
tlbre r24,r23,0
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 0f9642f36b49..dbf3b89e543c 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -79,7 +79,7 @@ _ENTRY(_start);
mr r23,r3
mr r25,r4
- bl 0f
+ bcl 20,31,$+4
0: mflr r8
addis r3,r8,(is_second_reloc - 0b)@ha
lwz r19,(is_second_reloc - 0b)@l(r3)
@@ -1132,7 +1132,7 @@ _GLOBAL(switch_to_as1)
bne 1b
/* Get the tlb entry used by the current running code */
- bl 0f
+ bcl 20,31,$+4
0: mflr r4
tlbsx 0,r4
@@ -1166,7 +1166,7 @@ _GLOBAL(switch_to_as1)
_GLOBAL(restore_to_as0)
mflr r0
- bl 0f
+ bcl 20,31,$+4
0: mflr r9
addi r9,r9,1f - 0b
diff --git a/arch/powerpc/mm/nohash/tlb_low.S b/arch/powerpc/mm/nohash/tlb_low.S
index 4613bf8e9aae..5add4a51e51f 100644
--- a/arch/powerpc/mm/nohash/tlb_low.S
+++ b/arch/powerpc/mm/nohash/tlb_low.S
@@ -199,7 +199,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_476_DD2)
* Touch enough instruction cache lines to ensure cache hits
*/
1: mflr r9
- bl 2f
+ bcl 20,31,$+4
2: mflr r6
li r7,32
PPC_ICBT(0,R6,R7) /* touch next cache line */
@@ -414,7 +414,7 @@ _GLOBAL(loadcam_multi)
* Set up temporary TLB entry that is the same as what we're
* running from, but in AS=1.
*/
- bl 1f
+ bcl 20,31,$+4
1: mflr r6
tlbsx 0,r8
mfspr r6,SPRN_MAS1
--
2.25.0
^ permalink raw reply related
* Re: [PATCH v2 03/12] x86/sev: Add an x86 version of prot_guest_has()
From: Christoph Hellwig @ 2021-08-24 7:14 UTC (permalink / raw)
To: Tom Lendacky
Cc: Sathyanarayanan Kuppuswamy, linux-efi, Brijesh Singh, kvm,
Peter Zijlstra, Dave Hansen, dri-devel, platform-driver-x86,
linux-s390, Andi Kleen, Joerg Roedel, x86, amd-gfx,
Christoph Hellwig, Ingo Molnar, linux-graphics-maintainer,
Joerg Roedel, Tianyu Lan, Borislav Petkov, Andy Lutomirski,
Thomas Gleixner, kexec, linux-kernel, iommu, linux-fsdevel,
linuxppc-dev
In-Reply-To: <4272eaf5-b654-2669-62ac-ba768acd6b91@amd.com>
On Thu, Aug 19, 2021 at 01:33:09PM -0500, Tom Lendacky wrote:
> I did it as inline originally because the presence of the function will be
> decided based on the ARCH_HAS_PROTECTED_GUEST config. For now, that is
> only selected by the AMD memory encryption support, so if I went out of
> line I could put in mem_encrypt.c. But with TDX wanting to also use it, it
> would have to be in an always built file with some #ifdefs or in its own
> file that is conditionally built based on the ARCH_HAS_PROTECTED_GUEST
> setting (they've already tried building with ARCH_HAS_PROTECTED_GUEST=y
> and AMD_MEM_ENCRYPT not set).
>
> To take it out of line, I'm leaning towards the latter, creating a new
> file that is built based on the ARCH_HAS_PROTECTED_GUEST setting.
Yes. In general everytime architectures have to provide the prototype
and not just the implementation of something we end up with a giant mess
sooner or later. In a few cases that is still warranted due to
performance concerns, but i don't think that is the case here.
>
> >
> >> +/* 0x800 - 0x8ff reserved for AMD */
> >> +#define PATTR_SME 0x800
> >> +#define PATTR_SEV 0x801
> >> +#define PATTR_SEV_ES 0x802
> >
> > Why do we need reservations for a purely in-kernel namespace?
> >
> > And why are you overoading a brand new generic API with weird details
> > of a specific implementation like this?
>
> There was some talk about this on the mailing list where TDX and SEV may
> need to be differentiated, so we wanted to reserve a range of values per
> technology. I guess I can remove them until they are actually needed.
In that case add a flag for the differing behavior. And only add them
when actually needed. And either way there is absolutely no need to
reserve ranges.
^ permalink raw reply
* Re: [PATCH v2 1/3] powerpc/pseries: Parse control memory access error
From: Michael Ellerman @ 2021-08-24 6:39 UTC (permalink / raw)
To: Ganesh Goudar, linuxppc-dev; +Cc: mikey, Ganesh Goudar, mahesh, npiggin
In-Reply-To: <20210805092025.272871-1-ganeshgr@linux.ibm.com>
Hi Ganesh,
Some comments below ...
Ganesh Goudar <ganeshgr@linux.ibm.com> writes:
> Add support to parse and log control memory access
> error for pseries.
>
> Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
> ---
> v2: No changes in this patch.
> ---
> arch/powerpc/platforms/pseries/ras.c | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
> index 167f2e1b8d39..608c35cad0c3 100644
> --- a/arch/powerpc/platforms/pseries/ras.c
> +++ b/arch/powerpc/platforms/pseries/ras.c
> @@ -80,6 +80,7 @@ struct pseries_mc_errorlog {
> #define MC_ERROR_TYPE_TLB 0x04
> #define MC_ERROR_TYPE_D_CACHE 0x05
> #define MC_ERROR_TYPE_I_CACHE 0x07
> +#define MC_ERROR_TYPE_CTRL_MEM_ACCESS 0x08
...
>
> +#define MC_ERROR_CTRL_MEM_ACCESS_PTABLE_WALK 0
> +#define MC_ERROR_CTRL_MEM_ACCESS_OP_ACCESS 1
Where do the above values come from?
> +
> static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog)
> {
> switch (mlog->error_type) {
> @@ -112,6 +116,8 @@ static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog)
> case MC_ERROR_TYPE_ERAT:
> case MC_ERROR_TYPE_TLB:
> return (mlog->sub_err_type & 0x03);
> + case MC_ERROR_TYPE_CTRL_MEM_ACCESS:
> + return (mlog->sub_err_type & 0x70) >> 4;
Can you add to the comment above sub_err_type explaining what these bits are.
> default:
> return 0;
> }
> @@ -699,6 +705,21 @@ static int mce_handle_err_virtmode(struct pt_regs *regs,
> case MC_ERROR_TYPE_I_CACHE:
> mce_err.error_type = MCE_ERROR_TYPE_ICACHE;
> break;
> + case MC_ERROR_TYPE_CTRL_MEM_ACCESS:
> + mce_err.error_type = MCE_ERROR_TYPE_RA;
> + if (mce_log->sub_err_type & 0x80)
This appears many times in the file.
Can we add eg. MC_EFFECTIVE_ADDR_PROVIDED?
> + eaddr = be64_to_cpu(mce_log->effective_address);
> + switch (err_sub_type) {
> + case MC_ERROR_CTRL_MEM_ACCESS_PTABLE_WALK:
> + mce_err.u.ra_error_type =
> + MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN;
That name is ridiculously long, but I guess that's not your fault :)
We can fix it up in a later patch.
> + break;
> + case MC_ERROR_CTRL_MEM_ACCESS_OP_ACCESS:
> + mce_err.u.ra_error_type =
> + MCE_RA_ERROR_LOAD_STORE_FOREIGN;
> + break;
> + }
> + break;
cheers
^ permalink raw reply
* Re: [PATCH v5 08/11] powerpc/pseries/iommu: Update remove_dma_window() to accept property name
From: Alexey Kardashevskiy @ 2021-08-24 6:31 UTC (permalink / raw)
To: Leonardo Brás, Frederic Barrat, Michael Ellerman,
Benjamin Herrenschmidt, Paul Mackerras, David Gibson,
kernel test robot, Nicolin Chen
Cc: linuxppc-dev, linux-kernel
In-Reply-To: <f9f7bcd75d534ebde7cc83c4138176da4680e30f.camel@gmail.com>
On 17/08/2021 16:12, Leonardo Brás wrote:
> On Tue, 2021-08-17 at 02:59 -0300, Leonardo Brás wrote:
>> Hello Fred, thanks for the feedback!
>>
>> On Tue, 2021-07-20 at 19:51 +0200, Frederic Barrat wrote:
>>>
>>>
>>> On 16/07/2021 10:27, Leonardo Bras wrote:
>>>> Update remove_dma_window() so it can be used to remove DDW with a
>>>> given
>>>> property name.
>>>>
>>>> This enables the creation of new property names for DDW, so we
>>>> can
>>>> have different usage for it, like indirect mapping.
>>>>
>>>> Signed-off-by: Leonardo Bras <leobras.c@gmail.com>
>>>> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
>>>> ---
>>>> arch/powerpc/platforms/pseries/iommu.c | 21 +++++++++++--------
>>>> --
>>>> 1 file changed, 11 insertions(+), 10 deletions(-)
>>>>
>>>> diff --git a/arch/powerpc/platforms/pseries/iommu.c
>>>> b/arch/powerpc/platforms/pseries/iommu.c
>>>> index 108c3dcca686..17c6f4706e76 100644
>>>> --- a/arch/powerpc/platforms/pseries/iommu.c
>>>> +++ b/arch/powerpc/platforms/pseries/iommu.c
>>>> @@ -830,31 +830,32 @@ static void remove_dma_window(struct
>>>> device_node *np, u32 *ddw_avail,
>>>> np, ret,
>>>> ddw_avail[DDW_REMOVE_PE_DMA_WIN],
>>>> liobn);
>>>> }
>>>>
>>>> -static void remove_ddw(struct device_node *np, bool remove_prop)
>>>> +static int remove_ddw(struct device_node *np, bool remove_prop,
>>>> const char *win_name)
>>>> {
>>>
>>>
>>> Why switch to returning an int? None of the callers check it.
>>
>> IIRC, in a previous version it did make sense, which is not the case
>> anymore. I will revert this.
>>
>> Thanks!
>
> Oh, sorry about that, it is in fact still needed:
Then you should have added it in 10/11.
>
> It will make sense in patch v5 10/11:
> On iommu_reconfig_notifier(), if (action == OF_RECONFIG_DETACH_NODE),
> we need to remove a DDW if it exists.
>
> As there may be different window names, it tests for DIRECT64_PROPNAME,
> and if it's not found, it tests for DMA64_PROPNAME.
>
> This approach will skip scanning for DMA64_PROPNAME if
> DIRECT64_PROPNAME was found, as both may not exist in the same node.
> But for this approach to work we need remove_ddw() to return error if
> the property is not found.
>
> Does it make sense? or should I just test for both?
Or you could just try removing both without checking the return code, it
is one extra of_find_property in very rare code path. Not worth
reposting though imho. (sorry I was off last week, catching up). Thanks,
--
Alexey
^ permalink raw reply
* Re: [PATCH] scsi: ibmvfc: Stop using scsi_cmnd.tag
From: Martin K. Petersen @ 2021-08-24 4:03 UTC (permalink / raw)
To: benh, paulus, tyreld, jejb, mpe, John Garry
Cc: sfr, Martin K . Petersen, linux-scsi, linux-kernel, linux-next,
hare, linuxppc-dev, hch, bvanassche
In-Reply-To: <1629207817-211936-1-git-send-email-john.garry@huawei.com>
On Tue, 17 Aug 2021 21:43:37 +0800, John Garry wrote:
> Use scsi_cmd_to_rq(scsi_cmnd)->tag in preference to scsi_cmnd.tag.
>
>
>
>
Applied to 5.15/scsi-queue, thanks!
[1/1] scsi: ibmvfc: Stop using scsi_cmnd.tag
https://git.kernel.org/mkp/scsi/c/6a036ce0e25c
--
Martin K. Petersen Oracle Linux Engineering
^ permalink raw reply
* Re: [PATCH] powerpc/32: Don't use lmw/stmw for saving/restoring non volatile regs
From: Christophe Leroy @ 2021-08-24 5:54 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: Paul Mackerras, linuxppc-dev, linux-kernel
In-Reply-To: <20210823184648.GY1583@gate.crashing.org>
Le 23/08/2021 à 20:46, Segher Boessenkool a écrit :
> On Mon, Aug 23, 2021 at 03:29:12PM +0000, Christophe Leroy wrote:
>> Instructions lmw/stmw are interesting for functions that are rarely
>> used and not in the cache, because only one instruction is to be
>> copied into the instruction cache instead of 19. However those
>> instruction are less performant than 19x raw lwz/stw as they require
>> synchronisation plus one additional cycle.
>
> lmw takes N+2 cycles for loading N words on 603/604/750/7400, and N+3 on
> 7450. stmw takes N+1 cycles for storing N words on 603, N+2 on 604/750/
> 7400, and N+3 on 7450 (load latency is 3 instead of 2 on 7450).
>
> There is no synchronisation needed, although there is some serialisation,
> which of course doesn't mean much since there can be only 6 or 8 or so
> insns executing at once anyway.
Yes I meant serialisation, isn't it the same as synchronisation ?
>
> So, these insns are almost never slower, they can easily win cycles back
> because of the smaller code, too.
>
> What 32-bit core do you see where load/store multiple are more than a
> fraction of a cycle (per memory access) slower?
>
>> SAVE_NVGPRS / REST_NVGPRS are used in only a few places which are
>> mostly in interrupts entries/exits and in task switch so they are
>> likely already in the cache.
>
> Nothing is likely in the cache on the older cores (except in
> microbenchmarks), the caches are not big enough for that!
Even syscall entries/exit pathes and/or most frequent interrupts entries and interrupt exit ?
>
>> Using standard lwz improves null_syscall selftest by:
>> - 10 cycles on mpc832x.
>> - 2 cycles on mpc8xx.
>
> And in real benchmarks?
Don't know, what benchmark should I use to evaluate syscall entry/exit if 'null_syscall' selftest is
not relevant ?
>
> On mpccore both lmw and stmw are only N+1 btw. But the serialization
> might cost another cycle here?
>
That coherent on MPC8xx, that's only 2 cycles.
But on the mpc832x which has a e300c2 core, it looks like I have 10 cycles difference. Is anything
wrong ?
Christophe
^ permalink raw reply
* Re: linux-next: build warning after merge of the powerpc tree
From: Aneesh Kumar K.V @ 2021-08-24 5:18 UTC (permalink / raw)
To: Stephen Rothwell, Michael Ellerman, PowerPC
Cc: Daniel Henrique Barboza, Linux Next Mailing List,
Linux Kernel Mailing List, Jonathan Corbet
In-Reply-To: <20210823204803.7cb76778@canb.auug.org.au>
Stephen Rothwell <sfr@canb.auug.org.au> writes:
> Hi all,
>
> [cc'ing Jon in case he can fix the sphix hang - or knows anything about it]
>
> On Mon, 23 Aug 2021 19:55:40 +1000 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>>
>> After merging the powerpc tree, today's linux-next build (htmldocs)
>> produced this warning:
>>
>
> I missed a line:
>
> Sphinx parallel build error:
>
>> docutils.utils.SystemMessage: Documentation/powerpc/associativity.rst:1: (SEVERE/4) Title overline & underline mismatch.
>>
>> ============================
>> NUMA resource associativity
>> =============================
>>
>> Introduced by commit
>>
>> 1c6b5a7e7405 ("powerpc/pseries: Add support for FORM2 associativity")
>>
>> There are other obvious problems with this document (but sphinx seems
>> to have hung before it reported them).
>>
>> Like
>>
>> Form 0
>> -----
>>
>> and
>>
>> Form 1
>> -----
>>
>> and
>>
>> Form 2
>> -------
>
> I also get the following warning:
>
> Documentation/powerpc/associativity.rst: WARNING: document isn't included in any toctree
>
> And applying the following patch is enough to allow sphinx to finish
> (rather than livelocking):
>
> diff --git a/Documentation/powerpc/associativity.rst b/Documentation/powerpc/associativity.rst
> index 07e7dd3d6c87..b77c6ccbd6cb 100644
> --- a/Documentation/powerpc/associativity.rst
> +++ b/Documentation/powerpc/associativity.rst
> @@ -1,6 +1,6 @@
> -============================
> +===========================
> NUMA resource associativity
> -=============================
> +===========================
>
> Associativity represents the groupings of the various platform resources into
> domains of substantially similar mean performance relative to resources outside
> @@ -20,11 +20,11 @@ A value of 1 indicates the usage of Form 1 associativity. For Form 2 associativi
> bit 2 of byte 5 in the "ibm,architecture-vec-5" property is used.
>
> Form 0
> ------
> +------
> Form 0 associativity supports only two NUMA distances (LOCAL and REMOTE).
>
> Form 1
> ------
> +------
> With Form 1 a combination of ibm,associativity-reference-points, and ibm,associativity
> device tree properties are used to determine the NUMA distance between resource groups/domains.
>
> @@ -45,7 +45,7 @@ level of the resource group, the kernel doubles the NUMA distance between the
> comparing domains.
>
> Form 2
> --------
> +------
> Form 2 associativity format adds separate device tree properties representing NUMA node distance
> thereby making the node distance computation flexible. Form 2 also allows flexible primary
> domain numbering. With numa distance computation now detached from the index value in
Thanks for looking into this. I guess we also need to format the below table?
| 0 8 40
--|------------
|
0 | 10 20 80
|
8 | 20 10 160
|
40| 80 160 10
I don't know how to represent that in the documentation file. A table is
probably not the right one?
-aneesh
^ permalink raw reply
* [PATCH linux-next] selftests/powerpc: remove duplicate include
From: CGEL @ 2021-08-24 3:05 UTC (permalink / raw)
To: Michael Ellerman
Cc: Zeal Robot, linuxppc-dev, linux-kernel, Paul Mackerras,
linux-kselftest, Changcheng Deng, Shuah Khan
From: Changcheng Deng <deng.changcheng@zte.com.cn>
Clean up the following includecheck warning:
./tools/testing/selftests/powerpc/tm/tm-poison.c: inttypes.h is included
more than once.
No functional change.
Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Changcheng Deng <deng.changcheng@zte.com.cn>
---
tools/testing/selftests/powerpc/tm/tm-poison.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/testing/selftests/powerpc/tm/tm-poison.c b/tools/testing/selftests/powerpc/tm/tm-poison.c
index 29e5f26..27c083a 100644
--- a/tools/testing/selftests/powerpc/tm/tm-poison.c
+++ b/tools/testing/selftests/powerpc/tm/tm-poison.c
@@ -20,7 +20,6 @@
#include <sched.h>
#include <sys/types.h>
#include <signal.h>
-#include <inttypes.h>
#include "tm.h"
--
1.8.3.1
^ permalink raw reply related
* Re: [PATCH v2 5/5] KVM: selftests: Remove __NR_userfaultfd syscall fallback
From: Ben Gardon @ 2021-08-23 23:46 UTC (permalink / raw)
To: Sean Christopherson
Cc: kvm, Peter Zijlstra, Catalin Marinas, LKML, Will Deacon, Guo Ren,
linux-kselftest, Shuah Khan, Paul Mackerras, linux-s390,
Shakeel Butt, Vasily Gorbik, Russell King, linux-csky,
Christian Borntraeger, Ingo Molnar, linux-mips, Boqun Feng,
Paul E. McKenney, Heiko Carstens, Steven Rostedt,
Mathieu Desnoyers, Andy Lutomirski, Thomas Gleixner, Peter Foley,
linux-arm-kernel, Thomas Bogendoerfer, Oleg Nesterov,
Paolo Bonzini, linuxppc-dev
In-Reply-To: <20210820225002.310652-6-seanjc@google.com>
On Fri, Aug 20, 2021 at 3:50 PM Sean Christopherson <seanjc@google.com> wrote:
>
> Revert the __NR_userfaultfd syscall fallback added for KVM selftests now
> that x86's unistd_{32,63}.h overrides are under uapi/ and thus not in
> KVM sefltests' search path, i.e. now that KVM gets x86 syscall numbers
> from the installed kernel headers.
>
> No functional change intended.
>
> Cc: Ben Gardon <bgardon@google.com>
> Signed-off-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: Ben Gardon <bgardon@google.com>
> ---
> tools/arch/x86/include/uapi/asm/unistd_64.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/tools/arch/x86/include/uapi/asm/unistd_64.h b/tools/arch/x86/include/uapi/asm/unistd_64.h
> index 4205ed4158bf..cb52a3a8b8fc 100644
> --- a/tools/arch/x86/include/uapi/asm/unistd_64.h
> +++ b/tools/arch/x86/include/uapi/asm/unistd_64.h
> @@ -1,7 +1,4 @@
> /* SPDX-License-Identifier: GPL-2.0 */
> -#ifndef __NR_userfaultfd
> -#define __NR_userfaultfd 282
> -#endif
> #ifndef __NR_perf_event_open
> # define __NR_perf_event_open 298
> #endif
> --
> 2.33.0.rc2.250.ged5fa647cd-goog
>
^ permalink raw reply
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