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Mon, 02 Nov 2026 03:13:35 -0800 (PST) Received: from pve-server ([49.205.216.49]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a42902649sm42099651eec.11.2026.11.02.03.13.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Nov 2026 03:13:35 -0800 (PST) From: Ritesh Harjani (IBM) To: Gautam Menghani , maddy@linux.ibm.com, npiggin@gmail.com, mpe@ellerman.id.au, chleroy@kernel.org, sshegde@linux.ibm.com Cc: linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Timothy Pearson Subject: Re: [PATCH v5] KVM: PPC: Book3S HV: Avoid spurious interrupts caused by LPCR_MER bit In-Reply-To: <20261102091700.253381-1-gautam@linux.ibm.com> Date: Mon, 02 Nov 2026 16:42:12 +0530 Message-ID: References: <20261102091700.253381-1-gautam@linux.ibm.com> X-Spam-Status: No, score=-7.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI, SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , Precedence: list X-Archived-By: Gautam Menghani writes: > A huge number of spurious interrupts can be seen immediately after a KVM > on PowerNV guest boots up in XIVE mode. > > $ cat /proc/interrupts | grep SPU > SPU: 223705 192439 273526 147623 Spurious interrupts > > This bug was introduced by commit ecd10702baae5 ("KVM: PPC: Book3S HV: > Handle pending exceptions on guest entry with MSR_EE"). The root cause > is that once LPCR_MER bit is set, it is supposed to be reset by > software. But when a vCPU starts running with LPCR_MER set, the vCPU does > not exit back to the host until the decrementer expires or there is an > hcall, etc. This is because KVM on PowerNV guests have support for > native XIVE, so they are not dependent on host for interrupt emulation. > Due to this behaviour, a huge number of spurious interrupts are seen > since LPCR_MER continues to be set and LPCR_MER cannot be reset until the > vCPU exits to the host. > > Fix this behaviour by not using the LPCR_MER bit whenever native XIVE is > available (currently in case of KVM on PowerNV only), as the XIVE hardware > can present interrupts to the KVM guest vCPU directly. So the LPCR_MER > functionality is not required. This reduces the number of spurious > interrupts drastically. > > Fixes: ecd10702baae5 ("KVM: PPC: Book3S HV: Handle pending exceptions on guest entry with MSR_EE") > Cc: stable@vger.kernel.org # 6.8+ > Reported-by: Timothy Pearson > Closes: https://lore.kernel.org/linuxppc-dev/582904882.11159.1786719390349.JavaMail.zimbra@raptorengineeringinc.com > Signed-off-by: Gautam Menghani > --- > v5: > 1. Drop the redundant check for the presence of the native XIVE > device. (Ritesh) > Thanks Gautam for confirming that. The patch looks good to me. Feel free to add: Reviewed-by: Ritesh Harjani (IBM)