* [PATCH] arm64: Fix double TCR_T0SZ_OFFSET shift [not found] <CGME20240402104955epcas1p3dd15334a1305b99f3e1b82000e3c7c42@epcas1p3.samsung.com> @ 2024-04-02 10:49 ` Seongsu Park 2024-04-02 11:58 ` Will Deacon 0 siblings, 1 reply; 5+ messages in thread From: Seongsu Park @ 2024-04-02 10:49 UTC (permalink / raw) To: catalin.marinas, will, ardb, mark.rutland Cc: linux-arm-kernel, linux-kernel, sgsu.park, Leem ChaeHoon, Gyeonggeon Choi, Soomin Cho, DaeRo Lee, kmasta We have already shifted the value of t0sz in TCR_T0SZ by TCR_T0SZ_OFFSET. So, the TCR_T0SZ_OFFSET shift here should be removed. Co-developed-by: Leem ChaeHoon <infinite.run@gmail.com> Signed-off-by: Leem ChaeHoon <infinite.run@gmail.com> Co-developed-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> Signed-off-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> Co-developed-by: Soomin Cho <to.soomin@gmail.com> Signed-off-by: Soomin Cho <to.soomin@gmail.com> Co-developed-by: DaeRo Lee <skseofh@gmail.com> Signed-off-by: DaeRo Lee <skseofh@gmail.com> Co-developed-by: kmasta <kmasta.study@gmail.com> Signed-off-by: kmasta <kmasta.study@gmail.com> Signed-off-by: Seongsu Park <sgsu.park@samsung.com> --- arch/arm64/include/asm/mmu_context.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index c768d16b81a4..58de99836d2e 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -76,7 +76,7 @@ static inline void __cpu_set_tcr_t0sz(unsigned long t0sz) return; tcr &= ~TCR_T0SZ_MASK; - tcr |= t0sz << TCR_T0SZ_OFFSET; + tcr |= t0sz; write_sysreg(tcr, tcr_el1); isb(); } -- 2.34.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: Fix double TCR_T0SZ_OFFSET shift 2024-04-02 10:49 ` [PATCH] arm64: Fix double TCR_T0SZ_OFFSET shift Seongsu Park @ 2024-04-02 11:58 ` Will Deacon 2024-04-03 2:08 ` Seongsu Park 0 siblings, 1 reply; 5+ messages in thread From: Will Deacon @ 2024-04-02 11:58 UTC (permalink / raw) To: Seongsu Park Cc: catalin.marinas, ardb, mark.rutland, linux-arm-kernel, linux-kernel, Leem ChaeHoon, Gyeonggeon Choi, Soomin Cho, DaeRo Lee, kmasta On Tue, Apr 02, 2024 at 07:49:50PM +0900, Seongsu Park wrote: > We have already shifted the value of t0sz in TCR_T0SZ by TCR_T0SZ_OFFSET. > So, the TCR_T0SZ_OFFSET shift here should be removed. > > Co-developed-by: Leem ChaeHoon <infinite.run@gmail.com> > Signed-off-by: Leem ChaeHoon <infinite.run@gmail.com> > Co-developed-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> > Signed-off-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> > Co-developed-by: Soomin Cho <to.soomin@gmail.com> > Signed-off-by: Soomin Cho <to.soomin@gmail.com> > Co-developed-by: DaeRo Lee <skseofh@gmail.com> > Signed-off-by: DaeRo Lee <skseofh@gmail.com> > Co-developed-by: kmasta <kmasta.study@gmail.com> > Signed-off-by: kmasta <kmasta.study@gmail.com> > Signed-off-by: Seongsu Park <sgsu.park@samsung.com> heh, that's quite a lot of people. Did you remove three chars each? :p > --- > arch/arm64/include/asm/mmu_context.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h > index c768d16b81a4..58de99836d2e 100644 > --- a/arch/arm64/include/asm/mmu_context.h > +++ b/arch/arm64/include/asm/mmu_context.h > @@ -76,7 +76,7 @@ static inline void __cpu_set_tcr_t0sz(unsigned long t0sz) > return; > > tcr &= ~TCR_T0SZ_MASK; > - tcr |= t0sz << TCR_T0SZ_OFFSET; > + tcr |= t0sz; Thankfully, TCR_T0SZ_OFFSET is 0 so this isn't as alarming as it looks. Even so, if we're going to make the code consistent, then shouldn't the earlier conditional be updated too? if ((tcr & TCR_T0SZ_MASK) >> TCR_T0SZ_OFFSET == t0sz) return; seems to assume that t0sz is unshifted. Will ^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH] arm64: Fix double TCR_T0SZ_OFFSET shift 2024-04-02 11:58 ` Will Deacon @ 2024-04-03 2:08 ` Seongsu Park 0 siblings, 0 replies; 5+ messages in thread From: Seongsu Park @ 2024-04-03 2:08 UTC (permalink / raw) To: 'Will Deacon' Cc: catalin.marinas, ardb, mark.rutland, linux-arm-kernel, linux-kernel, 'Leem ChaeHoon', 'Gyeonggeon Choi', 'Soomin Cho', 'DaeRo Lee', 'kmasta' > On Tue, Apr 02, 2024 at 07:49:50PM +0900, Seongsu Park wrote: > > We have already shifted the value of t0sz in TCR_T0SZ by TCR_T0SZ_OFFSET. > > So, the TCR_T0SZ_OFFSET shift here should be removed. > > > > Co-developed-by: Leem ChaeHoon <infinite.run@gmail.com> > > Signed-off-by: Leem ChaeHoon <infinite.run@gmail.com> > > Co-developed-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> > > Signed-off-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> > > Co-developed-by: Soomin Cho <to.soomin@gmail.com> > > Signed-off-by: Soomin Cho <to.soomin@gmail.com> > > Co-developed-by: DaeRo Lee <skseofh@gmail.com> > > Signed-off-by: DaeRo Lee <skseofh@gmail.com> > > Co-developed-by: kmasta <kmasta.study@gmail.com> > > Signed-off-by: kmasta <kmasta.study@gmail.com> > > Signed-off-by: Seongsu Park <sgsu.park@samsung.com> > > heh, that's quite a lot of people. Did you remove three chars each? :p We are studying the Linux kernel based on arm64 together every Saturday for 7 hours! :) > > > --- > > arch/arm64/include/asm/mmu_context.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/arm64/include/asm/mmu_context.h > > b/arch/arm64/include/asm/mmu_context.h > > index c768d16b81a4..58de99836d2e 100644 > > --- a/arch/arm64/include/asm/mmu_context.h > > +++ b/arch/arm64/include/asm/mmu_context.h > > @@ -76,7 +76,7 @@ static inline void __cpu_set_tcr_t0sz(unsigned long > t0sz) > > return; > > > > tcr &= ~TCR_T0SZ_MASK; > > - tcr |= t0sz << TCR_T0SZ_OFFSET; > > + tcr |= t0sz; > > Thankfully, TCR_T0SZ_OFFSET is 0 so this isn't as alarming as it looks. > Even so, if we're going to make the code consistent, then shouldn't the > earlier conditional be updated too? > > if ((tcr & TCR_T0SZ_MASK) >> TCR_T0SZ_OFFSET == t0sz) > return; > > seems to assume that t0sz is unshifted. > > Will Thank you for feedback. I'll send v2 patch. ^ permalink raw reply [flat|nested] 5+ messages in thread
[parent not found: <CGME20240402104742epcas1p306e175348a3a7c1bdba9422ce22284f8@epcas1p3.samsung.com>]
* [PATCH] arm64: Fix double TCR_T0SZ_OFFSET shift [not found] <CGME20240402104742epcas1p306e175348a3a7c1bdba9422ce22284f8@epcas1p3.samsung.com> @ 2024-04-02 10:47 ` Seongsu Park 2024-04-05 14:10 ` Robin Murphy 0 siblings, 1 reply; 5+ messages in thread From: Seongsu Park @ 2024-04-02 10:47 UTC (permalink / raw) To: catalin.marinas, will, ardb, mark.rutland Cc: linux-arm-kernel, linux-kernel, sgsu.park, Leem ChaeHoon, Gyeonggeon Choi, Soomin Cho, DaeRo Lee, kmasta We have already shifted the value of t0sz in TCR_T0SZ by TCR_T0SZ_OFFSET. So, the TCR_T0SZ_OFFSET shift here should be removed. Co-developed-by: Leem ChaeHoon <infinite.run@gamil.com> Signed-off-by: Leem ChaeHoon <infinite.run@gamil.com> Co-developed-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> Signed-off-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> Co-developed-by: Soomin Cho <to.soomin@gmail.com> Signed-off-by: Soomin Cho <to.soomin@gmail.com> Co-developed-by: DaeRo Lee <skseofh@gmail.com> Signed-off-by: DaeRo Lee <skseofh@gmail.com> Co-developed-by: kmasta <kmasta.study@gmail.com> Signed-off-by: kmasta <kmasta.study@gmail.com> Signed-off-by: Seongsu Park <sgsu.park@samsung.com> --- arch/arm64/include/asm/mmu_context.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index c768d16b81a4..58de99836d2e 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -76,7 +76,7 @@ static inline void __cpu_set_tcr_t0sz(unsigned long t0sz) return; tcr &= ~TCR_T0SZ_MASK; - tcr |= t0sz << TCR_T0SZ_OFFSET; + tcr |= t0sz; write_sysreg(tcr, tcr_el1); isb(); } -- 2.34.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: Fix double TCR_T0SZ_OFFSET shift 2024-04-02 10:47 ` Seongsu Park @ 2024-04-05 14:10 ` Robin Murphy 0 siblings, 0 replies; 5+ messages in thread From: Robin Murphy @ 2024-04-05 14:10 UTC (permalink / raw) To: Seongsu Park, catalin.marinas, will, ardb, mark.rutland Cc: linux-arm-kernel, linux-kernel, Leem ChaeHoon, Gyeonggeon Choi, Soomin Cho, DaeRo Lee, kmasta On 2024-04-02 11:47 am, Seongsu Park wrote: > We have already shifted the value of t0sz in TCR_T0SZ by TCR_T0SZ_OFFSET. > So, the TCR_T0SZ_OFFSET shift here should be removed. If the shift for assigning the t0sz value to the TCR field is wrong, then the other shift for comparing the same t0sz value to the existing TCR field must also be wrong. Really, this many people involved in writing a patch and still nobody spotted the obvious? Thanks, Robin. > Co-developed-by: Leem ChaeHoon <infinite.run@gamil.com> > Signed-off-by: Leem ChaeHoon <infinite.run@gamil.com> > Co-developed-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> > Signed-off-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> > Co-developed-by: Soomin Cho <to.soomin@gmail.com> > Signed-off-by: Soomin Cho <to.soomin@gmail.com> > Co-developed-by: DaeRo Lee <skseofh@gmail.com> > Signed-off-by: DaeRo Lee <skseofh@gmail.com> > Co-developed-by: kmasta <kmasta.study@gmail.com> > Signed-off-by: kmasta <kmasta.study@gmail.com> > Signed-off-by: Seongsu Park <sgsu.park@samsung.com> > --- > arch/arm64/include/asm/mmu_context.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h > index c768d16b81a4..58de99836d2e 100644 > --- a/arch/arm64/include/asm/mmu_context.h > +++ b/arch/arm64/include/asm/mmu_context.h > @@ -76,7 +76,7 @@ static inline void __cpu_set_tcr_t0sz(unsigned long t0sz) > return; > > tcr &= ~TCR_T0SZ_MASK; > - tcr |= t0sz << TCR_T0SZ_OFFSET; > + tcr |= t0sz; > write_sysreg(tcr, tcr_el1); > isb(); > } ^ permalink raw reply [flat|nested] 5+ messages in thread
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[not found] <CGME20240402104955epcas1p3dd15334a1305b99f3e1b82000e3c7c42@epcas1p3.samsung.com>
2024-04-02 10:49 ` [PATCH] arm64: Fix double TCR_T0SZ_OFFSET shift Seongsu Park
2024-04-02 11:58 ` Will Deacon
2024-04-03 2:08 ` Seongsu Park
[not found] <CGME20240402104742epcas1p306e175348a3a7c1bdba9422ce22284f8@epcas1p3.samsung.com>
2024-04-02 10:47 ` Seongsu Park
2024-04-05 14:10 ` Robin Murphy
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