From: Jingoo Han <jg1.han@samsung.com>
To: "'Kishon Vijay Abraham I'" <kishon@ti.com>
Cc: "'Bjorn Helgaas'" <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
"'Kukjin Kim'" <kgene.kim@samsung.com>,
"'Pratyush Anand'" <pratyush.anand@st.com>,
"'Mohit KUMAR'" <Mohit.KUMAR@st.com>,
"'Arnd Bergmann'" <arnd@arndb.de>,
"'Sean Cross'" <xobs@kosagi.com>,
"'SRIKANTH TUMKUR SHIVANAND'" <ts.srikanth@samsung.com>,
linux-kernel@vger.kernel.org, Jingoo Han <jg1.han@samsung.com>
Subject: Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part
Date: Thu, 11 Jul 2013 10:36:55 +0900 [thread overview]
Message-ID: <000b01ce7dd7$20be5bf0$623b13d0$@samsung.com> (raw)
In-Reply-To: <51DD695C.6060209@ti.com>
On Wednesday, July 10, 2013 11:02 PM, Kishon Vijay Abraham I:
> On Friday 05 July 2013 01:59 PM, Jingoo Han wrote:
> > Exynos PCIe IP consists of Synopsys specific part and Exynos
> > specific part. Only core block is a Synopsys designware part;
> > other parts are Exynos specific.
> > Also, the Synopsys designware part can be shared with other
> > platforms; thus, it can be split two parts such as Synopsys
> > designware part and Exynos specific part.
>
> Thanks for doing that :-)
>
> I'll be using the synopsys specific part as Jacinto6 also uses the same pcie
> core. Once I start implementing, I'll have some queries and comments ;-)
Hi Kishon,
OK, I see.
I will send v2 patch.
Also, I will be CC'ing you. :)
Best regards,
Jingoo Han
prev parent reply other threads:[~2013-07-11 1:37 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-05 8:29 [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part Jingoo Han
2013-07-05 10:44 ` Pratyush Anand
2013-07-08 5:06 ` Jingoo Han
2013-07-08 5:13 ` Jingoo Han
2013-07-08 6:55 ` Jingoo Han
2013-07-05 10:45 ` Arnd Bergmann
2013-07-09 1:13 ` Jingoo Han
2013-07-10 14:02 ` Kishon Vijay Abraham I
2013-07-11 1:36 ` Jingoo Han [this message]
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