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Mon, 29 Sep 2025 06:48:09 +0000 (GMT) From: "Alim Akhtar" To: "'Pritam Manohar Sutar'" , , , , , , , , , , , , Cc: , , , , , , , , , In-Reply-To: <20250903073827.3015662-5-pritam.sutar@samsung.com> Subject: RE: [PATCH v8 4/6] phy: exynos5-usbdrd: support HS combo phy for ExynosAutov920 Date: Mon, 29 Sep 2025 12:18:07 +0530 Message-ID: <001601dc310d$069ef990$13dcecb0$@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQIRMOVGdWg5oRjNsRBgEjzIeIB8IgFajeyMAXpI9yS0KRFjsA== Content-Language: en-us X-CMS-MailID: 20250929064813epcas5p4c9eabc364711d3c2948e1d42e986a135 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250903072946epcas5p371f7d0e15d8757f738c08f80a8eefb60 References: <20250903073827.3015662-1-pritam.sutar@samsung.com> <20250903073827.3015662-5-pritam.sutar@samsung.com> Hi Pritam > -----Original Message----- > From: Pritam Manohar Sutar > Sent: Wednesday, September 3, 2025 1:08 PM > To: vkoul@kernel.org; kishon@kernel.org; robh@kernel.org; > krzk+dt@kernel.org; conor+dt@kernel.org; alim.akhtar@samsung.com; > andre.draszik@linaro.org; peter.griffin@linaro.org; kauschluss@disroot.org; > ivo.ivanov.ivanov1@gmail.com; igor.belwon@mentallysanemainliners.org; > m.szyprowski@samsung.com; s.nawrocki@samsung.com; > pritam.sutar@samsung.com > Cc: linux-phy@lists.infradead.org; devicetree@vger.kernel.org; linux- > kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- > samsung-soc@vger.kernel.org; rosa.pila@samsung.com; > dev.tailor@samsung.com; faraz.ata@samsung.com; > muhammed.ali@samsung.com; selvarasu.g@samsung.com > Subject: [PATCH v8 4/6] phy: exynos5-usbdrd: support HS combo phy for > ExynosAutov920 > > Support UTMI+ combo phy for this SoC which is somewhat simmilar to what > the existing Exynos850 support does. The difference is that some register > offsets and bit fields are defferent from Exynos850. > > Add required change in phy driver to support combo HS phy for this SoC. > > Signed-off-by: Pritam Manohar Sutar > --- Thanks! Reviewed-by: Alim Akhtar