From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98DF0C433E0 for ; Tue, 26 May 2020 06:53:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7391E20776 for ; Tue, 26 May 2020 06:53:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731015AbgEZGxW (ORCPT ); Tue, 26 May 2020 02:53:22 -0400 Received: from emcscan.emc.com.tw ([192.72.220.5]:62936 "EHLO emcscan.emc.com.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726873AbgEZGxW (ORCPT ); Tue, 26 May 2020 02:53:22 -0400 X-IronPort-AV: E=Sophos;i="5.56,253,1539619200"; d="scan'208";a="35739056" Received: from unknown (HELO webmail.emc.com.tw) ([192.168.10.1]) by emcscan.emc.com.tw with ESMTP; 26 May 2020 14:53:18 +0800 Received: from 192.168.10.23 by webmail.emc.com.tw with MailAudit ESMTP Server V5.0(20967:0:AUTH_RELAY) (envelope-from ); Tue, 26 May 2020 14:53:18 +0800 (CST) Received: from 192.168.33.11 by webmail.emc.com.tw with Mail2000 ESMTP Server V7.00(2484:0:AUTH_RELAY) (envelope-from ); Tue, 26 May 2020 14:53:16 +0800 (CST) From: "jingle" To: "'Dmitry Torokhov'" Cc: , , , , References: <20200526022246.4542-1-jingle.wu@emc.com.tw> <20200526041719.GH89269@dtor-ws> In-Reply-To: <20200526041719.GH89269@dtor-ws> Subject: RE: [PATCH] Input: elantech - Remove read/write registers in attr. Date: Tue, 26 May 2020 14:53:15 +0800 Message-ID: <001701d6332a$54ebc970$fec35c50$@emc.com.tw> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Mailer: Microsoft Outlook 14.0 thread-index: AQJkLPP72s3DFgLZomzEGNYQSBUd1gGlmuz5p5DNyNA= Content-Language: zh-tw x-dg-ref: PG1ldGE+PGF0IG5tPSJib2R5LnR4dCIgcD0iYzpcdXNlcnNcMDYwMTFcYXBwZGF0YVxyb2FtaW5nXDA5ZDg0OWI2LTMyZDMtNGE0MC04NWVlLTZiODRiYTI5ZTM1Ylxtc2dzXG1zZy05MjgyY2JmMi05ZjFkLTExZWEtODRlNy1mMDc5NTk2OWU3NWVcYW1lLXRlc3RcOTI4MmNiZjQtOWYxZC0xMWVhLTg0ZTctZjA3OTU5NjllNzVlYm9keS50eHQiIHN6PSI4MzkiIHQ9IjEzMjM0OTQ5NTk1OTI5MDgzNCIgaD0ib3RDQzJqWjlMUTZzMGFZWHQ1Q2ZNVkdvdGVFPSIgaWQ9IiIgYmw9IjAiIGJvPSIxIi8+PC9tZXRhPg== x-dg-rorf: true Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org HI Dmitry: These changes would not affect all the behavior of the old IC, including all the TP functions THANKS JINGLE -----Original Message----- From: Dmitry Torokhov [mailto:dmitry.torokhov@gmail.com] Sent: Tuesday, May 26, 2020 12:17 PM To: Jingle.Wu Cc: linux-kernel@vger.kernel.org; linux-input@vger.kernel.org; phoenix@emc.com.tw; dave.wang@emc.com.tw; josh.chen@emc.com.tw Subject: Re: [PATCH] Input: elantech - Remove read/write registers in attr. Hi Jingle, On Tue, May 26, 2020 at 10:22:46AM +0800, Jingle.Wu wrote: > New Elan IC would not be accessed with the specific regiters. What about older Elaan parts? We can't simply drop compatibility with older chips in newer kernels. Thanks. -- Dmitry