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From: Vineet Gupta <vgupta@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
	LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Anup Patel <apatel@ventanamicro.com>,
	Vineet Gupta <vgupta@kernel.org>, Brian Cain <bcain@quicinc.com>,
	Wei Liu <wei.liu@kernel.org>, Steve Wahl <steve.wahl@hpe.com>,
	Joerg Roedel <joro@8bytes.org>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	Juergen Gross <jgross@suse.com>
Subject: Re: [patch 1/5] ARC: Remove GENERIC_PENDING_IRQ
Date: Tue, 10 Dec 2024 09:22:08 -0800	[thread overview]
Message-ID: <00beef4c-fef7-4628-854a-f3da3ba90541@kernel.org> (raw)
In-Reply-To: <20241210103335.373392568@linutronix.de>

On 12/10/24 02:34, Thomas Gleixner wrote:
> Nothing uses the actual functionality and the MCIP controller sets the
> flags which disables the deferred affinity change. The other interrupt
> controller does not support affinity setting at all.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Cc: Vineet Gupta <vgupta@kernel.org>

Acked-by: Vineet Gupta <vgupta@kernel.org>   # arch/arc/

> ---
>  arch/arc/Kconfig       |    1 -
>  arch/arc/kernel/mcip.c |    2 --
>  kernel/irq/debugfs.c   |    1 +
>  3 files changed, 1 insertion(+), 3 deletions(-)
>
> --- a/arch/arc/Kconfig
> +++ b/arch/arc/Kconfig
> @@ -24,7 +24,6 @@ config ARC
>  	# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
>  	select GENERIC_IRQ_SHOW
>  	select GENERIC_PCI_IOMAP
> -	select GENERIC_PENDING_IRQ if SMP
>  	select GENERIC_SCHED_CLOCK
>  	select GENERIC_SMP_IDLE_THREAD
>  	select GENERIC_IOREMAP
> --- a/arch/arc/kernel/mcip.c
> +++ b/arch/arc/kernel/mcip.c
> @@ -357,8 +357,6 @@ static void idu_cascade_isr(struct irq_d
>  static int idu_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq)
>  {
>  	irq_set_chip_and_handler(virq, &idu_irq_chip, handle_level_irq);
> -	irq_set_status_flags(virq, IRQ_MOVE_PCNTXT);
> -
>  	return 0;
>  }
>  
> --- a/kernel/irq/debugfs.c
> +++ b/kernel/irq/debugfs.c
> @@ -53,6 +53,7 @@ static const struct irq_bit_descr irqchi
>  	BIT_MASK_DESCR(IRQCHIP_SUPPORTS_NMI),
>  	BIT_MASK_DESCR(IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND),
>  	BIT_MASK_DESCR(IRQCHIP_IMMUTABLE),
> +	BIT_MASK_DESCR(IRQCHIP_MOVE_DEFERRED),

I think this leaked in here, needs to be in patch 3/5

Cheers,
-Vineet

>  };
>  
>  static void
>


  reply	other threads:[~2024-12-10 17:22 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-10 10:34 [patch 0/5] genirq, x86: Rework deferred interrupt affinity logic Thomas Gleixner
2024-12-10 10:34 ` [patch 1/5] ARC: Remove GENERIC_PENDING_IRQ Thomas Gleixner
2024-12-10 17:22   ` Vineet Gupta [this message]
2024-12-10 22:52     ` Thomas Gleixner
2025-01-15 10:04   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-12-10 10:34 ` [patch 2/5] hexagon: Remove GENERIC_PENDING_IRQ leftover Thomas Gleixner
2024-12-10 15:06   ` Brian Cain
2025-01-15 10:04   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-12-10 10:34 ` [patch 3/5] genirq: Provide IRQCHIP_MOVE_DEFERRED Thomas Gleixner
2025-01-15 10:04   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-12-10 10:34 ` [patch 4/5] x86/apic: Convert to IRQCHIP_MOVE_DEFERRED Thomas Gleixner
2024-12-11 16:36   ` Steve Wahl
2024-12-17 19:33   ` Wei Liu
2025-01-15 10:04   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2025-01-15 20:47   ` tip-bot2 for Thomas Gleixner
2024-12-10 10:34 ` [patch 5/5] genirq: Remove IRQ_MOVE_PCNTXT and related code Thomas Gleixner
2025-01-15 10:04   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2025-01-15 20:47   ` tip-bot2 for Thomas Gleixner

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