Re: L2 cache detection in Celeron 2GHz (P4 based)

["Paul Rolland" <rol@as2917.net>]

Hello,

>  > You can also add that the L1 detection doesn't seem to be correct
>  > either : 
>  > 0K Instruction cache, and 8K data cache for L1... This is not much
>  > for instruction, it seems it should be 12K...
> 
> That should be fixed in recent 2.4s (and not-so-recent 2.5s).
> What version are you seeing this problem on?

Quite a recent one : 2.4.20.

Here are the traces :

bash-2.05$ dmesg | grep -i L1 
CPU: L1 I cache: 0K, L1 D cache: 8K
CPU: L1 I cache: 0K, L1 D cache: 8K
bash-2.05$ uname -a
Linux addx-01.PAR 2.4.20-watchdog #4 SMP Mon Mar 17 10:57:00 GMT 2003
i686 unknown

bash-2.05$ cat /proc/cpuinfo 
processor       : 0
vendor_id       : GenuineIntel
cpu family      : 15
model           : 2
model name      : Intel(R) Celeron(R) CPU 2.00GHz
stepping        : 7
cpu MHz         : 2000.356
cache size      : 8 KB
fdiv_bug        : no
hlt_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 2
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm
bogomips        : 3984.58

Regards,
Paul