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From: "sunyeal.hong" <sunyeal.hong@samsung.com>
To: "'Jaewon Kim'" <jaewon02.kim@samsung.com>,
	"'Krzysztof Kozlowski'" <krzk@kernel.org>,
	"'Sylwester Nawrocki'" <s.nawrocki@samsung.com>,
	"'Chanwoo Choi'" <cw00.choi@samsung.com>,
	"'Alim Akhtar'" <alim.akhtar@samsung.com>,
	"'Michael	Turquette'" <mturquette@baylibre.com>,
	"'Stephen Boyd'" <sboyd@kernel.org>
Cc: <linux-samsung-soc@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 1/5] dt-bindings: clock: add Exynos Auto v920 SoC CMU bindings
Date: Fri, 5 Jul 2024 18:55:34 +0900	[thread overview]
Message-ID: <01d601dacec1$7ae292d0$70a7b870$@samsung.com> (raw)
In-Reply-To: <c1891fb7-748b-62ad-a115-ee143fd05784@samsung.com>

Hello Jaewon,

> -----Original Message-----
> From: Jaewon Kim <jaewon02.kim@samsung.com>
> Sent: Friday, July 5, 2024 6:47 PM
> To: Sunyeal Hong <sunyeal.hong@samsung.com>; Krzysztof Kozlowski
> <krzk@kernel.org>; Sylwester Nawrocki <s.nawrocki@samsung.com>; Chanwoo
> Choi <cw00.choi@samsung.com>; Alim Akhtar <alim.akhtar@samsung.com>;
> Michael Turquette <mturquette@baylibre.com>; Stephen Boyd
> <sboyd@kernel.org>
> Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Subject: Re: [PATCH 1/5] dt-bindings: clock: add Exynos Auto v920 SoC CMU
> bindings
> 
> Hi Sunyeal,
> 
> 
> On 7/5/24 11:11, Sunyeal Hong wrote:
> > Add dt-schema for Exynos Auto v920 SoC clock controller.
> >
> > Signed-off-by: Sunyeal Hong <sunyeal.hong@samsung.com>
> > ---
> >   .../clock/samsung,exynosautov920-clock.yaml   | 115 ++++++++++++++++++
> >   1 file changed, 115 insertions(+)
> >   create mode 100644
> > Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.y
> > aml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock
> > .yaml
> > b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock
> > .yaml
> > new file mode 100644
> > index 000000000000..3e5e408c8336
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-c
> > +++ lock.yaml
> > @@ -0,0 +1,115 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +https://protect2.fireeye.com/v1/url?k=804ccde6-e1c7d8c9-804d46a9-74fe
> > +485cbfe7-c44fcfa897bd4340&q=1&e=65af0c33-026a-42d4-92cd-09b6c91c9bfb&
> > +u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fclock%2Fsamsung%2Cexynosaut
> > +ov920-clock.yaml%23
> > +$schema:
> > +https://protect2.fireeye.com/v1/url?k=8a40f68c-ebcbe3a3-8a417dc3-74fe
> > +485cbfe7-63f39e48f537ca7e&q=1&e=65af0c33-026a-42d4-92cd-09b6c91c9bfb&
> > +u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23
> > +
> > +title: Samsung Exynos Auto v920 SoC clock controller
> > +
> > +maintainers:
> > +  - Sunyeal Hong <sunyeal.hong@samsung.com>
> > +  - Chanwoo Choi <cw00.choi@samsung.com>
> > +  - Krzysztof Kozlowski <krzk@kernel.org>
> > +  - Sylwester Nawrocki <s.nawrocki@samsung.com>
> > +
> > +description: |
> > +  Exynos Auto v920 clock controller is comprised of several CMU
> > +units, generating
> > +  clocks for different domains. Those CMU units are modeled as
> > +separate device
> > +  tree nodes, and might depend on each other. Root clocks in that
> > +clock tree are
> > +  two external clocks:: OSCCLK/XTCXO (38.4 MHz) and RTCCLK/XrtcXTI
> (32768 Hz).
> > +  The external OSCCLK must be defined as fixed-rate clock in dts.
> > +
> > +  CMU_TOP is a top-level CMU, where all base clocks are prepared
> > + using PLLs and  dividers; all other clocks of function blocks (other
> > + CMUs) are usually  derived from CMU_TOP.
> > +
> > +  Each clock is assigned an identifier and client nodes can use this
> > + identifier  to specify the clock which they consume. All clocks
> > + available for usage  in clock consumer nodes are defined as
> > + preprocessor macros in  'include/dt-
> bindings/clock/samsung,exynosautov920.h' header.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - samsung,exynosautov920-cmu-top
> > +      - samsung,exynosautov920-cmu-peric0
> > +
> > +  clocks:
> > +    minItems: 1
> > +    maxItems: 3
> > +
> > +  clock-names:
> > +    minItems: 1
> > +    maxItems: 3
> > +
> > +  "#clock-cells":
> > +    const: 1
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +allOf:
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: samsung,exynosautov920-cmu-top
> > +
> > +    then:
> > +      properties:
> > +        clocks:
> > +          items:
> > +            - description: External reference clock (38.4 MHz)
> > +
> > +        clock-names:
> > +          items:
> > +            - const: oscclk
> > +
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: samsung,exynosautov920-cmu-peric0
> > +
> > +    then:
> > +      properties:
> > +        clocks:
> > +          items:
> > +            - description: External reference clock (38.4 MHz)
> > +            - description: CMU_PERIC0 NOC clock (from CMU_TOP)
> > +            - description: CMU_PERIC0 IP clock (from CMU_TOP)
> > +
> > +        clock-names:
> > +          items:
> > +            - const: oscclk
> > +            - const: dout_clkcmu_peric0_noc
> > +            - const: dout_clkcmu_peric0_ip
> > +
> > +required:
> > +  - compatible
> > +  - "#clock-cells"
> > +  - clocks
> > +  - clock-names
> > +  - reg
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  # Clock controller node for CMU_PERIC0
> > +  - |
> > +    #include <dt-bindings/clock/samsung,exynosautov920.h>
> > +
> > +    cmu_peric0: clock-controller@10800000 {
> > +        compatible = "samsung,exynosautov920-cmu-peric0";
> > +        reg = <0x10800000 0x8000>;
> > +        #clock-cells = <1>;
> > +
> > +        clocks = <&xtcxo>,
> > +                 <&cmu_top DOUT_CLKCMU_PERIC0_NOC>,
> > +                 <&cmu_top DOUT_CLKCMU_PERIC0_IP>;
> > +        clock-names = "oscclk",
> > +                      "dout_clkcmu_peric0_noc",
> > +                      "dout_clkcmu_peric0_ip";
> 
> There was a review with clock name.
> Please consider modifying the clock-name by referring to the review below.
> https://lore.kernel.org/linux-samsung-soc/20231220150726.GA223267-
> robh@kernel.org/
> 
> > +    };
> > +
> > +...
> 
> Thanks
> Jaewon Kim
> 

I checked the review you shared and will apply it to my patch.

Thanks,
Sunyeal Hong


  reply	other threads:[~2024-07-05  9:55 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20240705021114epcas2p4bad9380e73d2681aabc6074905e112ab@epcas2p4.samsung.com>
2024-07-05  2:11 ` [PATCH 0/5] initial clock support for exynosauto v920 SoC Sunyeal Hong
2024-07-05  2:11   ` [PATCH 1/5] dt-bindings: clock: add Exynos Auto v920 SoC CMU bindings Sunyeal Hong
2024-07-05  6:02     ` Krzysztof Kozlowski
2024-07-05  9:46     ` Jaewon Kim
2024-07-05  9:55       ` sunyeal.hong [this message]
2024-07-05  2:11   ` [PATCH 2/5] dt-bindings: clock: add clock binding definitions for Exynos Auto v920 Sunyeal Hong
2024-07-05  3:07     ` Jaewon Kim
2024-07-05  7:50       ` sunyeal.hong
2024-07-05  6:02     ` Krzysztof Kozlowski
2024-07-05  8:03       ` sunyeal.hong
2024-07-05  8:51         ` Krzysztof Kozlowski
2024-07-05  9:08           ` sunyeal.hong
2024-07-05  9:12             ` Krzysztof Kozlowski
2024-07-05  9:53               ` sunyeal.hong
2024-07-05  2:11   ` [PATCH 3/5] arm64: dts: exynos: add initial CMU clock nodes in " Sunyeal Hong
2024-07-05  4:41     ` Jaewon Kim
2024-07-05  7:52       ` sunyeal.hong
2024-07-05  2:11   ` [PATCH 4/5] clk: samsung: clk-pll: Add support for pll_531x Sunyeal Hong
2024-07-05  2:11   ` [PATCH 5/5] clk: samsung: add top clock support for Exynos Auto v920 SoC Sunyeal Hong
2024-07-05 19:51     ` kernel test robot
2024-07-05 21:46     ` kernel test robot

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