Re: [PATCHv3 16/17] x86/mm: Handle encrypted memory in page_to_virt() and __pa()

Dave Hansen
2018-06-13T18:43:12Z

> diff --git a/arch/x86/include/asm/mktme.h b/arch/x86/include/asm/mktme.h
> index efc0d4bb3b35..d6edcabacfc7 100644
> --- a/arch/x86/include/asm/mktme.h
> +++ b/arch/x86/include/asm/mktme.h
> @@ -43,6 +43,9 @@ void mktme_disable(void);
> void setup_direct_mapping_size(void);
> int sync_direct_mapping(void);
>
> +#define page_to_virt(x) \
> + (__va(PFN_PHYS(page_to_pfn(x))) + page_keyid(x) * direct_mapping_size)

This looks like a super important memory management function being
defined in some obscure Intel-specific feature header. How does that work?

> #else
> #define mktme_keyid_mask ((phys_addr_t)0)
> #define mktme_nr_keyids 0
> diff --git a/arch/x86/include/asm/page_64.h b/arch/x86/include/asm/page_64.h
> index 53c32af895ab..ffad496aadad 100644
> --- a/arch/x86/include/asm/page_64.h
> +++ b/arch/x86/include/asm/page_64.h
> @@ -23,7 +23,7 @@ static inline unsigned long __phys_addr_nodebug(unsigned long x)
> /* use the carry flag to determine if x was < __START_KERNEL_map */
> x = y + ((x > y) ? phys_base : (__START_KERNEL_map - PAGE_OFFSET));
>
> - return x;
> + return x % direct_mapping_size;
> }

What are the performance implications of this patch?