Re: [PATCH 1/2] drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification

[Quentin Schulz <quentin.schulz@cherry.de>]

Hi Andy,

On 11/14/24 1:50 AM, Andy Yan wrote:
> 
> Hi,
> 
> At 2024-05-06 15:44:36, "Quentin Schulz" <quentin.schulz@cherry.de> wrote:
>> Hi Heiko,
>>
>> On 4/25/24 9:55 PM, Heiko Stuebner wrote:
>>> From: Heiko Stuebner <heiko.stuebner@cherry.de>
>>>
>>> The clock is in Hz while the value checked against is in kHz, so
>>> actual frequencies will never be able to be below to max value.
>>> Fix this by specifying the max-value in Hz too.
>>>
>>> Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
>>> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
>>> ---
>>>    drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++--
>>>    1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>> index 9bee1fd88e6a2..523880a4e8e74 100644
>>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>> @@ -1719,7 +1719,7 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
>>>    		else
>>>    			dclk_out_rate = v_pixclk >> 2;
>>>    
>>> -		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
>>> +		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
>>>    		if (!dclk_rate) {
>>>    			drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld KHZ\n",
>>
>> It seems the error message is incorrect as well and should be saying Hz
>> instead of KHz. (note also the lowercase z).
> 
> I think kHz is fine, we can find many siminary usage in drm:
> 
> drivers/gpu/drm/drm_vblank.c
> 656:    drm_dbg_core(dev, "crtc %u: clock %d kHz framedur %d linedur %d\n",

The issue is that we print kHz for something that is in Hz, not that we 
print a value in kHz.

The former is incorrect, the latter is fine. We are in the former 
scenario here I believe, so it needs to be fixed.

Cheers,
Quentin