RE: [PATCH 2/3] mfd: Add initial S5M8751 support

[Sangbeom Kim <sbkim73@samsung.com>]

Hi,
Thanks for your kindly comment.

On Monday, July 04, 2011 11:08 PM +0900, Samuel Ortiz wrote:
> On Wed, Jun 22, 2011 at 02:53:56PM +0900, Sangbeom Kim wrote:
> > +#define SLEEPB_ENABLE		1
> > +#define SLEEPB_DISABLE		0
> > +
> > +static DEFINE_MUTEX(io_mutex);
> I would prefer to see your IO mutex defined from your s5m8751 structure.

Ok, I will make IO mutex in s5m8751 structure in the next version.
> 
> > +int s5m8751_clear_bits(struct s5m8751 *s5m8751, uint8_t reg, uint8_t
> mask)
> > +{
> > +	uint8_t reg_val;
> > +	int ret = 0;
> > +
> > +	ret = s5m8751_reg_read(s5m8751, reg, &reg_val);
> > +	if (ret)
> > +		return ret;
> > +
> > +	reg_val &= ~mask;
> > +	ret = s5m8751_reg_write(s5m8751, reg, reg_val);
> > +
> > +	return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(s5m8751_clear_bits);
> > +
> > +int s5m8751_set_bits(struct s5m8751 *s5m8751, uint8_t reg, uint8_t
mask)
> > +{
> > +	uint8_t reg_val;
> > +	int ret = 0;
> > +
> > +	ret = s5m8751_reg_read(s5m8751, reg, &reg_val);
> > +	if (ret)
> > +		return ret;
> > +
> > +	reg_val |= mask;
> > +	ret = s5m8751_reg_write(s5m8751, reg, reg_val);
> > +
> > +	return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(s5m8751_set_bits);
> Your locking for both of those routines is also racy. There's nothing
> preventing a writre to happen between your read and your write. They need
> to
> happen atomically, and for that you need to take the lonk in the clear/set
> bits routine.
Ok, I will add mutex_lock between read and write in the next version.
Sooner or later, I will submit new patches.

Thanks,
SB Kim