Re: [PATCH v19 00/15] EDAC: Scrub: introduce generic EDAC RAS control feature driver + CXL/ACPI-RAS2 drivers

Fan Ni
2025-02-11T18:44:03Z

On Tue, Feb 11, 2025 at 04:55:49PM +0000, Shiju Jose wrote:
> >-----Original Message-----
> >From: Fan Ni <nifan.cxl@gmail.com>
> >Sent: 10 February 2025 17:53
> >To: Shiju Jose <shiju.jose@huawei.com>
> >Cc: linux-edac@vger.kernel.org; linux-cxl@vger.kernel.org; linux-
> >acpi@vger.kernel.org; linux-mm@kvack.org; linux-kernel@vger.kernel.org;
> >linux-doc@vger.kernel.org; bp@alien8.de; tony.luck@intel.com;
> >rafael@kernel.org; lenb@kernel.org; mchehab@kernel.org;
> >dan.j.williams@intel.com; dave@stgolabs.net; Jonathan Cameron
> ><jonathan.cameron@huawei.com>; dave.jiang@intel.com;
> >alison.schofield@intel.com; vishal.l.verma@intel.com; ira.weiny@intel.com;
> >david@redhat.com; Vilas.Sridharan@amd.com; leo.duran@amd.com;
> >Yazen.Ghannam@amd.com; rientjes@google.com; jiaqiyan@google.com;
> >Jon.Grimm@amd.com; dave.hansen@linux.intel.com;
> >naoya.horiguchi@nec.com; james.morse@arm.com; jthoughton@google.com;
> >somasundaram.a@hpe.com; erdemaktas@google.com; pgonda@google.com;
> >duenwen@google.com; gthelen@google.com;
> >wschwartz@amperecomputing.com; dferguson@amperecomputing.com;
> >wbs@os.amperecomputing.com; nifan.cxl@gmail.com; tanxiaofei
> ><tanxiaofei@huawei.com>; Zengtao (B) <prime.zeng@hisilicon.com>; Roberto
> >Sassu <roberto.sassu@huawei.com>; kangkang.shen@futurewei.com;
> >wanghuiqiang <wanghuiqiang@huawei.com>; Linuxarm
> ><linuxarm@huawei.com>; a.manzanares@samsung.com;
> >nmtadam.samsung@gmail.com; anisa.su887@gmail.com
> >Subject: Re: [PATCH v19 00/15] EDAC: Scrub: introduce generic EDAC RAS
> >control feature driver + CXL/ACPI-RAS2 drivers
> >
> >On Fri, Feb 07, 2025 at 02:44:29PM +0000, shiju.jose@huawei.com wrote:
> >> From: Shiju Jose <shiju.jose@huawei.com>
> >>
> >> The CXL patches of this series has dependency on Dave's CXL fwctl
> >> series [1].
> >>
> >> The code is based on v3 of CXL fwctl series [1] posted by Dave and
> >> v3 of FWCTL series [2] posted by Jason and rebased on top of
> >> v6.14-rc1.
> >>
> >> [1]:
> >> https://lore.kernel.org/linux-cxl/20250204220430.4146187-1-dave.jiang@
> >> intel.com/
> >> [2]:
> >> https://lore.kernel.org/linux-cxl/0-v3-960f17f90f17+516-fwctl_jgg@nvid
> >> ia.com/#r
> >>
> >>
> >> Userspace code for CXL memory repair features [3] and sample
> >> boot-script for CXL memory repair [4].
> >>
> >> [3]:
> >> https://lore.kernel.org/lkml/20250207143028.1865-1-shiju.jose@huawei.c
> >> om/
> >> [4]:
> >> https://lore.kernel.org/lkml/20250207143028.1865-5-shiju.jose@huawei.c
> >> om/
> >>
> >
> >Hi Shiju,
> >Is this series the same as in branch
> >https://github.com/shijujose4/linux/tree/edac-enhancement-ras-features_v19?
> >
> >I hit some compile errors wen trying to test with the above branch directly.
> >
> >Here are two cases where I found the code cannot compile. Please check if it is a
> >false alarm.
> >
> >Case 1: CONFIG_CXL_RAS_FEATURES=m
...
> >
> >fan:~/cxl/linux-edac$ make -j16
> >mkdir -p /home/fan/cxl/linux-edac/tools/objtool && make
> >O=/home/fan/cxl/linux-edac subdir=tools/objtool --no-print-directory -C objtool
> > CALL scripts/checksyscalls.sh
> > INSTALL libsubcmd_headers
> > UPD include/generated/utsversion.h
> > CC init/version-timestamp.o
> > KSYMS .tmp_vmlinux0.kallsyms.S
> > AS .tmp_vmlinux0.kallsyms.o
> > LD .tmp_vmlinux1
> >ld: vmlinux.o: in function `cxl_region_probe':
> >/home/fan/cxl/linux-edac/drivers/cxl/core/region.c:3456:(.text+0x7b296f):
> >undefined reference to `devm_cxl_region_edac_register'
> >ld: vmlinux.o: in function `cxl_mem_probe':
> >/home/fan/cxl/linux-edac/drivers/cxl/mem.c:188:(.text+0x7b8ad1): undefined
> >reference to `devm_cxl_memdev_edac_register'
> >make[2]: *** [scripts/Makefile.vmlinux:77: vmlinux] Error 1
> >make[1]: *** [/home/fan/cxl/linux-edac/Makefile:1226: vmlinux] Error 2
> >make: *** [Makefile:251: __sub-make] Error 2
> >
> >When compile with CONFIG_CXL_RAS_FEATURES=y, it can compile.
> >
> Hi Fan,
>
> Thanks for checking this and reporting.
>
> This error is with CONFIG_CXL_RAS_FEATURES=m and CONFIG_CXL_BUS=y and CONFIG_CXL_MEM=y.
> Now changed CONFIG_CXL_RAS_FEATURES for tristate -> boolean as this implemented only interface functions
> for the CXL RAS features.
> >
> >CASE 2: CONFIG_EDAC=m
> >
...
> >fan:~/cxl/linux-edac$ make -j16
> >mkdir -p /home/fan/cxl/linux-edac/tools/objtool && make
> >O=/home/fan/cxl/linux-edac subdir=tools/objtool --no-print-directory -C objtool
> > CALL scripts/checksyscalls.sh
> > INSTALL libsubcmd_headers
> > UPD include/generated/utsversion.h
> > CC init/version-timestamp.o
> > KSYMS .tmp_vmlinux0.kallsyms.S
> > AS .tmp_vmlinux0.kallsyms.o
> > LD .tmp_vmlinux1
> >ld: vmlinux.o: in function `devm_cxl_region_edac_register':
> >/home/fan/cxl/linux-
> >edac/drivers/cxl/core/memfeature.c:1720:(.text+0x7b665d): undefined
> >reference to `edac_dev_register'
> >ld: vmlinux.o: in function `devm_cxl_memdev_edac_register':
> >/home/fan/cxl/linux-
> >edac/drivers/cxl/core/memfeature.c:1697:(.text+0x7b7241): undefined
> >reference to `edac_dev_register'
> >ld: vmlinux.o: in function `ras2_probe':
> >/home/fan/cxl/linux-edac/drivers/ras/acpi_ras2.c:363:(.text+0xb0ecc8):
> >undefined reference to `edac_dev_register'
> >make[2]: *** [scripts/Makefile.vmlinux:77: vmlinux] Error 1
> >make[1]: *** [/home/fan/cxl/linux-edac/Makefile:1226: vmlinux] Error 2
> >make: *** [Makefile:251: __sub-make] Error 2
> >
>
> Here the symbol 'edac_dev_register' can't find with CONFIG_CXL_BUS=y CONFIG_CXL_RAS_FEATURES=y and
> CONFIG_EDAC=m.
> Modified CXL_RAS_FEATURES depends on EDAC=y || (CXL_BUS=m && EDAC=m)
> to fix this.
Hi Shiju,
Did you mean the following fix?

diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig
index 77baef31cf3c..8615f329baa2 100644
--- a/drivers/cxl/Kconfig
+++ b/drivers/cxl/Kconfig
@@ -162,11 +162,12 @@ config CXL_REGION_INVALIDATION_TEST
say N.

config CXL_RAS_FEATURES
- tristate "CXL: Memory RAS features"
+ bool "CXL: Memory RAS features"
depends on CXL_MEM
depends on EDAC_SCRUB
depends on EDAC_ECS
depends on EDAC_MEM_REPAIR
+ depends on EDAC=y || (CXL_BUS=m && EDAC=m)
help
The CXL memory RAS feature control is optional and allows host to
control the RAS features configurations of CXL Type 3 devices.

With the fix, I still see the errors with following config.

fan:~/cxl/linux-edac$ cat .config | egrep "EDAC|CXL|RAS" | grep -v "^#"
CONFIG_ACPI_RAS2=y
CONFIG_ACPI_APEI_EINJ_CXL=y
CONFIG_PCIEAER_CXL=y
CONFIG_CXL_BUS=m
CONFIG_CXL_PCI=m
CONFIG_CXL_MEM_RAW_COMMANDS=y
CONFIG_CXL_ACPI=m
CONFIG_CXL_PMEM=m
CONFIG_CXL_MEM=m
CONFIG_CXL_FWCTL=y
CONFIG_CXL_PORT=m
CONFIG_CXL_SUSPEND=y
CONFIG_CXL_REGION=y
CONFIG_CXL_REGION_INVALIDATION_TEST=y
CONFIG_CXL_RAS_FEATURES=y
CONFIG_MMC_SDHCI_OF_ARASAN=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EDAC=m
CONFIG_EDAC_LEGACY_SYSFS=y
CONFIG_EDAC_DEBUG=y
CONFIG_EDAC_DECODE_MCE=m
CONFIG_EDAC_GHES=m
CONFIG_EDAC_SCRUB=y
CONFIG_EDAC_ECS=y
CONFIG_EDAC_MEM_REPAIR=y
CONFIG_EDAC_IGEN6=m
CONFIG_RAS=y
CONFIG_MEM_ACPI_RAS2=y
CONFIG_DEV_DAX_CXL=m

ld: vmlinux.o: in function `ras2_probe':
/home/fan/cxl/linux-edac/drivers/ras/acpi_ras2.c:363:(.text+0xaeb5c8): undefined reference to `edac_dev_register'
make[2]: *** [scripts/Makefile.vmlinux:77: vmlinux] Error 1
make[1]: *** [/home/fan/cxl/linux-edac/Makefile:1226: vmlinux] Error 2
make: *** [Makefile:251: __sub-make] Error 2

It seems ACPI_RAS2 depends on EDAC.
When changing CONFIG_EDAC=y, it compiles fine.

Fan

> >
> >
> >Fan
> >
> >
> Thanks,
> Shiju

--
Fan Ni