[PATCH] dt-bindings: arm: socfpga: Add Altera SOCFPGA SDRAM EDAS

Alessandro Zanni
2024-07-31T23:02:36Z

Added new yaml file that substitues the old txt file.

Signed-off-by: Alessandro Zanni <alessandro.zanni87@gmail.com>
---
.../arm/altera/socfpga-sdram-edac.txt | 15 ------
.../arm/altera/socfpga-sdram-edac.yaml | 46 +++++++++++++++++++
2 files changed, 46 insertions(+), 15 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
deleted file mode 100644
index f5ad0ff69fae..000000000000
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
-The EDAC accesses a range of registers in the SDRAM controller.
-
-Required properties:
-- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
-- altr,sdr-syscon : phandle of the sdr module
-- interrupts : Should contain the SDRAM ECC IRQ in the
- appropriate format for the IRQ controller.
-
-Example:
- sdramedac {
- compatible = "altr,sdram-edac";
- altr,sdr-syscon = <&sdr>;
- interrupts = <0 39 4>;
- };
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
new file mode 100644
index 000000000000..78fbe31e4a2b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
+
+maintainers:
+ - Dinh Nguyen <dinguyen@kernel.org>
+
+description:
+ The EDAC accesses a range of registers in the SDRAM controller.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - altr,sdram-edac
+ - altr,sdram-edac-a10
+
+ altr,sdr-syscon:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle of the sdr module
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - altr,sdr-syscon
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ sdramedac {
+ compatible = "altr,sdram-edac";
+ altr,sdr-syscon = <&sdr>;
+ interrupts = <0 39 4>;
+ };
+
+...
--
2.43.0