From: David Woodhouse <dwmw2@infradead.org>
To: Christoph Hellwig <hch@infradead.org>
Cc: virtio-comment@lists.linux.dev, mst@redhat.com,
"Claire Chang" <tientzu@chromium.org>,
linux-devicetree <devicetree@vger.kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Jörg Roedel" <joro@8bytes.org>,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
graf@amazon.de
Subject: Re: [RFC PATCH 1/3] content: Add VIRTIO_F_SWIOTLB to negotiate use of SWIOTLB bounce buffers
Date: Thu, 03 Apr 2025 09:06:37 +0100 [thread overview]
Message-ID: <05abb68286dd4bc17b243130d7982a334503095b.camel@infradead.org> (raw)
In-Reply-To: <Z-46TDmspmX0BJ2H@infradead.org>
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On Thu, 2025-04-03 at 00:35 -0700, Christoph Hellwig wrote:
> On Thu, Apr 03, 2025 at 08:28:19AM +0100, David Woodhouse wrote:
> > Linux has 'SWIOTLB' support, but I didn't see it as a term specific to
> > that particular implementation; it seemed like a concept would would be
> > understood elsewhere. But sure, I'm happy to rename it to just 'bounce
> > buffers' or something like that. I'll see what I can come up with that
> > is succinct enough to use in VIRTIO_F_xxx and VIRTIO_PCI_CAP_xxx names.
>
> I think you still miss the point.
>
> What you describing is either:
>
> 1) A BAR (or BAR-like region on MMIO) that can be used to stage
> indirect I/O
>
> and
>
> 2a) a device that doesn't have any DMA capabilities, but instead
> requires use for the above staging region
>
> and/or
>
> 2b) a system configuration where devices are prevented from accessing
> guest memory
>
> 1) makes perfect sense in virtio. It is the equivalent of the NVMe CMB
> and similar features on various devices.
>
> 2a) would make sense if we actually have such devices and not just
> system configs, which I doubt.
>
> 2b) is the job of ACPI or DT to communicate, not that of virtio
>
I am designing virtual systems, with the constraint in your (2b):
The virtual devices implemented in the *VMM* are prevented from
accessing guest memory. (Physical devices are actually fine because
there's a two-stage IOMMU which copes with those.)
I am describing the solution in your (1): Give them an on-device
bounce-buffer.
The implementation of (1) is to offer them a device which doesn't have
DMA capabilities (because *I* as the system designer know that it can't
use them). Which is your (2a).
You are right, in theory, that (2b) is the job of ACPI or DT to
communicate. But virtio is presented as just another PCI device,
indistinguishable by the guest from other PCI devices which *are*
actually able to do DMA through the hardware's two-stage IOMMU.
To my knowledge there isn't a clean way, across platforms, to tell an
operating system that a certain device just *can't* do DMA at all. And
even if there was, why offer a device model that could *theoretically*
do DMA, just to tell the guest through some other channel that it
can't?
What's wrong with a simple option to indicate, in the device model that
the system designer chooses to build for the guest, that it can't do
DMA?
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next prev parent reply other threads:[~2025-04-03 8:06 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-02 11:04 [RFC PATCH 0/3] Add Software IOTLB bounce buffer support David Woodhouse
2025-04-02 11:04 ` [RFC PATCH 1/3] content: Add VIRTIO_F_SWIOTLB to negotiate use of SWIOTLB bounce buffers David Woodhouse
2025-04-02 14:54 ` Michael S. Tsirkin
2025-04-02 15:12 ` David Woodhouse
2025-04-02 15:20 ` Michael S. Tsirkin
2025-04-02 15:47 ` David Woodhouse
2025-04-02 15:51 ` Michael S. Tsirkin
2025-04-02 16:16 ` David Woodhouse
2025-04-02 16:43 ` Michael S. Tsirkin
2025-04-02 17:10 ` David Woodhouse
2025-04-03 7:29 ` Christoph Hellwig
2025-04-03 7:37 ` David Woodhouse
2025-04-03 7:39 ` Christoph Hellwig
2025-04-03 7:43 ` Michael S. Tsirkin
2025-04-03 7:44 ` Christoph Hellwig
2025-04-03 8:10 ` David Woodhouse
2025-04-04 6:29 ` Christoph Hellwig
2025-04-04 6:39 ` David Woodhouse
2025-04-04 6:44 ` Christoph Hellwig
2025-04-04 6:45 ` Christoph Hellwig
2025-04-03 7:41 ` Michael S. Tsirkin
2025-04-03 7:31 ` Michael S. Tsirkin
2025-04-03 7:45 ` David Woodhouse
2025-04-03 8:06 ` Michael S. Tsirkin
2025-04-03 7:13 ` Zhu Lingshan
2025-04-03 7:24 ` David Woodhouse
2025-04-03 7:31 ` Zhu Lingshan
2025-04-04 10:27 ` David Woodhouse
2025-04-03 7:34 ` Michael S. Tsirkin
2025-04-03 7:54 ` David Woodhouse
2025-04-03 8:13 ` Michael S. Tsirkin
2025-04-03 8:22 ` David Woodhouse
2025-04-03 8:34 ` Zhu Lingshan
2025-04-03 8:57 ` David Woodhouse
2025-04-06 6:23 ` Zhu Lingshan
2025-04-03 13:19 ` Michael S. Tsirkin
2025-04-03 7:24 ` Christoph Hellwig
2025-04-03 7:28 ` David Woodhouse
2025-04-03 7:35 ` Christoph Hellwig
2025-04-03 8:06 ` David Woodhouse [this message]
2025-04-04 6:35 ` Christoph Hellwig
2025-04-04 7:50 ` David Woodhouse
2025-04-04 8:09 ` Michael S. Tsirkin
2025-04-04 8:16 ` David Woodhouse
2025-04-04 8:32 ` Michael S. Tsirkin
2025-04-04 9:27 ` David Woodhouse
2025-04-04 10:15 ` David Woodhouse
2025-04-04 10:37 ` Michael S. Tsirkin
2025-04-04 11:15 ` David Woodhouse
2025-04-06 18:28 ` Michael S. Tsirkin
2025-04-06 18:47 ` David Woodhouse
2025-04-07 7:30 ` Christoph Hellwig
2025-04-07 7:54 ` David Woodhouse
2025-04-07 9:05 ` Christoph Hellwig
2025-04-07 10:09 ` David Woodhouse
2025-04-07 14:06 ` Christoph Hellwig
2025-04-07 14:59 ` David Woodhouse
2025-04-07 12:14 ` Michael S. Tsirkin
2025-04-07 12:46 ` David Woodhouse
2025-04-07 7:26 ` Christoph Hellwig
2025-04-07 7:23 ` Christoph Hellwig
2025-04-07 7:19 ` Christoph Hellwig
2025-04-04 8:23 ` Christoph Hellwig
2025-04-04 9:39 ` David Woodhouse
2025-04-07 7:34 ` Christoph Hellwig
2025-04-07 9:40 ` David Woodhouse
2025-04-02 11:04 ` [RFC PATCH 2/3] transport-mmio: Document restricted-dma-pool SWIOTLB bounce buffer David Woodhouse
2025-04-02 11:04 ` [RFC PATCH 3/3] transport-pci: Add SWIOTLB bounce buffer capability David Woodhouse
2025-04-02 14:58 ` Michael S. Tsirkin
2025-04-02 15:21 ` David Woodhouse
2025-04-03 7:27 ` Michael S. Tsirkin
2025-04-03 7:36 ` Zhu Lingshan
2025-04-03 7:37 ` Michael S. Tsirkin
2025-04-03 8:12 ` Zhu Lingshan
2025-04-03 8:16 ` Michael S. Tsirkin
2025-04-03 8:37 ` Zhu Lingshan
2025-04-03 8:44 ` David Woodhouse
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