From: Wesley Cheng <wcheng@codeaurora.org>
To: Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
John Stultz <john.stultz@linaro.org>,
Felipe Balbi <balbi@kernel.org>
Cc: lkml <linux-kernel@vger.kernel.org>,
Yu Chen <chenyu56@huawei.com>,
Tejas Joglekar <Tejas.Joglekar@synopsys.com>,
Yang Fei <fei.yang@intel.com>,
YongQin Liu <yongqin.liu@linaro.org>,
Andrzej Pietrasiewicz <andrzej.p@collabora.com>,
Jun Li <lijun.kernel@gmail.com>,
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Linux USB List <linux-usb@vger.kernel.org>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>,
Roger Quadros <rogerq@ti.com>
Subject: Re: [PATCH v3 1/2] usb: dwc3: Trigger a GCTL soft reset when switching modes in DRD
Date: Sat, 6 Mar 2021 01:04:01 -0800 [thread overview]
Message-ID: <06a44245-4f2f-69ba-fe46-b88a19f585c2@codeaurora.org> (raw)
In-Reply-To: <d95d0971-624e-a0e6-ac72-6ee3b1fb1106@synopsys.com>
On 1/8/2021 4:44 PM, Thinh Nguyen wrote:
> Hi,
>
> John Stultz wrote:
>> On Fri, Jan 8, 2021 at 4:26 AM Felipe Balbi <balbi@kernel.org> wrote:
>>>
>>> Hi,
>>>
>>> John Stultz <john.stultz@linaro.org> writes:
>>>> From: Yu Chen <chenyu56@huawei.com>
>>>>
>>>> Just resending this, as discussion died out a bit and I'm not
>>>> sure how to make further progress. See here for debug data that
>>>> was requested last time around:
>>>> https://urldefense.com/v3/__https://lore.kernel.org/lkml/CALAqxLXdnaUfJKx0aN9xWwtfWVjMWigPpy2aqsNj56yvnbU80g@mail.gmail.com/__;!!A4F2R9G_pg!LNzuprAeg-O80SgolYkIkW4-ne-M-yLWCDUY9MygAIrQC398Z6gRJ9wnsnlqd3w$
>>>>
>>>> With the current dwc3 code on the HiKey960 we often see the
>>>> COREIDLE flag get stuck off in __dwc3_gadget_start(), which
>>>> seems to prevent the reset irq and causes the USB gadget to
>>>> fail to initialize.
>>>>
>>>> We had seen occasional initialization failures with older
>>>> kernels but with recent 5.x era kernels it seemed to be becoming
>>>> much more common, so I dug back through some older trees and
>>>> realized I dropped this quirk from Yu Chen during upstreaming
>>>> as I couldn't provide a proper rational for it and it didn't
>>>> seem to be necessary. I now realize I was wrong.
>>>>
>>>> After resubmitting the quirk, Thinh Nguyen pointed out that it
>>>> shouldn't be a quirk at all and it is actually mentioned in the
>>>> programming guide that it should be done when switching modes
>>>> in DRD.
>>>>
>>>> So, to avoid these !COREIDLE lockups seen on HiKey960, this
>>>> patch issues GCTL soft reset when switching modes if the
>>>> controller is in DRD mode.
>>>>
>>>> Cc: Felipe Balbi <balbi@kernel.org>
>>>> Cc: Tejas Joglekar <tejas.joglekar@synopsys.com>
>>>> Cc: Yang Fei <fei.yang@intel.com>
>>>> Cc: YongQin Liu <yongqin.liu@linaro.org>
>>>> Cc: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
>>>> Cc: Thinh Nguyen <thinhn@synopsys.com>
>>>> Cc: Jun Li <lijun.kernel@gmail.com>
>>>> Cc: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
>>>> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
>>>> Cc: linux-usb@vger.kernel.org
>>>> Signed-off-by: Yu Chen <chenyu56@huawei.com>
>>>> Signed-off-by: John Stultz <john.stultz@linaro.org>
>>>> ---
>>>> v2:
>>>> * Rework to always call the GCTL soft reset in DRD mode,
>>>> rather then using a quirk as suggested by Thinh Nguyen
>>>>
>>>> v3:
>>>> * Move GCTL soft reset under the spinlock as suggested by
>>>> Thinh Nguyen
>>> Because this is such an invasive change, I would prefer that we get
>>> Tested-By tags from a good fraction of the users before applying these
>>> two changes.
>> I'm happy to reach out to folks to try to get that. Though I'm
>> wondering if it would be better to put it behind a dts quirk flag, as
>> originally proposed?
>> https://urldefense.com/v3/__https://lore.kernel.org/lkml/20201021181803.79650-1-john.stultz@linaro.org/__;!!A4F2R9G_pg!LNzuprAeg-O80SgolYkIkW4-ne-M-yLWCDUY9MygAIrQC398Z6gRJ9wnRWITZfc$
>>
>> That way folks can enable it for devices as they need?
>>
>> Again, I'm not trying to force this in as-is, just mostly sending it
>> out again for discussion to understand what other approach might work.
>>
>> thanks
>> -john
>
> A quirk would imply something is broken/diverged from the design right?
> But it's not the case here, and at least this is needed for HiKey960.
> Also, I think Rob will be ok with not adding 1 more quirk to the dwc3
> devicetree. :)
>
> BR,
> Thinh
>
Hi All,
Sorry for jumping in, but I checked the SNPS v1.90a databook, and that
seemed to remove the requirement for the GCTL.softreset before writing
to PRTCAPDIR. Should we consider adding a controller version/IP check?
Thanks
Wesley Cheng
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2021-03-06 9:05 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-08 1:51 [PATCH v3 1/2] usb: dwc3: Trigger a GCTL soft reset when switching modes in DRD John Stultz
2021-01-08 1:51 ` [PATCH v3 2/2] usb: dwc3: Fix DRD mode change sequence following programming guide John Stultz
2021-03-06 9:00 ` Wesley Cheng
2021-03-06 23:39 ` Thinh Nguyen
2021-03-29 22:17 ` Wesley Cheng
2021-03-30 1:19 ` Thinh Nguyen
2021-03-30 20:17 ` Wesley Cheng
2021-01-08 12:25 ` [PATCH v3 1/2] usb: dwc3: Trigger a GCTL soft reset when switching modes in DRD Felipe Balbi
2021-01-08 19:18 ` John Stultz
2021-01-09 0:44 ` Thinh Nguyen
2021-03-06 9:04 ` Wesley Cheng [this message]
2021-03-06 23:41 ` Thinh Nguyen
2021-03-07 20:04 ` Wesley Cheng
2021-03-09 3:05 ` Thinh Nguyen
2021-03-09 6:33 ` Wesley Cheng
2021-03-19 22:40 ` Wesley Cheng
2021-03-19 23:09 ` Thinh Nguyen
2021-03-29 22:14 ` Wesley Cheng
2021-03-29 22:20 ` John Stultz
2021-03-30 2:11 ` Wesley Cheng
-- strict thread matches above, loose matches on Subject: below --
2020-10-22 3:25 John Stultz
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