From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E31EC54E76 for ; Wed, 4 Jan 2023 23:59:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235297AbjADX70 (ORCPT ); Wed, 4 Jan 2023 18:59:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235147AbjADX7R (ORCPT ); Wed, 4 Jan 2023 18:59:17 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82F2D43187; Wed, 4 Jan 2023 15:59:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672876756; x=1704412756; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=VUK+FoZ6RLONfaaQgaXBjEu8hvOPd1NckTmUOM0ZCK4=; b=GA9SwVHGhZRxPF49jBy4upurVhnBeWxZzuaAnycg4xNy5/cYKNjvrdbh JF+i3yF5vzTfnc6ZNPKd1sDmvdV02YmG9UXKJpY8SXyse90o5qaOnywmE s8kU/32/FZGmAblTSL3spDRIHXqB5I2VSqM4au+wi0sna8tefTOFaICsB 3IE+61rwbf+gYhwz6meK8oFE2i+SFV6+fvxJj4ZbsVOtgrrESH0U9e8l7 UfgHcKGawSgtLShfFuFj6r3pv9tLvJqqU82FfuCAP6qDKJsc/B10n/TX9 VJRvZRR0qXfmvSOXF9JClF+a1as2Zq/+hDBzSQtX5z0Sf0TCNFTk7/X1y A==; X-IronPort-AV: E=McAfee;i="6500,9779,10580"; a="323306091" X-IronPort-AV: E=Sophos;i="5.96,301,1665471600"; d="scan'208";a="323306091" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jan 2023 15:58:52 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10580"; a="900745364" X-IronPort-AV: E=Sophos;i="5.96,301,1665471600"; d="scan'208";a="900745364" Received: from kvthalli-mobl1.amr.corp.intel.com (HELO [10.212.102.90]) ([10.212.102.90]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jan 2023 15:58:50 -0800 Message-ID: <07443b54-2973-7990-e749-66dd7fb4e499@linux.intel.com> Date: Wed, 4 Jan 2023 17:51:19 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Firefox/102.0 Thunderbird/102.4.2 Subject: Re: [RFC PATCH 09/14] sound: usb: Introduce QC USB SND offloading support Content-Language: en-US To: Wesley Cheng , srinivas.kandagatla@linaro.org, mathias.nyman@intel.com, perex@perex.cz, broonie@kernel.org, lgirdwood@gmail.com, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, gregkh@linuxfoundation.org, Thinh.Nguyen@synopsys.com, bgoswami@quicinc.com, tiwai@suse.com, robh+dt@kernel.org, agross@kernel.org Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, quic_jackp@quicinc.com, quic_plai@quicinc.com References: <20221223233200.26089-1-quic_wcheng@quicinc.com> <20221223233200.26089-10-quic_wcheng@quicinc.com> From: Pierre-Louis Bossart In-Reply-To: <20221223233200.26089-10-quic_wcheng@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/23/22 17:31, Wesley Cheng wrote: > Several Qualcomm SoCs have a dedicated audio DSP, which has the ability to > support USB sound devices. This vendor driver will implement the required > handshaking with the DSP, in order to pass along required resources that > will be utilized by the DSP's USB SW. The communication channel used for > this handshaking will be using the QMI protocol. Required resources > include: > - Allocated secondary event ring address > - EP transfer ring address > - Interrupter number > > The above information will allow for the audio DSP to execute USB transfers > over the USB bus. It will also be able to support devices that have an > implicit feedback and sync endpoint as well. Offloading these data > transfers will allow the main/applications processor to enter lower CPU > power modes, and sustain a longer duration in those modes. Are you suggesting that the entire feedback loop be handled in the DSP? It's not clear what "Offloading these data transfers" refers to, the data part or the feedback path? Comments are almost inexistent in this patch so it's hard to figure out what it really does.