Re: [RESEND PATCH V3 2/8] perf/x86/intel: Basic support for metrics counters

Peter Zijlstra
2019-08-28T09:37:41Z

On Wed, Aug 28, 2019 at 11:02:17AM +0200, Peter Zijlstra wrote:
> @@ -2192,8 +2227,22 @@ static void intel_pmu_read_event(struct
> static void intel_pmu_enable_fixed(struct perf_event *event)
> {
> struct hw_perf_event *hwc = &event->hw;
> - int idx = hwc->idx - INTEL_PMC_IDX_FIXED;
> u64 ctrl_val, mask, bits = 0;
> + int idx = hwc->idx;
> +
> + if (is_topdown_idx(idx)) {
> + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> + /*
> + * When there are other Top-Down events already active; don't
> + * enable the SLOTS counter.
> + */
> + if (*(u64 *)cpuc->active_mask & INTEL_PMC_OTHER_TOPDOWN_BITS(idx))
> + return;
> +
> + idx = INTEL_PMC_IDX_FIXED_SLOTS;
> + }
> +
> + intel_set_masks(event, hwc->idx);

That wants to be idx, not hwc->idx.