From: Wei Huang <wei.huang2@amd.com>
To: Sean Christopherson <seanjc@google.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
pbonzini@redhat.com, vkuznets@redhat.com, wanpengli@tencent.com,
jmattson@google.com, joro@8bytes.org, tglx@linutronix.de,
mingo@redhat.com, bp@alien8.de, x86@kernel.org, hpa@zytor.com
Subject: Re: [PATCH v1 1/3] KVM: x86: Convert TDP level calculation to vendor's specific code
Date: Sun, 8 Aug 2021 14:30:59 -0500 [thread overview]
Message-ID: <08d21961-db3c-ae91-909c-df068b7be2e7@amd.com> (raw)
In-Reply-To: <YQxdbq+yoTIJmpL+@google.com>
On 8/5/21 4:51 PM, Sean Christopherson wrote:
>
> If we want to keep the MAXPHYADDR behavior, I'd vote for something like:
>
> diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
> index b4b65c21b2ca..7e35f2bf89b4 100644
> --- a/arch/x86/kvm/mmu/mmu.c
> +++ b/arch/x86/kvm/mmu/mmu.c
> @@ -97,6 +97,7 @@ module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644);
> bool tdp_enabled = false;
>
> static int max_huge_page_level __read_mostly;
> +static int tdp_root_level __read_mostly;
> static int max_tdp_level __read_mostly;
>
> enum {
> @@ -4645,6 +4646,9 @@ static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu,
>
> static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu)
> {
> + if (tdp_root_level)
> + return tdp_root_level;
> +
> /* Use 5-level TDP if and only if it's useful/necessary. */
> if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48)
> return 4;
> @@ -5336,10 +5340,11 @@ void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid)
> */
> }
>
> -void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level,
> - int tdp_huge_page_level)
> +void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
> + int tdp_max_root_level, int tdp_huge_page_level)
> {
> tdp_enabled = enable_tdp;
> + tdp_root_level = tdp_forced_root_level;
> max_tdp_level = tdp_max_root_level;
>
> /*
>
I decided to take this suggestion in v2: it avoids using 5-level table
(memory cost and potential table-walk overhead) if the host has the
flexibility of using 4-level NPT under LA57.
next prev parent reply other threads:[~2021-08-08 19:31 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-05 20:55 [PATCH v1 0/3] SVM 5-level page table support Wei Huang
2021-08-05 20:55 ` [PATCH v1 1/3] KVM: x86: Convert TDP level calculation to vendor's specific code Wei Huang
2021-08-05 21:51 ` Sean Christopherson
2021-08-05 22:26 ` Wei Huang
2021-08-08 19:30 ` Wei Huang [this message]
2021-08-05 22:35 ` Jim Mattson
2021-08-05 22:44 ` Sean Christopherson
2021-08-05 20:55 ` [PATCH v1 2/3] KVM: x86: Handle the case of 5-level shadow page table Wei Huang
2021-08-06 17:58 ` Sean Christopherson
2021-08-08 17:49 ` Wei Huang
2021-08-05 20:55 ` [PATCH v1 3/3] KVM: SVM: Add 5-level page table support for SVM Wei Huang
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