From: Baolu Lu <baolu.lu@linux.intel.com>
To: "Tian, Kevin" <kevin.tian@intel.com>,
Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@ziepe.ca>
Cc: baolu.lu@linux.intel.com, "Zhang, Tina" <tina.zhang@intel.com>,
"Liu, Yi L" <yi.l.liu@intel.com>,
"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 02/12] iommu/vt-d: Add cache tag invalidation helpers
Date: Wed, 24 Apr 2024 09:45:56 +0800 [thread overview]
Message-ID: <09cc401c-8dbb-4790-9d38-c94a8b1e4fd4@linux.intel.com> (raw)
In-Reply-To: <BN9PR11MB5276DE66A1052497BB3E215D8C112@BN9PR11MB5276.namprd11.prod.outlook.com>
On 4/23/24 4:42 PM, Tian, Kevin wrote:
>> From: Baolu Lu<baolu.lu@linux.intel.com>
>> Sent: Monday, April 22, 2024 1:30 PM
>>
>> On 4/16/24 4:06 PM, Lu Baolu wrote:
>>> + case CACHE_TAG_NESTING_DEVTLB:
>>> + /*
>>> + * Address translation cache in device side caches the
>>> + * result of nested translation. There is no easy way
>>> + * to identify the exact set of nested translations
>>> + * affected by a change in S2. So just flush the entire
>>> + * device cache.
>>> + */
>>> + addr = 0;
>>> + mask = MAX_AGAW_PFN_WIDTH;
>>> + fallthrough;
>> I realized that the logic above is not right. Setting both @addr and
>> @mask to 0 doesn't means flush all caches on the device. I will change
>> it like below:
> I didn't get. Above code doesn't set @mask to 0.
Oh!? I have no idea why I read that as "mask = 0" now. Perhaps my brain
was on vacation earlier. :-)
>
>> diff --git a/drivers/iommu/intel/cache.c b/drivers/iommu/intel/cache.c
>> index e8418cdd8331..18debb82272a 100644
>> --- a/drivers/iommu/intel/cache.c
>> +++ b/drivers/iommu/intel/cache.c
>> @@ -302,9 +302,14 @@ void cache_tag_flush_range(struct dmar_domain
>> *domain, unsigned long start,
>> * affected by a change in S2. So just flush
>> the entire
>> * device cache.
>> */
>> - addr = 0;
>> - mask = MAX_AGAW_PFN_WIDTH;
>> - fallthrough;
>> + info = dev_iommu_priv_get(tag->dev);
>> + sid = PCI_DEVID(info->bus, info->devfn);
>> +
>> + qi_flush_dev_iotlb(iommu, sid, info->pfsid,
>> info->ats_qdep,
>> + 0, MAX_AGAW_PFN_WIDTH);
>> + quirk_extra_dev_tlb_flush(info, 0,
>> MAX_AGAW_PFN_WIDTH,
>> + IOMMU_NO_PASID,
>> info->ats_qdep);
>> + break;
> and I didn't get this change. It goes backward by ignoring tag->pasid.
>
> what's the exact problem of the fallthrough logic in original code?
Sorry! Please ignore this.
Best regards,
baolu
next prev parent reply other threads:[~2024-04-24 1:47 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-16 8:06 [PATCH v3 00/12] Consolidate domain cache invalidation Lu Baolu
2024-04-16 8:06 ` [PATCH v3 01/12] iommu/vt-d: Add cache tag assignment interface Lu Baolu
2024-04-23 8:17 ` Tian, Kevin
2024-04-24 1:48 ` Baolu Lu
2024-04-23 9:01 ` Tian, Kevin
2024-04-24 2:44 ` Baolu Lu
2024-04-16 8:06 ` [PATCH v3 02/12] iommu/vt-d: Add cache tag invalidation helpers Lu Baolu
2024-04-22 5:30 ` Baolu Lu
2024-04-23 8:42 ` Tian, Kevin
2024-04-24 1:45 ` Baolu Lu [this message]
2024-04-16 8:06 ` [PATCH v3 03/12] iommu/vt-d: Add trace events for cache tag interface Lu Baolu
2024-04-16 8:06 ` [PATCH v3 04/12] iommu/vt-d: Use cache_tag_flush_all() in flush_iotlb_all Lu Baolu
2024-04-16 8:06 ` [PATCH v3 05/12] iommu/vt-d: Use cache_tag_flush_range() in tlb_sync Lu Baolu
2024-04-16 8:06 ` [PATCH v3 06/12] iommu/vt-d: Use cache_tag_flush_range_np() in iotlb_sync_map Lu Baolu
2024-04-16 8:06 ` [PATCH v3 07/12] iommu/vt-d: Cleanup use of iommu_flush_iotlb_psi() Lu Baolu
2024-04-16 8:06 ` [PATCH v3 08/12] iommu/vt-d: Use cache_tag_flush_range() in cache_invalidate_user Lu Baolu
2024-04-16 8:06 ` [PATCH v3 09/12] iommu/vt-d: Use cache helpers in arch_invalidate_secondary_tlbs Lu Baolu
2024-04-16 8:06 ` [PATCH v3 10/12] iommu/vt-d: Remove intel_svm_dev Lu Baolu
2024-04-16 8:06 ` [PATCH v3 11/12] iommu: Add ops->domain_alloc_sva() Lu Baolu
2024-04-16 8:06 ` [PATCH v3 12/12] iommu/vt-d: Remove struct intel_svm Lu Baolu
2024-04-23 9:06 ` [PATCH v3 00/12] Consolidate domain cache invalidation Tian, Kevin
2024-04-24 2:46 ` Baolu Lu
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