Re: [PATCH v2 1/2] KVM: VMX: Inject #UD if guest tries to execute SEAMCALL or TDCALL

Sean Christopherson
2025-10-17T13:00:09Z

On Fri, Oct 17, 2025, Kai Huang wrote:
>
> > --- a/arch/x86/kvm/vmx/nested.c
> > +++ b/arch/x86/kvm/vmx/nested.c
> > @@ -6728,6 +6728,14 @@ static bool nested_vmx_l1_wants_exit(struct kvm_vcpu *vcpu,
> > case EXIT_REASON_NOTIFY:
> > /* Notify VM exit is not exposed to L1 */
> > return false;
> > + case EXIT_REASON_SEAMCALL:
> > + case EXIT_REASON_TDCALL:
> > + /*
> > + * SEAMCALL and TDCALL unconditionally VM-Exit, but aren't
> > + * virtualized by KVM for L1 hypervisors, i.e. L1 should
> > + * never want or expect such an exit.
> > + */
> > + return false;
>
> Sorry for commenting late.
>
> I think from emulating hardware behaviour's perspective, if L1 doesn't
> support TDX (obviously true), SEAMCALL/TDCALL in L2 should cause VMEXIT to
> L1. In other words, L1 is expecting a VMEXIT in such case.

No, because from L1's perspective, the opcodes map to undefined instructions and
thus should #UD in L2. There's no super explicit enumeration, but IMO it's fair
to say that for L1 to think the instructions exists, it would need to observe
IA32_SEAMRR_PHYS_{BASE,MASK} for SEAMCALL, and MSR_IA32_MKTME_KEYID_PARTITIONING
as well for TDCALL. KVM doesn't emulate any of those instructions, and so L1
should never expect SEAMCALL or TDCALL to do anything other than #UD.

> Whether L1 can handle such VMEXIT is another story -- it may inject a #UD to
> L2 or may not (similar to the current upstream KVM), but it is L1's
> responsibility.
>
> So I think while this patch certainly honors the correct behaviour for L2,
> it doesn't honor for L1. But I think ultimately L1 should be the one who
> is responsible for emulating hardware behaviour for L2.
>
> E.g., assuming we have a KVM selftest in L1 to test SEAMCALL/TDCALL in
> normal VMX L2. L1 should be able to catch it's own bug when such VMEXIT
> isn't handled correctly. But with this patch, L1 will never be able to
> catch this IIUC.