Re: [PATCH net-next v1] net: phy: aquantia: poll status register

[Andrew Lunn <andrew@lunn.ch>]

On Thu, Oct 10, 2024 at 01:49:34PM +1300, Aryan Srivastava wrote:
> The system interface connection status register is not immediately
> correct upon line side link up. This results in the status being read as
> OFF and then transitioning to the correct host side link mode with a
> short delay. This causes the phylink framework passing the OFF status
> down to all MAC config drivers, resulting in the host side link being
> misconfigured, which in turn can lead to link flapping or complete
> packet loss in some cases.
> 
> Mitigate this by periodically polling the register until it not showing
> the OFF state. This will be done every 1ms for 10ms, using the same
> poll/timeout as the processor intensive operation reads.
> 
> If the phy is still expressing the OFF state after the timeout, then set
> the link to false and pass the NA interface mode onto the phylink
> framework.
> 
> Signed-off-by: Aryan Srivastava <aryan.srivastava@alliedtelesis.co.nz>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew