From: Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
wim@linux-watchdog.org
Cc: linux@roeck-us.net, linux-watchdog@vger.kernel.org,
linux-kernel@vger.kernel.org, S32@nxp.com,
ghennadi.procopciuc@nxp.com, thomas.fossati@linaro.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v3 1/2] dt-bindings: watchdog: Add NXP Software Watchdog Timer
Date: Tue, 8 Apr 2025 13:30:18 +0300 [thread overview]
Message-ID: <0ac343fe-e835-1c0d-55e7-5963cc24fc45@oss.nxp.com> (raw)
In-Reply-To: <981498bb-70d8-4304-9b53-065576ae8dc7@kernel.org>
On 4/8/2025 12:39 PM, Krzysztof Kozlowski wrote:
> On 08/04/2025 11:03, Daniel Lezcano wrote:
>> On 08/04/2025 10:21, Krzysztof Kozlowski wrote:
>>> On 07/04/2025 18:03, Daniel Lezcano wrote:
>>>> +
>>>> +allOf:
>>>> + - $ref: watchdog.yaml#
>>>> +
>>>> +properties:
>>>> + compatible:
>>>> + oneOf:
>>>> + - const: nxp,s32g2-swt
>>>> + - items:
>>>> + - const: nxp,s32g3-swt
>>>> + - const: nxp,s32g2-swt
>>>> +
>>>> + reg:
>>>> + maxItems: 1
>>>> +
>>>> + clocks:
>>>> + items:
>>>> + - description: Counter clock
>>>> + - description: Module clock
>>>> + - description: Register clock
>>>> + minItems: 1
>>>
>>> Why clocks are flexible? The SoC does not change between boards. It
>>> should be a fixed list - block receives that number of clocks or does
>>> not... unless you meant that different instances of the block have
>>> different clocks?
>>
>> The documentation describe the watchdog module with a clock for the
>> counter, a clock for the register and the last one for the module.
>>
>> IIUC, these clocks are enabled when the system is powered-on or exits
>> suspend.
>>
>> The driver does not have a control on them.
>>
>> The only usage of the clock is to retrieve the rate of the counter in
>> order to compute the maximum timeout. So only one is needed.
>>
>> However Ghennadi would like to describe the register and the module
>> clocks in case there is SoC variant where it is possible to have control
>> on them [1]
>
> Different SoC means different compatible, so I don't get why this is
> relevant here. Either these clocks inputs are there in the hardware or not.
>
>>
>> The goal is to give the description the flexibility to describe just one
>> because the other ones are not needed for this s32g2/3 platform.
>
> But bindings are not meant to be flexible but accurately describe the
> hardware. If hardware always has these clock inputs, then they are
> supposed to be always provided.
>
Indeed, as mentioned in my previous replies, the SWT hardware module has
three clocks as inputs: counter, module, and register.
>
> Best regards,
> Krzysztof
>
>
--
Regards,
Ghennadi
next prev parent reply other threads:[~2025-04-08 10:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-07 16:03 [PATCH v3 0/2] Add the NXP S32 Watchdog Daniel Lezcano
2025-04-07 16:03 ` [PATCH v3 1/2] dt-bindings: watchdog: Add NXP Software Watchdog Timer Daniel Lezcano
2025-04-08 8:21 ` Krzysztof Kozlowski
2025-04-08 9:03 ` Daniel Lezcano
2025-04-08 9:39 ` Krzysztof Kozlowski
2025-04-08 10:30 ` Ghennadi Procopciuc [this message]
2025-04-07 16:03 ` [PATCH v3 2/2] watchdog: Add the Watchdog Timer for the NXP S32 platform Daniel Lezcano
2025-04-08 7:25 ` Alexandru-Catalin Ionita
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