Re: [PATCH V3 10/16] platform/x86/intel/pmc: Split pmc_core_ssram_get_pmc()

["David E. Box" <david.e.box@linux.intel.com>]

On Thu, 2023-10-12 at 18:14 +0300, Ilpo Järvinen wrote:
> On Wed, 11 Oct 2023, David E. Box wrote:
> 
> > On supported hardware, each PMC may have an associated SSRAM device for
> > accessing additional counters.  However, only the SSRAM of the first
> > (primary) PMC is discoverable as a PCI device to the OS. The remaining
> > (secondary) devices are hidden but their BARs are still accessible and
> > their addresses are stored in the BAR of the exposed device. Clean up the
> > code handling the SSRAM discovery. Create two separate functions for
> > accessing the primary and secondary SSRAM devices.
> > 
> > Signed-off-by: David E. Box <david.e.box@linux.intel.com>
> > ---
> > V3 - New patch split from previous PATCH 2
> >    - Update changelog
> >    - Use cleanup.h to cleanup ioremap
> > 
> > V2 - no change
> > 
> >  drivers/platform/x86/intel/pmc/core_ssram.c | 93 ++++++++++++++-------
> >  1 file changed, 61 insertions(+), 32 deletions(-)
> > 
> > diff --git a/drivers/platform/x86/intel/pmc/core_ssram.c
> > b/drivers/platform/x86/intel/pmc/core_ssram.c
> > index 815950713e25..af405d11919f 100644
> > --- a/drivers/platform/x86/intel/pmc/core_ssram.c
> > +++ b/drivers/platform/x86/intel/pmc/core_ssram.c
> > @@ -8,6 +8,7 @@
> >   *
> >   */
> >  
> > +#include <linux/cleanup.h>
> >  #include <linux/pci.h>
> >  #include <linux/io-64-nonatomic-lo-hi.h>
> >  
> > @@ -21,6 +22,8 @@
> >  #define SSRAM_IOE_OFFSET       0x68
> >  #define SSRAM_DEVID_OFFSET     0x70
> >  
> > +DEFINE_FREE(pmc_core_iounmap, void __iomem *, iounmap(_T));
> > +
> 
> Was it that adding
> 
> DEFINE_FREE(iounmap, void __iomem *, iounmap(_T));
> 
> into some header did not work for some reason or why this? (Perhaps 
> because iounmap is also defined?)

No, I didn't think to add it. I'll try and send in the next version.

David

>