Re: [PATCH v4 06/10] pinctrl: rp1: Implement RaspberryPi RP1 gpio support

[Stefan Wahren <wahrenst@gmx.net>]

Hi Andrea,

Am 24.11.24 um 11:51 schrieb Andrea della Porta:
> The RP1 is an MFD supporting a gpio controller and /pinmux/pinctrl.
> Add minimum support for the gpio only portion. The driver is in
> pinctrl folder since upcoming patches will add the pinmux/pinctrl
> support where the gpio part can be seen as an addition.
>
> Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>   MAINTAINERS                   |   1 +
>   drivers/pinctrl/Kconfig       |  11 +
>   drivers/pinctrl/Makefile      |   1 +
>   drivers/pinctrl/pinctrl-rp1.c | 789 ++++++++++++++++++++++++++++++++++
>   4 files changed, 802 insertions(+)
>   create mode 100644 drivers/pinctrl/pinctrl-rp1.c
...
> +
> +static int rp1_pinctrl_probe(struct platform_device *pdev)
> +{
> +	struct regmap *gpio_regmap, *rio_regmap, *pads_regmap;
> +	struct rp1_pinctrl *pc = &rp1_pinctrl_data;
> +	struct device *dev = &pdev->dev;
> +	struct device_node *np = dev->of_node;
> +	struct gpio_irq_chip *girq;
> +	int err, i;
> +
> +	pc->dev = dev;
> +	pc->gpio_chip = rp1_gpio_chip;
> +	pc->gpio_chip.parent = dev;
> +
> +	pc->gpio_base = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(pc->gpio_base))
> +		return dev_err_probe(dev, PTR_ERR(pc->gpio_base), "could not get GPIO IO memory\n");
> +
> +	pc->rio_base = devm_platform_ioremap_resource(pdev, 1);
> +	if (IS_ERR(pc->rio_base))
> +		return dev_err_probe(dev, PTR_ERR(pc->rio_base), "could not get RIO IO memory\n");
> +
> +	pc->pads_base = devm_platform_ioremap_resource(pdev, 2);
> +	if (IS_ERR(pc->pads_base))
> +		return dev_err_probe(dev, PTR_ERR(pc->pads_base), "could not get PADS IO memory\n");
> +
> +	gpio_regmap = devm_regmap_init_mmio(dev, pc->gpio_base,
> +					    &rp1_pinctrl_regmap_cfg);
> +	if (IS_ERR(gpio_regmap))
> +		return dev_err_probe(dev, PTR_ERR(gpio_regmap), "could not init GPIO regmap\n");
> +
> +	rio_regmap = devm_regmap_init_mmio(dev, pc->rio_base,
> +					   &rp1_pinctrl_regmap_cfg);
> +	if (IS_ERR(rio_regmap))
> +		return dev_err_probe(dev, PTR_ERR(rio_regmap), "could not init RIO regmap\n");
> +
> +	pads_regmap = devm_regmap_init_mmio(dev, pc->pads_base,
> +					    &rp1_pinctrl_regmap_cfg);
> +	if (IS_ERR(pads_regmap))
> +		return dev_err_probe(dev, PTR_ERR(pads_regmap), "could not init PADS regmap\n");
> +
> +	for (i = 0; i < RP1_NUM_BANKS; i++) {
> +		const struct rp1_iobank_desc *bank = &rp1_iobanks[i];
> +		int j;
> +
> +		for (j = 0; j < bank->num_gpios; j++) {
> +			struct rp1_pin_info *pin =
> +				&pc->pins[bank->min_gpio + j];
> +			int reg_off;
> +
> +			pin->num = bank->min_gpio + j;
> +			pin->bank = i;
> +			pin->offset = j;
> +
> +			reg_off = bank->gpio_offset + pin->offset
> +				  * sizeof(u32) * 2;
Just a nit: the first * belongs in the line above

Except of this:

Reviewed-by: Stefan Wahren <wahrenst@gmx.net>