From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 648CB19E968; Thu, 29 May 2025 09:06:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748509563; cv=none; b=NGUTY9rdlG8BBRBum5bjqrmCr+BpmfwQ4W/sIkN8buMI9wezIpqjGb18QUUT864WR+ZCGBqoNLP7CL0itaaOp+F3IjfRxIS3kxCzzmbE/+q/Iw4s5plvXe/qbFGXXYt9ZSNYWa7qk5Q4Cmed/JZW1sE5EtiXJHZaGqUxfqkiMLE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748509563; c=relaxed/simple; bh=TnBdwfMU35dwvTgOcU49mAwWEmcwsZg4PtscRxp7BZE=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=AeGXocx7h/UA9uAT7BcUjhYlFKFLWwrfzWhDd2OZUDJPNVWwYEjR1GNLe3/aYajNkLjISzQh1OzAlPbN7zZ5PXsNqLbutMmlqa21pIFCegWDmgPNLDg8kOPW/kbpyR/FzyHSfSTwZutRpOSImsPQdDWsvsa/U/jleqiapxezOk0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mdJJLyB0; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mdJJLyB0" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A4EBDC4CEED; Thu, 29 May 2025 09:06:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1748509562; bh=TnBdwfMU35dwvTgOcU49mAwWEmcwsZg4PtscRxp7BZE=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=mdJJLyB0mNoFoew7xh7nQyQ6kwRPijxdlCpPPwYGaK8qIx0V7cCop/SZXbcEFoguo tF5U355g7C+ele+r70WEO/ROVKjJBt/T0It2xcY//Z6xVeI/eqqj9uph1MzVZZ3zxz Y/Y1s0FTk4EvxunfLRtLCOV5wpTFg4b2p9bYuu0S423/w2r3iPKoNMmFLl6/QLIW0K mBuKl6d4+EtrXUSvnMRB0UtGAxFiHfwQ8IKPtPIiDvNYcBQjqpE+pVz+vs2oRkugeg Lq69O9hDxfP56ujzTXxVYlCzfC3BMqm0/xK3hIczy0s9Bnw2JKHLLksJ5SdLa2h6Rk bhA5KTURX1MIQ== Message-ID: <0c87223d-4b4e-4e82-b7ed-3c694393b1b0@kernel.org> Date: Thu, 29 May 2025 11:05:59 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: Add coresight node for SM8650 To: Yingchao Deng , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250529085650.3594253-1-quic_yingdeng@quicinc.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 29/05/2025 10:56, Yingchao Deng wrote: > Add coresight components on the path from stm to etr. > > Signed-off-by: Yingchao Deng > --- > arch/arm64/boot/dts/qcom/sm8650.dtsi | 250 +++++++++++++++++++++++++++ > 1 file changed, 250 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi > index 86684cb9a932..5e1854a0e15f 100644 > --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi > @@ -5052,6 +5052,82 @@ data-pins { > }; > }; > > + ctcu@10001000 { > + compatible = "qcom,sa8775p-ctcu"; Wrong compatible. > + reg = <0x0 0x10001000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb"; > + > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + ctcu_in0: endpoint { > + remote-endpoint = <&etr0_out>; Fix indentation. > + }; > + }; > + > + port@1 { > + reg = <1>; > + ctcu_in1: endpoint { > + remote-endpoint = <&etr1_out>; > + }; > + }; > + }; > + }; > + > + stm@10002000 { > + compatible = "arm,coresight-stm", "arm,primecell"; > + reg = <0x0 0x10002000 0x0 0x1000>, > + <0x0 0x16280000 0x0 0x180000>; > + reg-names = "stm-base", "stm-stimulus-base"; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + out-ports { > + port { > + stm_out_funnel_in0: endpoint { > + remote-endpoint = > + <&funnel_in0_in_stm>; > + }; > + }; > + }; > + }; > + > + funnel@10041000 { > + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; > + reg = <0x0 0x10041000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@7 { > + reg = <7>; > + funnel_in0_in_stm: endpoint { > + remote-endpoint = > + <&stm_out_funnel_in0>; > + }; > + }; > + }; > + > + out-ports { > + port { > + funnel_in0_out_funnel_qdss: endpoint { > + remote-endpoint = > + <&funnel_qdss_in_funnel_in0>; > + }; > + }; > + }; > + }; > + > funnel@10042000 { > compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; > > @@ -5094,6 +5170,14 @@ in-ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + > + funnel_qdss_in_funnel_in0: endpoint { > + remote-endpoint = <&funnel_in0_out_funnel_qdss>; > + }; > + }; > + > port@1 { > reg = <1>; > > @@ -5112,6 +5196,133 @@ funnel_qdss_out_funnel_aoss: endpoint { > }; > }; > > + replicator@10046000 { > + compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; > + reg = <0x0 0x10046000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + replicator_qdss_in_replicator_swao: endpoint { > + remote-endpoint = > + <&replicator_swao_out_replicator_qdss>; > + }; > + }; > + }; > + > + out-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + replicator_qdss_out_replicator_etr: endpoint { > + remote-endpoint = > + <&replicator_etr_in_replicator_qdss>; > + }; > + }; > + }; > + }; > + > + tmc@10048000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0x0 0x10048000 0x0 0x1000>; > + > + iommus = <&apps_smmu 0x04e0 0>, > + <&apps_smmu 0x04c0 0>; > + dma-coherent; > + arm,scatter-gather; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + tmc_etr_in_replicator_etr: endpoint { > + remote-endpoint = > + <&replicator_etr_out_tmc_etr>; > + }; > + }; > + }; > + > + out-ports { > + port { > + etr0_out: endpoint { > + remote-endpoint = > + <&ctcu_in0>; > + }; > + }; > + }; > + }; > + > + replicator@1004e000 { > + compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; > + reg = <0x0 0x1004e000 0x0 0x1000>; > + > + clocks = <&aoss_qmp>; > + clock-names = "apb_pclk"; > + > + in-ports { > + port { > + replicator_etr_in_replicator_qdss: endpoint { > + remote-endpoint = > + <&replicator_qdss_out_replicator_etr>; > + }; > + }; > + }; > + > + out-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + replicator_etr_out_tmc_etr: endpoint { > + remote-endpoint = > + <&tmc_etr_in_replicator_etr>; > + }; > + }; > + port@1 { > + reg = <1>; > + replicator_etr_out_tmc_etr1: endpoint { > + remote-endpoint = > + <&tmc_etr1_in_replicator_etr>; > + }; > + }; > + }; > + }; > + > + tmc@1004f000 { > + compatible = "arm,primecell"; That's also wrong. Plus I suspect this was not tested against bindings. Best regards, Krzysztof