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[109.252.170.211]) by smtp.googlemail.com with ESMTPSA id 191sm1744043lfa.131.2020.09.26.07.48.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 26 Sep 2020 07:48:54 -0700 (PDT) Subject: Re: [PATCH 5/5] iommu/tegra-smmu: Add pagetable mappings to debugfs To: Nicolin Chen , thierry.reding@gmail.com, joro@8bytes.org, krzk@kernel.org Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, jonathanh@nvidia.com References: <20200926080719.6822-1-nicoleotsuka@gmail.com> <20200926080719.6822-6-nicoleotsuka@gmail.com> From: Dmitry Osipenko Message-ID: <0c9ca297-d656-59a5-eefd-00e0c0542c29@gmail.com> Date: Sat, 26 Sep 2020 17:48:54 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200926080719.6822-6-nicoleotsuka@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 26.09.2020 11:07, Nicolin Chen пишет: ... > +static int tegra_smmu_mappings_show(struct seq_file *s, void *data) > +{ > + struct tegra_smmu_group_debug *group_debug = s->private; > + const struct tegra_smmu_swgroup *group; > + struct tegra_smmu_as *as; > + struct tegra_smmu *smmu; > + int pd_index, pt_index; > + u64 pte_count = 0; > + u32 pde_count = 0; > + u32 val, ptb_reg; > + u32 *pd; > + > + if (!group_debug || !group_debug->priv || !group_debug->group) > + return 0; > + > + group = group_debug->group; > + as = group_debug->priv; > + smmu = as->smmu; > + > + val = smmu_readl(smmu, group->reg) & SMMU_ASID_ENABLE; > + if (!val) > + return 0; > + > + pd = page_address(as->pd); > + if (!pd) > + return 0; > + > + seq_printf(s, "\nSWGROUP: %s\nASID: %d\nreg: 0x%x\n", group->name, > + as->id, group->reg); > + > + mutex_lock(&smmu->lock); > + smmu_writel(smmu, as->id & 0x7f, SMMU_PTB_ASID); > + ptb_reg = smmu_readl(smmu, SMMU_PTB_DATA); I think the whole traverse needs a locking protection, doesn't it? > + mutex_unlock(&smmu->lock); > + > + seq_printf(s, "PTB_ASID: 0x%x\nas->pd_dma: 0x%llx\n", ptb_reg, as->pd_dma); > + seq_puts(s, "{\n"); > + > + for (pd_index = 0; pd_index < SMMU_NUM_PDE; pd_index++) { > + struct page *pt; > + u32 *addr; > + > + if (!as->count[pd_index] || !pd[pd_index]) > + continue; > + > + pde_count++; > + pte_count += as->count[pd_index]; > + seq_printf(s, "\t[%d] 0x%x (%d)\n", > + pd_index, pd[pd_index], as->count[pd_index]); > + pt = as->pts[pd_index]; > + addr = page_address(pt); This needs as->lock protection. > + seq_puts(s, "\t{\n"); > + seq_printf(s, "\t\t%-5s %-4s %12s %12s\n", "PDE", "ATTR", "PHYS", "IOVA"); > + for (pt_index = 0; pt_index < SMMU_NUM_PTE; pt_index++) { > + u64 iova; > + > + if (!addr[pt_index]) > + continue; > + > + iova = ((dma_addr_t)pd_index & (SMMU_NUM_PDE - 1)) << SMMU_PDE_SHIFT; > + iova |= ((dma_addr_t)pt_index & (SMMU_NUM_PTE - 1)) << SMMU_PTE_SHIFT; > + > + seq_printf(s, "\t\t#%-4d 0x%-4x 0x%-12llx 0x%-12llx\n", > + pt_index, addr[pt_index] >> SMMU_PTE_ATTR_SHIFT, > + SMMU_PFN_PHYS(addr[pt_index] & ~SMMU_PTE_ATTR), iova); > + } > + seq_puts(s, "\t}\n"); > + } > + seq_puts(s, "}\n"); > + seq_printf(s, "Total PDE count: %d\n", pde_count); > + seq_printf(s, "Total PTE count: %lld\n", pte_count); > + > + return 0; > +} > + > +DEFINE_SHOW_ATTRIBUTE(tegra_smmu_mappings); > + > static void tegra_smmu_debugfs_init(struct tegra_smmu *smmu) > { > + const struct tegra_smmu_soc *soc = smmu->soc; > + struct tegra_smmu_group_debug *group_debug; > + struct device *dev = smmu->dev; > + struct dentry *d; > + int i; > + > + group_debug = devm_kzalloc(dev, sizeof(*group_debug) * soc->num_swgroups, GFP_KERNEL); devm_kcalloc()