From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DA95828B4FE for ; Tue, 9 Dec 2025 15:13:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765293206; cv=none; b=m+VnSgGH457FqufTOtHw4QonkUsSfjL4h4mb+ypBcSSKcMXFfIoW+ne99q3h10Mf4M8mL2MiZJYI3rzfg+5tq90O9h00uzw2HUvHnNbQTZ3zN9QPfN6we6OY65/QcCZ+d+EMWmu/mM+uVHDlV4CZOlZ/mN0F0lGVX5Ox9L34Y18= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765293206; c=relaxed/simple; bh=KB2lKATp6EK9RLX8QypqytSm26qLnFwvMXMt4ftec04=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=MhANoHafX/LUSmGwCefzmHtfXO1An7KaHptsMx/WxYn0MlYv6CDaS2t9iQxPnWlesSd943lEHJcGmJv7EkyU0l+Y35vlIqoSfjz7oXsI0PATh6TooxXqixiv3OY/Y+6u94R9JppW7uwzHy7B2d6Z+dibG5GnAEptpU2U9q0EWmk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BE9D9175D; Tue, 9 Dec 2025 07:13:16 -0800 (PST) Received: from [10.1.196.46] (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B33D33F762; Tue, 9 Dec 2025 07:13:20 -0800 (PST) Message-ID: <0ea282be-c44f-4562-9104-1efe57348a3e@arm.com> Date: Tue, 9 Dec 2025 15:13:19 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 02/38] arm64: mpam: Re-initialise MPAM regs when CPU comes online To: James Morse , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Gavin Shan , rohit.mathew@arm.com, reinette.chatre@intel.com, Punit Agrawal References: <20251205215901.17772-1-james.morse@arm.com> <20251205215901.17772-3-james.morse@arm.com> From: Ben Horgan Content-Language: en-US In-Reply-To: <20251205215901.17772-3-james.morse@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi James, On 12/5/25 21:58, James Morse wrote: > Now that the MPAM system registers are expected to have values that change, > reprogram them based on struct task_struct when a CPU is brought online. > > Previously MPAM's 'default PARTID' of 0 was used this is the PARTID that > hardware guarantees to reset. Because there are a limited number of > PARTID, this value is exposed to user space, meaning resctrl changes > to the resctrl default group would also affect kernel threads. > Instead, use the task's PARTID value for kernel work on behalf of > user-space too. > > Signed-off-by: James Morse > --- > arch/arm64/kernel/cpufeature.c | 18 +++++++++++------- > 1 file changed, 11 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 5ed401ff79e3..429128a181ac 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -86,6 +86,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -2439,13 +2440,16 @@ test_has_mpam(const struct arm64_cpu_capabilities *entry, int scope) > static void > cpu_enable_mpam(const struct arm64_cpu_capabilities *entry) > { > - /* > - * Access by the kernel (at EL1) should use the reserved PARTID > - * which is configured unrestricted. This avoids priority-inversion > - * where latency sensitive tasks have to wait for a task that has > - * been throttled to release the lock. > - */ > - write_sysreg_s(0, SYS_MPAM1_EL1); > + int cpu = smp_processor_id(); > + u64 regval = 0; > + > + if (IS_ENABLED(CONFIG_MPAM)) > + regval = READ_ONCE(per_cpu(arm64_mpam_current, cpu)); CONFIG_MPAM -> CONFIG_ARM64_MPAM > + > + write_sysreg_s(regval, SYS_MPAM1_EL1); > + isb(); > + > + write_sysreg_s(regval, SYS_MPAM0_EL1); > } > > static bool Thanks, Ben