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From: Tom Lendacky <thomas.lendacky@amd.com>
To: Melody Wang <huibo.wang@amd.com>, x86@kernel.org
Cc: LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 6/7] x86/sev: Register the guest with the SVSM APIC protocol
Date: Fri, 31 Jul 2026 14:18:31 -0500	[thread overview]
Message-ID: <0fbcb384-e06b-4192-a14f-8800d3fca81f@amd.com> (raw)
In-Reply-To: <0321fc1324c66bfc02b3c0f65ff5e7a9130a969f.1785375271.git.huibo.wang@amd.com>

On 7/29/26 20:48, Melody Wang wrote:
> The SVSM APIC protocol supports 5 calls. SVSM_APIC_CONFIGURE_EMULATION
> (shortened to SVSM_APIC_CONFIG_EMULATION for brevity), call 1, provides
> the controls whether the guest can make use of the SVSM APIC protocol.
> 
> Implement this call, and register Alternate Injection for the guest
> by default.
> 
> Signed-off-by: Melody Wang <huibo.wang@amd.com>
> ---
>  arch/x86/boot/compressed/sev.c | 17 +++++++++++++++++
>  arch/x86/boot/compressed/sev.h |  6 ++++++
>  2 files changed, 23 insertions(+)
> 
> diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c
> index 655291a03dcc..a98185b3869a 100644
> --- a/arch/x86/boot/compressed/sev.c
> +++ b/arch/x86/boot/compressed/sev.c
> @@ -518,5 +518,22 @@ u64 sev_prepare(void)
>  	if (unsupported)
>  		return unsupported;
>  
> +	/* Register Alternate Injection */
> +	if (early_is_sevsnp_guest() && snp_vmpl) {
> +		struct svsm_call call = {};
> +		int ret;
> +
> +		if (!(sev_get_status() & MSR_AMD64_SNP_ALTERNATE_INJ))
> +			return 0;
> +
> +		call.caa = (struct svsm_ca *)boot_svsm_caa_pa;
> +		call.rax = SVSM_APIC_CALL(SVSM_APIC_CONFIG_EMULATION);
> +		call.rcx = SVSM_AI_REGISTER;
> +
> +		ret = svsm_call_msr_protocol(&call);
> +		if (ret)
> +			sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED);

Shouldn't this really be where the permissive setting of allowing all
interrupts be done, too, instead of where it is done in patch #3?

Thanks,
Tom

> +	}
> +
>  	return 0;
>  }
> diff --git a/arch/x86/boot/compressed/sev.h b/arch/x86/boot/compressed/sev.h
> index 22637b416b46..dd058af2e7aa 100644
> --- a/arch/x86/boot/compressed/sev.h
> +++ b/arch/x86/boot/compressed/sev.h
> @@ -12,6 +12,12 @@
>  
>  #include <asm/shared/msr.h>
>  
> +enum svsm_ai_ctrl {
> +	SVSM_AI_DISABLE,

Isn't the zero value "Query APIC Emulation", not disable?

> +	SVSM_AI_DEREGISTER,

s/DEREGISTER/UNREGISTER/

Thanks,
Tom

> +	SVSM_AI_REGISTER,
> +};
> +
>  void snp_accept_memory(phys_addr_t start, phys_addr_t end);
>  u64 sev_get_status(void);
>  bool early_is_sevsnp_guest(void);


  reply	other threads:[~2026-07-31 19:18 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-30  1:48 [PATCH 0/7] Alternate Injection: Secure Interrupt Delivery for SEV-SNP Guests - Guest Support Melody Wang
2026-07-30  1:48 ` [PATCH 1/7] x86/sev: Add support for Alternate Injection Melody Wang
2026-07-31 15:27   ` Tom Lendacky
2026-07-30  1:48 ` [PATCH 2/7] x86/apic: Add an SVSM APIC driver Melody Wang
2026-07-31 17:39   ` Tom Lendacky
2026-07-30  1:48 ` [PATCH 3/7] x86/sev: Allow the guest to configure interrupt vectors for the hypervisor Melody Wang
2026-07-31 17:52   ` Tom Lendacky
2026-07-30  1:48 ` [PATCH 4/7] x86/sev: Route unsupported APIC register accesses to the hypervisor APIC emulation Melody Wang
2026-07-31 18:37   ` Tom Lendacky
2026-07-30  1:48 ` [PATCH 5/7] x86/sev: Add a function to contain all SEV-specific setup operations Melody Wang
2026-07-31 19:15   ` Tom Lendacky
2026-07-30  1:48 ` [PATCH 6/7] x86/sev: Register the guest with the SVSM APIC protocol Melody Wang
2026-07-31 19:18   ` Tom Lendacky [this message]
2026-07-30  1:48 ` [PATCH 7/7] x86/sev: Indicate that Alternate Injection is supported in the guest Melody Wang

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