* Re: how to balance interrupts between 2 CPUs?
[not found] <b5926afe75.afe75b5926@water.pku.edu.cn>
@ 2002-04-10 12:54 ` Philippe Amelant
2002-04-10 13:21 ` lm0re
` (3 subsequent siblings)
4 siblings, 0 replies; 5+ messages in thread
From: Philippe Amelant @ 2002-04-10 12:54 UTC (permalink / raw)
To: linux-kernel@vger.kernel.org
Le mer 10/04/2002 à 14:23, zxj@water.pku.edu.cn a écrit :
> Hello
>
> I am using two Intel Giga NICs in a DELL PowerEdge 4600
> with 2 Intel XEON 1.8GHz CPUs.
> The matherboard is ServerWorks GC-HE.
> The OS is RedHat 7.2, and the release of kernel is "2.4.7-10smp".
>
> The CPU0 has very heavy interrupt traffic,
> you can see the following information:
Are you using "noapic" on boot ?
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: how to balance interrupts between 2 CPUs?
[not found] <b5926afe75.afe75b5926@water.pku.edu.cn>
2002-04-10 12:54 ` how to balance interrupts between 2 CPUs? Philippe Amelant
@ 2002-04-10 13:21 ` lm0re
2002-04-10 14:06 ` Tim Kay
` (2 subsequent siblings)
4 siblings, 0 replies; 5+ messages in thread
From: lm0re @ 2002-04-10 13:21 UTC (permalink / raw)
To: zxj, linux-kernel
I think your got something wrong, I've a 2 cpus box, all is ok,see below:
[root@info /proc]# cat interrupts
CPU0 CPU1
0: 1245694 1389471 IO-APIC-edge timer
1: 157 121 IO-APIC-edge keyboard
2: 0 0 XT-PIC cascade
8: 0 1 IO-APIC-edge rtc
10: 10685 10958 IO-APIC-level usb-uhci, e100
14: 36926 50216 IO-APIC-edge ide0
15: 1 1 IO-APIC-edge ide1
NMI: 0 0
LOC: 2635076 2635074
ERR: 0
MIS: 0
Read the IRQ-affinity.txt which should usual be at
/usr/src/linux/Documentation, and change the configuration maybe your can
specify cpu1 processes the IRQ 18. And check the result.
lm0re
----- Original Message -----
From: <zxj@water.pku.edu.cn>
To: <linux-kernel@vger.kernel.org>
Sent: Wednesday, April 10, 2002 8:23 PM
Subject: how to balance interrupts between 2 CPUs?
> Hello
>
> I am using two Intel Giga NICs in a DELL PowerEdge 4600
> with 2 Intel XEON 1.8GHz CPUs.
> The matherboard is ServerWorks GC-HE.
> The OS is RedHat 7.2, and the release of kernel is "2.4.7-10smp".
>
> The CPU0 has very heavy interrupt traffic,
> you can see the following information:
> >>>>>
> [root@giga root]# cat /proc/interrupts
> CPU0 CPU1
> 0: 395117 0 IO-APIC-edge timer
> 1: 653 0 IO-APIC-edge keyboard
> 2: 0 0 XT-PIC cascade
> 8: 1 0 IO-APIC-edge rtc
> 12: 23 0 IO-APIC-edge PS/2 Mouse
> 14: 2 0 IO-APIC-edge ide0
> 18: 30 0 IO-APIC-level aic7xxx
> 19: 86013 0 IO-APIC-level eth0
> 20: 10394 0 IO-APIC-level aic7xxx
> 21: 30 0 IO-APIC-level aic7xxx
> 27: 5480873 0 IO-APIC-level e1000
> 39: 164889152 0 IO-APIC-level e1000
> NMI: 0 0
> LOC: 395013 395012
> ERR: 0
> MIS: 0
> >>>>>
>
> The kernel's SMP option is enable, but the CPU1 is always idle.
> How to balance the interrpupts between two CPUs?
> If you are convenient, please give me some advice quickly.
>
> Thank you!
>
> Best regard
>
>
> -
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: how to balance interrupts between 2 CPUs?
[not found] <b5926afe75.afe75b5926@water.pku.edu.cn>
2002-04-10 12:54 ` how to balance interrupts between 2 CPUs? Philippe Amelant
2002-04-10 13:21 ` lm0re
@ 2002-04-10 14:06 ` Tim Kay
2002-04-10 14:14 ` Terje Eggestad
2002-04-10 14:31 ` Martin J. Bligh
4 siblings, 0 replies; 5+ messages in thread
From: Tim Kay @ 2002-04-10 14:06 UTC (permalink / raw)
To: linux-kernel
Using a poweredge XXXXX with apic enabled (the default) will give you CPU
interrupt sharing:
CPU0 CPU1
0: 34977278 34950769 IO-APIC-edge timer
1: 1 1 IO-APIC-edge keyboard
2: 0 0 XT-PIC cascade
14: 5 1 IO-APIC-edge ide0
16: 149330778 149335816 IO-APIC-level eth0
30: 2975700 2977038 IO-APIC-level aic7xxx
31: 7 9 IO-APIC-level aic7xxx
NMI: 0 0
LOC: 69933245 69933202
ERR: 0
MIS: 0
but /var/log/messages will overflow with APIC errors and your machine will
eventually (in my exp) die as it stops answering the interrupt requests so
you should stick to append="noapic" in your lilo.conf or whatever. The above
is happening to us on PE 1550s 2450s & 6400s anyway. I believe <DUCKS> that,
unless you are running single CPU hogging apps on a one per processor basis,
you dont lose a great deal with one processor dealing with the IRQs and the
other(s) running the software.
Tim
On Wednesday 10 Apr 2002 13:23, zxj@water.pku.edu.cn wrote:
> Hello
>
> I am using two Intel Giga NICs in a DELL PowerEdge 4600
> with 2 Intel XEON 1.8GHz CPUs.
> The matherboard is ServerWorks GC-HE.
> The OS is RedHat 7.2, and the release of kernel is "2.4.7-10smp".
>
> The CPU0 has very heavy interrupt traffic,
> you can see the following information:
>
> [root@giga root]# cat /proc/interrupts
> CPU0 CPU1
> 0: 395117 0 IO-APIC-edge timer
> 1: 653 0 IO-APIC-edge keyboard
> 2: 0 0 XT-PIC cascade
> 8: 1 0 IO-APIC-edge rtc
> 12: 23 0 IO-APIC-edge PS/2 Mouse
> 14: 2 0 IO-APIC-edge ide0
> 18: 30 0 IO-APIC-level aic7xxx
> 19: 86013 0 IO-APIC-level eth0
> 20: 10394 0 IO-APIC-level aic7xxx
> 21: 30 0 IO-APIC-level aic7xxx
> 27: 5480873 0 IO-APIC-level e1000
> 39: 164889152 0 IO-APIC-level e1000
> NMI: 0 0
> LOC: 395013 395012
> ERR: 0
> MIS: 0
>
>
> The kernel's SMP option is enable, but the CPU1 is always idle.
> How to balance the interrpupts between two CPUs?
> If you are convenient, please give me some advice quickly.
>
> Thank you!
>
> Best regard
>
>
> -
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
--
----------------
Tim Kay
systems administrator
Advfn.com Plc - http://www.advfn.com/
timk@advfn.com
Tel: 020 7070 0941
Fax: 020 7070 0959
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: how to balance interrupts between 2 CPUs?
[not found] <b5926afe75.afe75b5926@water.pku.edu.cn>
` (2 preceding siblings ...)
2002-04-10 14:06 ` Tim Kay
@ 2002-04-10 14:14 ` Terje Eggestad
2002-04-10 14:31 ` Martin J. Bligh
4 siblings, 0 replies; 5+ messages in thread
From: Terje Eggestad @ 2002-04-10 14:14 UTC (permalink / raw)
To: zxj; +Cc: linux-kernel
That is wierd you should have 4 CPU's. However I remember that Alan made
a patch for hyperthreading I *belive* is not in any 2.4.7 kernel.
I've a dual P4 Xeon 1.8Ghz with Intel chipset and 2.4.18smp, and I've:
te gcle1 ~ 4> cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
0: 117524 117823 117105 117564 IO-APIC-edge timer
1: 108 105 109 109 IO-APIC-edge
keyboard
2: 0 0 0 0 XT-PIC
cascade
4: 96 119 92 116 IO-APIC-edge serial
8: 1 0 0 0 IO-APIC-edge rtc
9: 0 0 0 0 IO-APIC-edge acpi
15: 2 1 1 0 IO-APIC-edge ide1
16: 0 0 0 0 IO-APIC-level
usb-uhci
17: 1554 1572 1499 1622 IO-APIC-level eth0
18: 0 0 0 0 IO-APIC-level
usb-uhci
19: 0 0 0 0 IO-APIC-level
usb-uhci
28: 4937 4915 4881 5053 IO-APIC-level
aic7xxx
29: 4 4 4 4 IO-APIC-level
aic7xxx
NMI: 0 0 0 0 te gcle1 ~ 4> cat
/proc/interrupts
CPU0 CPU1 CPU2 CPU3
0: 117524 117823 117105 117564 IO-APIC-edge timer
1: 108 105 109 109 IO-APIC-edge
keyboard
2: 0 0 0 0 XT-PIC
cascade
4: 96 119 92 116 IO-APIC-edge serial
8: 1 0 0 0 IO-APIC-edge rtc
9: 0 0 0 0 IO-APIC-edge acpi
15: 2 1 1 0 IO-APIC-edge ide1
16: 0 0 0 0 IO-APIC-level
usb-uhci
17: 1554 1572 1499 1622 IO-APIC-level eth0
18: 0 0 0 0 IO-APIC-level
usb-uhci
19: 0 0 0 0 IO-APIC-level
usb-uhci
28: 4937 4915 4881 5053 IO-APIC-level
aic7xxx
29: 4 4 4 4 IO-APIC-level
aic7xxx
NMI: 0 0 0 0
LOC: 469377 469403 469435 469433
PMC: 0 0 0 0
ERR: 0
MIS: 0
te gcle1 ~ 5>
LOC: 469377 469403 469435 469433
PMC: 0 0 0 0
ERR: 0
MIS: 0
te gcle1 ~ 5>
On Wed, 2002-04-10 at 14:23, zxj@water.pku.edu.cn wrote:
> Hello
>
> I am using two Intel Giga NICs in a DELL PowerEdge 4600
> with 2 Intel XEON 1.8GHz CPUs.
> The matherboard is ServerWorks GC-HE.
> The OS is RedHat 7.2, and the release of kernel is "2.4.7-10smp".
>
> The CPU0 has very heavy interrupt traffic,
> you can see the following information:
> >>>>>
> [root@giga root]# cat /proc/interrupts
> CPU0 CPU1
> 0: 395117 0 IO-APIC-edge timer
> 1: 653 0 IO-APIC-edge keyboard
> 2: 0 0 XT-PIC cascade
> 8: 1 0 IO-APIC-edge rtc
> 12: 23 0 IO-APIC-edge PS/2 Mouse
> 14: 2 0 IO-APIC-edge ide0
> 18: 30 0 IO-APIC-level aic7xxx
> 19: 86013 0 IO-APIC-level eth0
> 20: 10394 0 IO-APIC-level aic7xxx
> 21: 30 0 IO-APIC-level aic7xxx
> 27: 5480873 0 IO-APIC-level e1000
> 39: 164889152 0 IO-APIC-level e1000
> NMI: 0 0
> LOC: 395013 395012
> ERR: 0
> MIS: 0
> >>>>>
>
> The kernel's SMP option is enable, but the CPU1 is always idle.
> How to balance the interrpupts between two CPUs?
> If you are convenient, please give me some advice quickly.
>
> Thank you!
>
> Best regard
>
>
> -
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
--
_________________________________________________________________________
Terje Eggestad mailto:terje.eggestad@scali.no
Scali Scalable Linux Systems http://www.scali.com
Olaf Helsets Vei 6 tel: +47 22 62 89 61 (OFFICE)
P.O.Box 150, Oppsal +47 975 31 574 (MOBILE)
N-0619 Oslo fax: +47 22 62 89 51
NORWAY
_________________________________________________________________________
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: how to balance interrupts between 2 CPUs?
[not found] <b5926afe75.afe75b5926@water.pku.edu.cn>
` (3 preceding siblings ...)
2002-04-10 14:14 ` Terje Eggestad
@ 2002-04-10 14:31 ` Martin J. Bligh
4 siblings, 0 replies; 5+ messages in thread
From: Martin J. Bligh @ 2002-04-10 14:31 UTC (permalink / raw)
To: zxj, linux-kernel
> The kernel's SMP option is enable, but the CPU1 is always idle.
> How to balance the interrpupts between two CPUs?
> If you are convenient, please give me some advice quickly.
The P4 apics do not automatically balance interrupts between CPUs.
You need to do it explicitly - there are several ways floating
around to do this - try the APIC routing patch on this website:
http://sourceforge.net/projects/lse
and let us know if this works ...
M.
^ permalink raw reply [flat|nested] 5+ messages in thread