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From: "Petr Vandrovec" <VANDROVE@vc.cvut.cz>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: macro@ds2.pg.gda.pl (Maciej W. Rozycki),
	linux-kernel@vger.kernel.org (Kernel Mailing List),
	mingo@chiara.elte.hu
Subject: Re: Startup IPI (was: Re: test13-pre3)
Date: Tue, 19 Dec 2000 18:03:22 MET-1	[thread overview]
Message-ID: <1020BC8D12AC@vcnet.vc.cvut.cz> (raw)

On 18 Dec 00 at 23:51, Alan Cox wrote:

> > Yeah. Just do not read video memory when another CPU starts. I'll try
> > disabling cache on both CPUs, maybe it will make some difference, as
> > secondary CPU should start with caches disabled. But maybe that it is 
> > just broken AGP bus, and nothing else. But until I find what's really
> > broken on my hardware, I'd like to leave 'udelay(300)' in.
> 
> In the case where it boots does it also report mismatched MTRRs ??

Yes, it complains. But BIOS correctly reports x1/x2 depending on
number of CPUs I plug into motherboard, so I believe that it did
some initialization before it start loading OS.

calibrating APIC timer ...
..... CPU clock speed is 797.0452 MHz.
..... host bus clock speed is 99.6305 MHz.
cpu: 0, clocks: 996305, slice: 332101
CPU0<T0:996304,T1:664192,D:11,S:332101,C:996305>
cpu: 1, clocks: 996305, slice: 332101
CPU1<T0:996304,T1:332096,D:6,S:332101,C:996305>
checking TSC synchronization across CPUs: passed.
Setting commenced=1, go go go
mtrr: your CPUs had inconsistent variable MTRR settings
mtrr: probably your BIOS does not setup all CPUs

                                            Best regards,
                                                Petr Vandrovec
                                                vandrove@vc.cvut.cz
                                                
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             reply	other threads:[~2000-12-19 17:37 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2000-12-19 18:03 Petr Vandrovec [this message]
2000-12-19 18:27 ` Startup IPI (was: Re: test13-pre3) Alan Cox
  -- strict thread matches above, loose matches on Subject: below --
2000-12-20 20:29 Petr Vandrovec
2000-12-21 11:54 ` Maciej W. Rozycki
2000-12-19 21:18 Petr Vandrovec
2000-12-20 18:52 ` Maciej W. Rozycki
2000-12-19 18:49 Petr Vandrovec
2000-12-19 20:36 ` ferret
2000-12-20  3:37   ` ferret
2000-12-19  0:33 Petr Vandrovec
2000-12-18 23:51 ` Alan Cox
2000-12-19  5:59 ` ferret
2000-12-19 18:30 ` Maciej W. Rozycki
2000-12-18 19:19 Petr Vandrovec
2000-12-18 18:44 ` Maciej W. Rozycki

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