From: Luca Barbieri <ldb@ldb.ods.org>
To: David Woodhouse <dwmw2@infradead.org>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>,
Roman Zippel <zippel@linux-m68k.org>,
Linux-Kernel ML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] [2.5] asm-generic/atomic.h and changes to arm, parisc, mips, m68k, sh, cris to use it
Date: 12 Aug 2002 14:03:41 +0200 [thread overview]
Message-ID: <1029153821.4713.13.camel@ldb> (raw)
In-Reply-To: <20995.1029151008@redhat.com>
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On Mon, 2002-08-12 at 13:16, David Woodhouse wrote:
>
> alan@lxorguk.ukuu.org.uk said:
> > Possibly not - volatile doesnt guarantee the compiler won't do
> > x = 1
> > add *p into x
> > store x into *p
>
> Er, AIUI 'volatile' guarantees that '*p++' will do precisely that. It's a
> load, an add and a store, and the rules about volatile mean that the load
> and the store _must_ be separate.
I noticed that while testing how rmk's code behaved differently than
mine (and corrected in the v2 patch).
Before that, I just assumed that since the CPU must anyway issue a
separate load and store, the compiler would use the faster instruction
(that's why there is a LOCK prefix in the i386 instruction set).
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next prev parent reply other threads:[~2002-08-12 12:00 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-08-08 21:43 [PATCH] [2.5] asm-generic/atomic.h and changes to arm, parisc, mips, m68k, sh, cris to use it Luca Barbieri
2002-08-08 21:58 ` Roman Zippel
2002-08-08 22:11 ` Luca Barbieri
2002-08-08 22:27 ` Roman Zippel
2002-08-08 22:40 ` Luca Barbieri
2002-08-08 23:04 ` Roman Zippel
2002-08-09 0:11 ` Alan Cox
2002-08-08 23:09 ` Luca Barbieri
2002-08-09 3:52 ` H. Peter Anvin
2002-08-08 23:45 ` Alan Cox
2002-08-12 11:16 ` David Woodhouse
2002-08-12 12:03 ` Luca Barbieri [this message]
2002-08-08 23:29 ` Russell King
2002-08-09 0:41 ` [PATCH] [2.5] (v2) " Luca Barbieri
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