Re: Intel P6 vs P7 system call performance

Pavel Machek
2002-12-19T22:20:23Z

Hi!

> >>>>don't many of the multi-CPU problems with tsc go away because you've got a
> >>>>per-cpu physical page for the vsyscall?
> >>>>
> >>>>i.e. per-cpu tsc epoch and scaling can be set on that page.
> >>>
> >>>Problem is that cpu's can randomly drift +/- 100 clocks or so... Not
> >>>nice at all.
> >>>
> >>
> >>­­?100 clocks is what... ?50 ns these days? You can't get that kind of
> >>accuracy for anything outside the CPU core anyway...
> >
> > 50ns is bad enough when it makes your time go backwards.
> >
>
> Backwards?? Clock spreading should make the rate change, but it should
> never decrement.

User on cpu1 reads time, communicates it to cpu2, but cpu2 is drifted
-50ns, so it reads time "before" time reported cpu1. And gets confused.

Pavel
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