Re: Page aging broken in 2.6

[Benjamin Herrenschmidt <benh@kernel.crashing.org>]

> Yeah, all hail bad MMU's.

Bad MMUs or our architetured beeing tied to one MMU type ? :)

(Note that I'm no special fan of our PPC hash table, it seems
to be fairly bad with the cache).

Note also that the need for a flush isn't tied to that fact we
have a hash table but to how we use it in linux. If we used the
real HW A and D bits and had ptep_test_and_clear* actually walk
the hash and use them, we could avoid the flush the same way in
this case.

But we do not, we use the hash as a big TLB cache and consider
any page in there as accessed and any writeable page in there as
diry, so clearing those bits requires evicting from the hash
(hash misses, at least on ppc32, are fairly cheap though).

> Hash tables may need some kind of "not very urgent TLB flush" thing, so 
> that it doesn't penalize sane architectures.

Or do what I propose here, that is have ptep_test_and_clear_* be
responsible for the flush on archs where it is necessary, but then
it would be nice to have more than the ptep as an argument...

Ben.