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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: "David S. Miller" <davem@redhat.com>
Cc: Olaf Hering <olh@suse.de>,
	Linux Kernel list <linux-kernel@vger.kernel.org>
Subject: Re: consistent_sync_for_cpu() and friends on ppc32
Date: Tue, 16 Mar 2004 12:36:07 +1100	[thread overview]
Message-ID: <1079400967.2302.213.camel@gaston> (raw)
In-Reply-To: <20040315164917.6a85966b.davem@redhat.com>


> 1) User prepares buffer X with data.
> 2) pci_map_single(X, TO_DEVICE)
> 3) Device does DMA, interrupts cpu.
> 4) pci_dma_sync_single_for_cpu(X)
> 5) Write new contents.
> 6) pci_dma_sync_single_for_device(X)
> 7) Device does DMA again, interrupts cpu.
> 8) ...
> 
> Step 2 would writeback flush the cpu cache, step 4 would be a NOP,
> step 6 would writeback flush the cpu cache.
> 
> The direction does not provide enough information to do these operations
> with the right amount of information.

Hrm... I'm still not sure how I'm supposed to implement those
for non-consistent PPCs (embedded). We don't carry state information
around, so I suppose I'll have to rely on the direction beeing the
same for the whole duration of the operation... In which case, it's
just a matter of having for_cpu nop'ing when direction is TO_DEVICE
and for_device nop'ing when direction is FROM_DEVICE ? Not clear
imho...

Ben.



  reply	other threads:[~2004-03-16  1:45 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-03-15 20:16 consistent_sync_for_cpu() and friends on ppc32 Olaf Hering
2004-03-15 20:36 ` David S. Miller
2004-03-15 21:59   ` Benjamin Herrenschmidt
2004-03-16  0:23   ` Benjamin Herrenschmidt
2004-03-16  0:49     ` David S. Miller
2004-03-16  1:36       ` Benjamin Herrenschmidt [this message]
2004-03-16 18:46         ` David S. Miller
2004-03-16 21:54           ` Benjamin Herrenschmidt

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