Re: [PATCH] SIS AGP clean up, blacklist and module options

Re: [PATCH] SIS AGP clean up, blacklist and module options

[Heilmann, Oliver]

> From: Andrew Morton <akpm@osdl.org>
> To: Oliver Heilmann <heilmano@yahoo.com>
> Subject: Re: [PATCH] SIS AGP clean up, blacklist and module options
> Date: Sun, 25 Apr 2004 22:05:51 -0700
> 
> Oliver Heilmann <heilmano@yahoo.com> wrote:
> >
> > Sorry, I'm not used to using yahoo webmail. It
> > stupidly wrapped all the lines. Patch vs 2.6.5. is
> > attached.
> 
> Generates several non-trivial rejects against the current kernel.
> 
> Please update the patch and resend both the patch and the description
of
> the changes which it makes, thanks.
> 
> (Patches in `patch -p1' format are preferred, btw).

Mildly embarrassed. Sorry about wasting everybody's time.
Btw. Documentation/SubmittingPatches seems to suggest -p0, At least for
single file patches.

Anyway, here it is again (tested and -p1):

* renamed sis_648_enable to sis_delayed_enable and removed chipset
references

* All chipsets that require the sis delay-hack are listed in
sis_broken_chipsets (and no other place).

* There are two new module options to force agp3-spec compliant
initialisation and/or the delay hack. As I only have a 648FX chipset to
test on, I figured this might be useful to experiment with on other
chipsets (i.e.746[FX]).

Basically, if you have an  SiS chipset and your machine freezes when you
start X, try the -agp_sis_force_delay=1 option. If this fixes your
problem add your PCI ID to sis_broken_chipsets in sis-agp.c
Note to 746[FX] people: I'm still not sure what the differences between
the two 746 versions and the 648 series are. If this patch does not work
for you try playing with the agp_sis_agp_spec module option. Any
feedback is greatly appreciated.

Oliver

--- linux-2.6.5/drivers/char/agp/sis-agp.c.orig	2004-04-04 04:36:16.000000000 +0100
+++ linux-2.6.5/drivers/char/agp/sis-agp.c	2004-04-26 09:13:03.000000000 +0100
@@ -13,6 +13,8 @@
 #define SIS_TLBCNTRL	0x97
 #define SIS_TLBFLUSH	0x98
 
+static int __devinitdata agp_sis_force_delay = 0;
+static int __devinitdata agp_sis_agp_spec = -1;
 
 static int sis_fetch_size(void)
 {
@@ -67,7 +69,7 @@ static void sis_cleanup(void)
 			      (previous_size->size_value & ~(0x03)));
 }
 
-static void sis_648_enable(u32 mode)
+static void sis_delayed_enable(u32 mode)
 {
 	struct pci_dev *device = NULL;
 	u32 command;
@@ -93,10 +95,13 @@ static void sis_648_enable(u32 mode)
 
 		pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
 
-		if(device->device == PCI_DEVICE_ID_SI_648) {
-			// weird: on 648 and 648fx chipsets any rate change in the target command register
-			// triggers a 5ms screwup during which the master cannot be configured
-			printk(KERN_INFO PFX "sis 648 agp fix - giving bridge time to recover\n");
+		/*
+		 * Weird: on some sis chipsets any rate change in the target
+		 * command register triggers a 5ms screwup during which the master
+		 * cannot be configured		 
+		 */
+		if (device->device == agp_bridge->dev->device) {
+			printk(KERN_INFO PFX "SiS delay workaround: giving bridge time to recover.\n");
 			set_current_state(TASK_UNINTERRUPTIBLE);
 			schedule_timeout (1+(HZ*10)/1000);
 		}
@@ -219,21 +224,35 @@ static struct agp_device_ids sis_agp_dev
 };
 

+// chipsets that require the 'delay hack'
+static int sis_broken_chipsets[] __devinitdata = {
+	PCI_DEVICE_ID_SI_648,
+	PCI_DEVICE_ID_SI_746,
+	0 // terminator
+};
+
 static void __devinit sis_get_driver(struct agp_bridge_data *bridge)
 {
-	if (bridge->dev->device == PCI_DEVICE_ID_SI_648) {
-		if (agp_bridge->major_version == 3 && agp_bridge->minor_version < 5) {
-			sis_driver.agp_enable=sis_648_enable;
-		} else {
-			sis_driver.agp_enable			= sis_648_enable;
-			sis_driver.aperture_sizes		= agp3_generic_sizes;
-			sis_driver.size_type			= U16_APER_SIZE;
-			sis_driver.num_aperture_sizes	= AGP_GENERIC_SIZES_ENTRIES;
-			sis_driver.configure			= agp3_generic_configure;
-			sis_driver.fetch_size			= agp3_generic_fetch_size;
-			sis_driver.cleanup				= agp3_generic_cleanup;
-			sis_driver.tlb_flush			= agp3_generic_tlbflush;
-		}
+	int i;
+
+	for(i=0; sis_broken_chipsets[i]!=0; ++i)
+		if(bridge->dev->device==sis_broken_chipsets[i])
+			break;
+	
+	if(sis_broken_chipsets[i] || agp_sis_force_delay)
+		sis_driver.agp_enable=sis_delayed_enable;
+
+	// sis chipsets that indicate less than agp3.5
+	// are not actually fully agp3 compliant
+	if ((agp_bridge->major_version == 3 && agp_bridge->minor_version >= 5
+	     && agp_sis_agp_spec!=0) || agp_sis_agp_spec==1) {
+		sis_driver.aperture_sizes = agp3_generic_sizes;
+		sis_driver.size_type = U16_APER_SIZE;
+		sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
+		sis_driver.configure = agp3_generic_configure;
+		sis_driver.fetch_size = agp3_generic_fetch_size;
+		sis_driver.cleanup = agp3_generic_cleanup;
+		sis_driver.tlb_flush = agp3_generic_tlbflush;
 	}
 }
 
@@ -324,4 +343,8 @@ static void __exit agp_sis_cleanup(void)
 module_init(agp_sis_init);
 module_exit(agp_sis_cleanup);
 
+MODULE_PARM(agp_sis_force_delay,"i");
+MODULE_PARM_DESC(agp_sis_force_delay,"forces sis delay hack");
+MODULE_PARM(agp_sis_agp_spec,"i");
+MODULE_PARM_DESC(agp_sis_agp_spec,"0=force sis init, 1=force generic agp3 init, default: autodetect");
 MODULE_LICENSE("GPL and additional rights");



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Re: [PATCH] SIS AGP vs 2.6.6-rc2

[Heilmann, Oliver]

And here it is yet again this time diffed against 2.6.6-rc2 plus latest
cset (patches cleanly onto "vanilla" 2.6.6.-rc2 too). I've included the
description again:


* renamed sis_648_enable to sis_delayed_enable and removed chipset
  references

* All chipsets that require the sis delay-hack are listed in
 sis_broken_chipsets (and no other place).

* There are two new module options to force agp3-spec compliant
initialisation and/or the delay hack. As I only have a 648FX chipset to
test on, I figured this might be useful to experiment with on other
chipsets (i.e.746[FX]).

Basically, if you have an  SiS chipset and your machine freezes when you
start X, try the -agp_sis_force_delay=1 option. If this fixes your
problem add your PCI ID to sis_broken_chipsets in sis-agp.c
Note to 746[FX] people: I'm still not sure what the differences between
the two 746 versions and the 648 series are. If this patch does not work
for you try playing with the agp_sis_agp_spec module option. Any
feedback is greatly appreciated.

Oliver

--- linux-2.6.6-rc2.latest/drivers/char/agp/sis-agp.c.orig	2004-04-27 11:22:45.000000000 +0100
+++ linux-2.6.6-rc2.latest/drivers/char/agp/sis-agp.c	2004-04-27 11:35:17.000000000 +0100
@@ -13,6 +13,8 @@
 #define SIS_TLBCNTRL	0x97
 #define SIS_TLBFLUSH	0x98
 
+static int __devinitdata agp_sis_force_delay = 0;
+static int __devinitdata agp_sis_agp_spec = -1;
 
 static int sis_fetch_size(void)
 {
@@ -67,7 +69,7 @@ static void sis_cleanup(void)
 			      (previous_size->size_value & ~(0x03)));
 }
 
-static void sis_648_enable(u32 mode)
+static void sis_delayed_enable(u32 mode)
 {
 	struct pci_dev *device = NULL;
 	u32 command;
@@ -94,13 +96,12 @@ static void sis_648_enable(u32 mode)
 		pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
 
 		/*
-		 * Weird: on 648(fx) and 746(fx) chipsets any rate change in the target
+		 * Weird: on some sis chipsets any rate change in the target
 		 * command register triggers a 5ms screwup during which the master
 		 * cannot be configured		 
 		 */
-		if (device->device == PCI_DEVICE_ID_SI_648 ||
-		    device->device == PCI_DEVICE_ID_SI_746) {
-			printk(KERN_INFO PFX "SiS chipset with AGP problems detected. Giving bridge time to recover.\n");
+		if (device->device == agp_bridge->dev->device) {
+			printk(KERN_INFO PFX "SiS delay workaround: giving bridge time to recover.\n");
 			set_current_state(TASK_UNINTERRUPTIBLE);
 			schedule_timeout (1+(HZ*10)/1000);
 		}
@@ -223,28 +224,35 @@ static struct agp_device_ids sis_agp_dev
 };
 

+// chipsets that require the 'delay hack'
+static int sis_broken_chipsets[] __devinitdata = {
+	PCI_DEVICE_ID_SI_648,
+	PCI_DEVICE_ID_SI_746,
+	0 // terminator
+};
+
 static void __devinit sis_get_driver(struct agp_bridge_data *bridge)
 {
-	if (bridge->dev->device == PCI_DEVICE_ID_SI_648) { 
-		sis_driver.agp_enable=sis_648_enable;
-		if (agp_bridge->major_version == 3) {
-			sis_driver.aperture_sizes = agp3_generic_sizes;
-			sis_driver.size_type = U16_APER_SIZE;
-			sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
-			sis_driver.configure = agp3_generic_configure;
-			sis_driver.fetch_size = agp3_generic_fetch_size;
-			sis_driver.cleanup = agp3_generic_cleanup;
-			sis_driver.tlb_flush = agp3_generic_tlbflush;
-		}
-	}
+	int i;
 
-	if (bridge->dev->device == PCI_DEVICE_ID_SI_746) {
-		/*
-		 * We don't know enough about the 746 to enable it properly.
-		 * Though we do know that it needs the 'delay' hack to settle
-		 * after changing modes.
-		 */
-		sis_driver.agp_enable=sis_648_enable;
+	for(i=0; sis_broken_chipsets[i]!=0; ++i)
+		if(bridge->dev->device==sis_broken_chipsets[i])
+			break;
+	
+	if(sis_broken_chipsets[i] || agp_sis_force_delay)
+		sis_driver.agp_enable=sis_delayed_enable;
+
+	// sis chipsets that indicate less than agp3.5
+	// are not actually fully agp3 compliant
+	if ((agp_bridge->major_version == 3 && agp_bridge->minor_version >= 5
+	     && agp_sis_agp_spec!=0) || agp_sis_agp_spec==1) {
+		sis_driver.aperture_sizes = agp3_generic_sizes;
+		sis_driver.size_type = U16_APER_SIZE;
+		sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
+		sis_driver.configure = agp3_generic_configure;
+		sis_driver.fetch_size = agp3_generic_fetch_size;
+		sis_driver.cleanup = agp3_generic_cleanup;
+		sis_driver.tlb_flush = agp3_generic_tlbflush;
 	}
 }
 
@@ -335,4 +343,8 @@ static void __exit agp_sis_cleanup(void)
 module_init(agp_sis_init);
 module_exit(agp_sis_cleanup);
 
+MODULE_PARM(agp_sis_force_delay,"i");
+MODULE_PARM_DESC(agp_sis_force_delay,"forces sis delay hack");
+MODULE_PARM(agp_sis_agp_spec,"i");
+MODULE_PARM_DESC(agp_sis_agp_spec,"0=force sis init, 1=force generic agp3 init, default: autodetect");
 MODULE_LICENSE("GPL and additional rights");



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via e-mail return. If you have received this e-mail in error or wish to read our
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Re: [PATCH] SIS AGP vs 2.6.6-rc2

[Hemmann, Volker Armin]

[-- Attachment #1: Type: text/plain, Size: 616 bytes --]

Hi,
I tried your patch and is has rejects again:
energy linux # patch -p1 < sis.agp.patch
patching file drivers/char/agp/sis-agp.c
Hunk #1 succeeded at 13 with fuzz 2.
Hunk #2 succeeded at 69 with fuzz 2.
Hunk #3 FAILED at 96.
Hunk #4 FAILED at 224.
2 out of 5 hunks FAILED -- saving rejects to file 
drivers/char/agp/sis-agp.c.rej

Attached is the .rej file. 

Glück Auf
Volker

-- 
Conclusions
 In a straight-up fight, the Empire squashes the Federation like a bug. Even 
with its numerical advantage removed, the Empire would still squash the 
Federation like a bug. Accept it. -Michael Wong

[-- Attachment #2: sis-agp.c.rej --]
[-- Type: text/x-diff, Size: 3954 bytes --]

***************
*** 94,106 ****
                 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
  
                 /*
-                 * Weird: on 648(fx) and 746(fx) chipsets any rate change in the target
                  * command register triggers a 5ms screwup during which the master
                  * cannot be configured          
                  */
-                if (device->device == PCI_DEVICE_ID_SI_648 ||
-                    device->device == PCI_DEVICE_ID_SI_746) {
-                        printk(KERN_INFO PFX "SiS chipset with AGP problems detected. Giving bridge time to recover.\n");
                         set_current_state(TASK_UNINTERRUPTIBLE);
                         schedule_timeout (1+(HZ*10)/1000);
                 }
--- 96,107 ----
                 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
  
                 /*
+                 * Weird: on some sis chipsets any rate change in the target
                  * command register triggers a 5ms screwup during which the master
                  * cannot be configured          
                  */
+                if (device->device == agp_bridge->dev->device) {
+                        printk(KERN_INFO PFX "SiS delay workaround: giving bridge time to recover.\n");
                         set_current_state(TASK_UNINTERRUPTIBLE);
                         schedule_timeout (1+(HZ*10)/1000);
                 }
***************
*** 223,250 ****
  };
  
  
  static void __devinit sis_get_driver(struct agp_bridge_data *bridge)
  {
-        if (bridge->dev->device == PCI_DEVICE_ID_SI_648) { 
-                sis_driver.agp_enable=sis_648_enable;
-                if (agp_bridge->major_version == 3) {
-                        sis_driver.aperture_sizes = agp3_generic_sizes;
-                        sis_driver.size_type = U16_APER_SIZE;
-                        sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
-                        sis_driver.configure = agp3_generic_configure;
-                        sis_driver.fetch_size = agp3_generic_fetch_size;
-                        sis_driver.cleanup = agp3_generic_cleanup;
-                        sis_driver.tlb_flush = agp3_generic_tlbflush;
-                }
-        }
  
-        if (bridge->dev->device == PCI_DEVICE_ID_SI_746) {
-                /*
-                 * We don't know enough about the 746 to enable it properly.
-                 * Though we do know that it needs the 'delay' hack to settle
-                 * after changing modes.
-                 */
-                sis_driver.agp_enable=sis_648_enable;
         }
  }
  
--- 224,258 ----
  };
  
  
+ // chipsets that require the 'delay hack'
+ static int sis_broken_chipsets[] __devinitdata = {
+        PCI_DEVICE_ID_SI_648,
+        PCI_DEVICE_ID_SI_746,
+        0 // terminator
+ };
+ 
  static void __devinit sis_get_driver(struct agp_bridge_data *bridge)
  {
+        int i;
  
+        for(i=0; sis_broken_chipsets[i]!=0; ++i)
+                if(bridge->dev->device==sis_broken_chipsets[i])
+                        break;
+        
+        if(sis_broken_chipsets[i] || agp_sis_force_delay)
+                sis_driver.agp_enable=sis_delayed_enable;
+ 
+        // sis chipsets that indicate less than agp3.5
+        // are not actually fully agp3 compliant
+        if ((agp_bridge->major_version == 3 && agp_bridge->minor_version >= 5
+             && agp_sis_agp_spec!=0) || agp_sis_agp_spec==1) {
+                sis_driver.aperture_sizes = agp3_generic_sizes;
+                sis_driver.size_type = U16_APER_SIZE;
+                sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
+                sis_driver.configure = agp3_generic_configure;
+                sis_driver.fetch_size = agp3_generic_fetch_size;
+                sis_driver.cleanup = agp3_generic_cleanup;
+                sis_driver.tlb_flush = agp3_generic_tlbflush;
         }
  }
  

Re: [PATCH] SIS AGP vs 2.6.6-rc2

[Heilmann, Oliver]

The patch works! (Just to be sure I tried it again with the posting I
received back from vger.). Make sure you don't screw up the tabs when
you copy and paste. I always save the entire mail to a patch file.

On Tue, 2004-04-27 at 18:29, Hemmann, Volker Armin wrote:
> Hi,
> I tried your patch and is has rejects again:
> energy linux # patch -p1 < sis.agp.patch
> patching file drivers/char/agp/sis-agp.c
> Hunk #1 succeeded at 13 with fuzz 2.
> Hunk #2 succeeded at 69 with fuzz 2.
> Hunk #3 FAILED at 96.
> Hunk #4 FAILED at 224.
> 2 out of 5 hunks FAILED -- saving rejects to file 
> drivers/char/agp/sis-agp.c.rej
> 
> Attached is the .rej file. 
> 
> Glück Auf
> Volker


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written permission of the sender. If you are not the intended recipient, please 
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Re: [PATCH] SIS AGP vs 2.6.6-rc2

[Heilmann, Oliver]

I forgot, this (-l) will probably do the trick for you:
patch -p1 -l < sis.agp.patch

On Tue, 2004-04-27 at 18:29, Hemmann, Volker Armin wrote:
> Hi,
> I tried your patch and is has rejects again:
> energy linux # patch -p1 < sis.agp.patch
> patching file drivers/char/agp/sis-agp.c
> Hunk #1 succeeded at 13 with fuzz 2.
> Hunk #2 succeeded at 69 with fuzz 2.
> Hunk #3 FAILED at 96.
> Hunk #4 FAILED at 224.
> 2 out of 5 hunks FAILED -- saving rejects to file 
> drivers/char/agp/sis-agp.c.rej
> 
> Attached is the .rej file. 
> 
> Glück Auf
> Volker


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addressee. Access by any other party is unauthorised without the express
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Re: [PATCH] SIS AGP vs 2.6.6-rc2

[Hemmann, Volker Armin]

Hi,

I tried the gzip'ed patch and it applied cleanly. 
testgart works and gives the usual results, dmesg is ok, showing the warning.

Nvidia is not working with 2.6.6-rc2, so I do not know exactly that everything 
is ok, but if testgart is fine, X had no problems in the past.

Glück Auf
Volker

-- 
Conclusions
 In a straight-up fight, the Empire squashes the Federation like a bug. Even 
with its numerical advantage removed, the Empire would still squash the 
Federation like a bug. Accept it. -Michael Wong

Crash in 2.6.6-rc3-mm1 (SiS/Radeon)

[Adrian Bunk]

Hi Oliver,

2.6.6-rc3-mm1 contains your patch.

My computer is usually very stable, but I had the following strange 
crash [1]:

- running XFree86 4.3.0 (from Debian unstable) with FVWM and 3x3 virtual 
  terminals
- in one xterm a kernel compile that was most likely at the final
  linking (IOW: medium cpu and IO load - I heard my HD working)

I suddenly saw in my virtual terminal the outlines of a xclock in a 
different virtual terminal (but not the content).

After a Ctrl-Alt-F5 and Alt-F5 I'm also in 2.6.6-rc3-mm1 seeing for 
a short time the following:
- in the lower half of the window the lower half of the X window
- in the left upper half and the right upper half of the window
  two copies of tty5

But in the case of the crash, this didn't vanish any more.

At boot time, the kernel said:
May  1 12:07:01 r063144 kernel: agpgart: Found an AGP 2.0 compliant device at 0000:00:00.0.
May  1 12:07:01 r063144 kernel: agpgart: Putting AGP V3 device at 0000:00:00.0 into 4x mode
May  1 12:07:01 r063144 kernel: agpgart: SiS delay workaround: giving bridge time to recover.
May  1 12:07:01 r063144 kernel: agpgart: Putting AGP V3 device at 0000:01:00.0 into 4x mode

My hardware is:

0000:00:00.0 Host bridge: Silicon Integrated Systems [SiS] 746 Host (rev 10)
        Subsystem: Unknown device 1849:0746
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
        Latency: 0
        Region 0: Memory at d0000000 (32-bit, non-prefetchable)
        Capabilities: [c0] AGP version 2.0
                Status: RQ=32 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit- FW+ AGP3- Rate=x1,x2,x4
                Command: RQ=1 ArqSz=0 Cal=0 SBA+ AGP+ GART64- 64bit- FW- Rate=x1

0000:01:00.0 VGA compatible controller: ATI Technologies Inc Radeon 
RV100 QY [Radeon 7000/VE] (prog-if 00 [VGA])
        Subsystem: C.P. Technology Co. Ltd: Unknown device 2072
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR+ FastB2B-
        Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 32 (2000ns min), Cache Line Size: 0x08 (32 bytes)
        Interrupt: pin A routed to IRQ 11
        Region 0: Memory at c0000000 (32-bit, prefetchable)
        Region 1: I/O ports at b800 [size=256]
        Region 2: Memory at cfef0000 (32-bit, non-prefetchable) [size=64K]
        Capabilities: [58] AGP version 2.0
                Status: RQ=48 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit- FW- AGP3- Rate=x1,x2,x4
                Command: RQ=32 ArqSz=0 Cal=0 SBA+ AGP+ GART64- 64bit- FW- Rate=x1
        Capabilities: [50] Power Management version 2
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-


Radeon framebuffer support is compiled into the kernel, but X is 
configured not to use it.


cu
Adrian

[1] the SiS AGP patch is first possible suspect, but it might be 
    unrelated

-- 

       "Is there not promise of rain?" Ling Tan asked suddenly out
        of the darkness. There had been need of rain for many days.
       "Only a promise," Lao Er said.
                                       Pearl S. Buck - Dragon Seed

Re: Crash in 2.6.6-rc3-mm1 (SiS/Radeon)

[Heilmann, Oliver]

It's possible that this is indeed an AGP problem (the 746 hasn't
received a lot of testing yet).
However, I don't think it's related to the patch. The only change it
introduces for your chip is the delay-hack, which I don't think could
adversely affect stability.
_If_ it is an AGP problem it might be a GART screw-up.
Here's a bunch of things you can do/try:

1. Run testgart.

2. Tell me which kernel version you were running when you thought your
system was stable. (Are you sure you were even using agp?)

3. Send me the output of lspci -s0 -vvv -xxx and lspci -s1 -vvv -xxx
   preferably when X is up.

Thanks for testing,

Oliver

On Sat, 2004-05-01 at 13:08, Adrian Bunk wrote:
> Hi Oliver,
> 
> 2.6.6-rc3-mm1 contains your patch.
> 
> My computer is usually very stable, but I had the following strange 
> crash [1]:
> 
> - running XFree86 4.3.0 (from Debian unstable) with FVWM and 3x3 virtual 
>   terminals
> - in one xterm a kernel compile that was most likely at the final
>   linking (IOW: medium cpu and IO load - I heard my HD working)
> 
> I suddenly saw in my virtual terminal the outlines of a xclock in a 
> different virtual terminal (but not the content).
> 
> After a Ctrl-Alt-F5 and Alt-F5 I'm also in 2.6.6-rc3-mm1 seeing for 
> a short time the following:
> - in the lower half of the window the lower half of the X window
> - in the left upper half and the right upper half of the window
>   two copies of tty5
> 
> But in the case of the crash, this didn't vanish any more.
> 
> At boot time, the kernel said:
> May  1 12:07:01 r063144 kernel: agpgart: Found an AGP 2.0 compliant device at 0000:00:00.0.
> May  1 12:07:01 r063144 kernel: agpgart: Putting AGP V3 device at 0000:00:00.0 into 4x mode
> May  1 12:07:01 r063144 kernel: agpgart: SiS delay workaround: giving bridge time to recover.
> May  1 12:07:01 r063144 kernel: agpgart: Putting AGP V3 device at 0000:01:00.0 into 4x mode
> 
> My hardware is:
> 
> 0000:00:00.0 Host bridge: Silicon Integrated Systems [SiS] 746 Host (rev 10)
>         Subsystem: Unknown device 1849:0746
>         Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
>         Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
>         Latency: 0
>         Region 0: Memory at d0000000 (32-bit, non-prefetchable)
>         Capabilities: [c0] AGP version 2.0
>                 Status: RQ=32 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit- FW+ AGP3- Rate=x1,x2,x4
>                 Command: RQ=1 ArqSz=0 Cal=0 SBA+ AGP+ GART64- 64bit- FW- Rate=x1
> 
> 0000:01:00.0 VGA compatible controller: ATI Technologies Inc Radeon 
> RV100 QY [Radeon 7000/VE] (prog-if 00 [VGA])
>         Subsystem: C.P. Technology Co. Ltd: Unknown device 2072
>         Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR+ FastB2B-
>         Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
>         Latency: 32 (2000ns min), Cache Line Size: 0x08 (32 bytes)
>         Interrupt: pin A routed to IRQ 11
>         Region 0: Memory at c0000000 (32-bit, prefetchable)
>         Region 1: I/O ports at b800 [size=256]
>         Region 2: Memory at cfef0000 (32-bit, non-prefetchable) [size=64K]
>         Capabilities: [58] AGP version 2.0
>                 Status: RQ=48 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit- FW- AGP3- Rate=x1,x2,x4
>                 Command: RQ=32 ArqSz=0 Cal=0 SBA+ AGP+ GART64- 64bit- FW- Rate=x1
>         Capabilities: [50] Power Management version 2
>                 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
>                 Status: D0 PME-Enable- DSel=0 DScale=0 PME-
> 
> 
> Radeon framebuffer support is compiled into the kernel, but X is 
> configured not to use it.
> 
> 
> cu
> Adrian
> 
> [1] the SiS AGP patch is first possible suspect, but it might be 
>     unrelated


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Re: Crash in 2.6.6-rc3-mm1 (SiS/Radeon)

[Adrian Bunk]

Hi Oliver,

first of all sorry for my very late answer.

It seems the crash I experienced was caused by something else, and not 
by your AGP patch.

cu
Adrian

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[PATCH] SIS AGP clean up, blacklist and module options

[Oliver Heilmann]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=us-ascii, Size: 5361 bytes --]

Hello,

This patch is to clean up the mess in sis-agp.c.
Here's what changed:

* All chipsets that require the sis delay-hack are
listed in sis_broken_chipsets (and no other place).

* There are two new module options to force agp3-spec
compliant initialisation and/or the delay hack. As I
only have a 648FX chipset to test on, I figured this
might be useful to experiment with on other chipsets
(i.e.746[FX]).

Basically, if you have an  SiS chipset and your
machine freezes when you start X, try the
-agp_sis_force_delay=1 option. If this fixes your
problem add your PCI ID to sis_broken_chipsets in
sis-agp.c
Note to 746[FX] people: I'm still not sure what the
differences between the two 746 versions and the 648
series are. If this patch does not work for you try
playing with the agp_sis_agp_spec module option.
Any feedback is greatly appreciated.

Oliver

--- drivers/char/agp/sis-agp.c.orig     2004-04-23
23:14:35.000000000 +0100
+++ drivers/char/agp/sis-agp.c  2004-04-23
19:51:46.000000000 +0100
@@ -13,6 +13,8 @@
 #define SIS_TLBCNTRL   0x97
 #define SIS_TLBFLUSH   0x98

+static int __devinitdata agp_sis_force_delay = 0;
+static int __devinitdata agp_sis_agp_spec = -1;

 static int sis_fetch_size(void)
 {
@@ -67,7 +69,7 @@ static void sis_cleanup(void)
                             
(previous_size->size_value & ~(0x03)));
 }

-static void sis_648_enable(u32 mode)
+static void sis_delayed_enable(u32 mode)
 {
        struct pci_dev *device = NULL;
        u32 command;
@@ -93,10 +95,13 @@ static void sis_648_enable(u32
mode)

                pci_write_config_dword(device, agp +
PCI_AGP_COMMAND, command);

-               if(device->device ==
PCI_DEVICE_ID_SI_648) {
-                       // weird: on 648 and 648fx
chipsets any rate change in the target command
register
-                       // triggers a 5ms screwup
during which the master cannot be configured
-                       printk(KERN_INFO PFX "sis 648
agp fix - giving bridge time to recover\n");
+               /*
+                * Weird: on some sis chipsets any
rate change in the target
+                * command register triggers a 5ms
screwup during which the master
+                * cannot be configured
+                */
+               if (device->device ==
agp_bridge->dev->device) {
+                       printk(KERN_INFO PFX "SiS
delay workaround: giving bridge time to recover.\n");
                       
set_current_state(TASK_UNINTERRUPTIBLE);
                        schedule_timeout
(1+(HZ*10)/1000);
                }
@@ -219,21 +224,35 @@ static struct agp_device_ids
sis_agp_dev
 };


+// chipsets that require the 'delay hack'
+static int sis_broken_chipsets[] __devinitdata = {
+       PCI_DEVICE_ID_SI_648,
+       PCI_DEVICE_ID_SI_746,
+       0 // terminator
+};
+
 static void __devinit sis_get_driver(struct
agp_bridge_data *bridge)
 {
-       if (bridge->dev->device ==
PCI_DEVICE_ID_SI_648) {
-               if (agp_bridge->major_version == 3 &&
agp_bridge->minor_version < 5) {
-                      
sis_driver.agp_enable=sis_648_enable;
-               } else {
-                       sis_driver.agp_enable         
         = sis_648_enable;
-                       sis_driver.aperture_sizes     
         = agp3_generic_sizes;
-                       sis_driver.size_type          
         = U16_APER_SIZE;
-                       sis_driver.num_aperture_sizes 
 = AGP_GENERIC_SIZES_ENTRIES;
-                       sis_driver.configure          
         = agp3_generic_configure;
-                       sis_driver.fetch_size         
         = agp3_generic_fetch_size;
-                       sis_driver.cleanup            
                 = agp3_generic_cleanup;
-                       sis_driver.tlb_flush          
         = agp3_generic_tlbflush;
-               }
+       int i;
+
+       for(i=0; sis_broken_chipsets[i]!=0; ++i)
+              
if(bridge->dev->device==sis_broken_chipsets[i])
+                       break;
+
+       if(sis_broken_chipsets[i] ||
agp_sis_force_delay)
+              
sis_driver.agp_enable=sis_delayed_enable;
+
+       // sis chipsets that indicate less than agp3.5
+       // are not actually fully agp3 compliant
+       if ((agp_bridge->major_version == 3 &&
agp_bridge->minor_version >= 5
+            && agp_sis_agp_spec!=0) ||
agp_sis_agp_spec==1) {
+               sis_driver.aperture_sizes =
agp3_generic_sizes;
+               sis_driver.size_type = U16_APER_SIZE;
+               sis_driver.num_aperture_sizes =
AGP_GENERIC_SIZES_ENTRIES;
+               sis_driver.configure =
agp3_generic_configure;
+               sis_driver.fetch_size =
agp3_generic_fetch_size;
+               sis_driver.cleanup =
agp3_generic_cleanup;
+               sis_driver.tlb_flush =
agp3_generic_tlbflush;
        }
 }

@@ -324,4 +343,8 @@ static void __exit
agp_sis_cleanup(void)
 module_init(agp_sis_init);
 module_exit(agp_sis_cleanup);

+MODULE_PARM(agp_sis_force_delay,"i");
+MODULE_PARM_DESC(agp_sis_force_delay,"forces sis
delay hack");
+MODULE_PARM(agp_sis_agp_spec,"i");
+MODULE_PARM_DESC(agp_sis_agp_spec,"0=force sis init,
1=force generic agp3 init, default: autodetect");
 MODULE_LICENSE("GPL and additional rights");



	
		
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Re: [PATCH] SIS AGP clean up, blacklist and module options

[Oliver Heilmann]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=us-ascii, Size: 267 bytes --]

Sorry, I'm not used to using yahoo webmail. It
stupidly wrapped all the lines. Patch vs 2.6.5. is
attached.

Oliver


	
		
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[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: sis-agp.patch --]
[-- Type: text/x-diff; name="sis-agp.patch", Size: 3527 bytes --]

--- drivers/char/agp/sis-agp.c.orig	2004-04-23 23:14:35.000000000 +0100
+++ drivers/char/agp/sis-agp.c	2004-04-23 19:51:46.000000000 +0100
@@ -13,6 +13,8 @@
 #define SIS_TLBCNTRL	0x97
 #define SIS_TLBFLUSH	0x98
 
+static int __devinitdata agp_sis_force_delay = 0;
+static int __devinitdata agp_sis_agp_spec = -1;
 
 static int sis_fetch_size(void)
 {
@@ -67,7 +69,7 @@ static void sis_cleanup(void)
 			      (previous_size->size_value & ~(0x03)));
 }
 
-static void sis_648_enable(u32 mode)
+static void sis_delayed_enable(u32 mode)
 {
 	struct pci_dev *device = NULL;
 	u32 command;
@@ -93,10 +95,13 @@ static void sis_648_enable(u32 mode)
 
 		pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
 
-		if(device->device == PCI_DEVICE_ID_SI_648) {
-			// weird: on 648 and 648fx chipsets any rate change in the target command register
-			// triggers a 5ms screwup during which the master cannot be configured
-			printk(KERN_INFO PFX "sis 648 agp fix - giving bridge time to recover\n");
+		/*
+		 * Weird: on some sis chipsets any rate change in the target
+		 * command register triggers a 5ms screwup during which the master
+		 * cannot be configured		 
+		 */
+		if (device->device == agp_bridge->dev->device) {
+			printk(KERN_INFO PFX "SiS delay workaround: giving bridge time to recover.\n");
 			set_current_state(TASK_UNINTERRUPTIBLE);
 			schedule_timeout (1+(HZ*10)/1000);
 		}
@@ -219,21 +224,35 @@ static struct agp_device_ids sis_agp_dev
 };
 
 
+// chipsets that require the 'delay hack'
+static int sis_broken_chipsets[] __devinitdata = {
+	PCI_DEVICE_ID_SI_648,
+	PCI_DEVICE_ID_SI_746,
+	0 // terminator
+};
+
 static void __devinit sis_get_driver(struct agp_bridge_data *bridge)
 {
-	if (bridge->dev->device == PCI_DEVICE_ID_SI_648) {
-		if (agp_bridge->major_version == 3 && agp_bridge->minor_version < 5) {
-			sis_driver.agp_enable=sis_648_enable;
-		} else {
-			sis_driver.agp_enable			= sis_648_enable;
-			sis_driver.aperture_sizes		= agp3_generic_sizes;
-			sis_driver.size_type			= U16_APER_SIZE;
-			sis_driver.num_aperture_sizes	= AGP_GENERIC_SIZES_ENTRIES;
-			sis_driver.configure			= agp3_generic_configure;
-			sis_driver.fetch_size			= agp3_generic_fetch_size;
-			sis_driver.cleanup				= agp3_generic_cleanup;
-			sis_driver.tlb_flush			= agp3_generic_tlbflush;
-		}
+	int i;
+
+	for(i=0; sis_broken_chipsets[i]!=0; ++i)
+		if(bridge->dev->device==sis_broken_chipsets[i])
+			break;
+	
+	if(sis_broken_chipsets[i] || agp_sis_force_delay)
+		sis_driver.agp_enable=sis_delayed_enable;
+
+	// sis chipsets that indicate less than agp3.5
+	// are not actually fully agp3 compliant
+	if ((agp_bridge->major_version == 3 && agp_bridge->minor_version >= 5
+	     && agp_sis_agp_spec!=0) || agp_sis_agp_spec==1) {
+		sis_driver.aperture_sizes = agp3_generic_sizes;
+		sis_driver.size_type = U16_APER_SIZE;
+		sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
+		sis_driver.configure = agp3_generic_configure;
+		sis_driver.fetch_size = agp3_generic_fetch_size;
+		sis_driver.cleanup = agp3_generic_cleanup;
+		sis_driver.tlb_flush = agp3_generic_tlbflush;
 	}
 }
 
@@ -324,4 +343,8 @@ static void __exit agp_sis_cleanup(void)
 module_init(agp_sis_init);
 module_exit(agp_sis_cleanup);
 
+MODULE_PARM(agp_sis_force_delay,"i");
+MODULE_PARM_DESC(agp_sis_force_delay,"forces sis delay hack");
+MODULE_PARM(agp_sis_agp_spec,"i");
+MODULE_PARM_DESC(agp_sis_agp_spec,"0=force sis init, 1=force generic agp3 init, default: autodetect");
 MODULE_LICENSE("GPL and additional rights");