Re: [PATCH] Add MCE resume under ia32

Re: [PATCH] Add MCE resume under ia32

[Andi Kleen]

Shaohua Li <shaohua.li@intel.com> writes:

> x86-64 has resume support. It uses 'on_each_cpu' in resume method, which
> is known broken. We'd better fix it.

What is broken with it? 

-Andi

Re: [PATCH] Add MCE resume under ia32

[Shaohua Li]

On Wed, 2005-08-24 at 03:52 +0200, Andi Kleen wrote:
> Shaohua Li <shaohua.li@intel.com> writes:
> 
> > x86-64 has resume support. It uses 'on_each_cpu' in resume method, which
> > is known broken. We'd better fix it.
> 
> What is broken with it? 
It's a sysdev. The resume method is invoked with interrupt disabled.

Thanks,
Shaohua

Re: [PATCH] Add MCE resume under ia32

[Andi Kleen]

On Wednesday 24 August 2005 03:59, Shaohua Li wrote:
> On Wed, 2005-08-24 at 03:52 +0200, Andi Kleen wrote:
> > Shaohua Li <shaohua.li@intel.com> writes:
> > > x86-64 has resume support. It uses 'on_each_cpu' in resume method,
> > > which is known broken. We'd better fix it.
> >
> > What is broken with it?
>
> It's a sysdev. The resume method is invoked with interrupt disabled.

But only local interrupt disabled, no? 

Hmm - didn't we have a WARN_ON(irqs_disabled()) in smp_call_function().

Anyways, it'll probably still work for now because the system should
be synchronized at this point.

-Andi

Re: [PATCH] Add MCE resume under ia32

[Shaohua Li]

On Wed, 2005-08-24 at 05:12 +0200, Andi Kleen wrote:
> On Wednesday 24 August 2005 03:59, Shaohua Li wrote:
> > On Wed, 2005-08-24 at 03:52 +0200, Andi Kleen wrote:
> > > Shaohua Li <shaohua.li@intel.com> writes:
> > > > x86-64 has resume support. It uses 'on_each_cpu' in resume method,
> > > > which is known broken. We'd better fix it.
> > >
> > > What is broken with it?
> >
> > It's a sysdev. The resume method is invoked with interrupt disabled.
> 
> But only local interrupt disabled, no? 
> 
> Hmm - didn't we have a WARN_ON(irqs_disabled()) in smp_call_function().
> 
> Anyways, it'll probably still work for now because the system should
> be synchronized at this point.
We are using cpu hotplug framework for MP suspend/resume. When sysdev's
resume is calling, APs actually aren't up. So it actually can't work.

Thanks,
Shaohua

Re: [PATCH] Add MCE resume under ia32

[Andi Kleen]

[adding discuss to cc]

On Wednesday 24 August 2005 05:47, Shaohua Li wrote:
> On Wed, 2005-08-24 at 05:12 +0200, Andi Kleen wrote:
> > On Wednesday 24 August 2005 03:59, Shaohua Li wrote:
> > > On Wed, 2005-08-24 at 03:52 +0200, Andi Kleen wrote:
> > > > Shaohua Li <shaohua.li@intel.com> writes:
> > > > > x86-64 has resume support. It uses 'on_each_cpu' in resume method,
> > > > > which is known broken. We'd better fix it.
> > > >
> > > > What is broken with it?
> > >
> > > It's a sysdev. The resume method is invoked with interrupt disabled.
> >
> > But only local interrupt disabled, no?
> >
> > Hmm - didn't we have a WARN_ON(irqs_disabled()) in smp_call_function().
> >
> > Anyways, it'll probably still work for now because the system should
> > be synchronized at this point.
>
> We are using cpu hotplug framework for MP suspend/resume. When sysdev's
> resume is calling, APs actually aren't up. So it actually can't work.

Ok, that's a new problem.

There were recently some patches to add individual MCE entries
for each CPU to sysfs. They are only used for set up right now,
but perhaps they can be linked somehow to the cpu sysfs devices
and get suspend/resume events from there.


-Andi

Re: [PATCH] Add MCE resume under ia32

[Shaohua Li]

On Wed, 2005-08-24 at 05:59 +0200, Andi Kleen wrote:
> [adding discuss to cc]
> 
> On Wednesday 24 August 2005 05:47, Shaohua Li wrote:
> > On Wed, 2005-08-24 at 05:12 +0200, Andi Kleen wrote:
> > > On Wednesday 24 August 2005 03:59, Shaohua Li wrote:
> > > > On Wed, 2005-08-24 at 03:52 +0200, Andi Kleen wrote:
> > > > > Shaohua Li <shaohua.li@intel.com> writes:
> > > > > > x86-64 has resume support. It uses 'on_each_cpu' in resume method,
> > > > > > which is known broken. We'd better fix it.
> > > > >
> > > > > What is broken with it?
> > > >
> > > > It's a sysdev. The resume method is invoked with interrupt disabled.
> > >
> > > But only local interrupt disabled, no?
> > >
> > > Hmm - didn't we have a WARN_ON(irqs_disabled()) in smp_call_function().
> > >
> > > Anyways, it'll probably still work for now because the system should
> > > be synchronized at this point.
> >
> > We are using cpu hotplug framework for MP suspend/resume. When sysdev's
> > resume is calling, APs actually aren't up. So it actually can't work.
> 
> Ok, that's a new problem.
> 
> There were recently some patches to add individual MCE entries
> for each CPU to sysfs. They are only used for set up right now,
> but perhaps they can be linked somehow to the cpu sysfs devices
> and get suspend/resume events from there.
The boot code already initialized MCE for APs, it isn't required to
initialize again. The MCE entries are cpuhotplug friendly, so for
suspend/resume.

Thanks,
Shaohua

Re: [PATCH] Add MCE resume under ia32

[Andi Kleen]

On Wednesday 24 August 2005 06:16, Shaohua Li wrote:

> The boot code already initialized MCE for APs, it isn't required to
> initialize again. The MCE entries are cpuhotplug friendly, so for
> suspend/resume.

Ok so you're saying the only change needed is to remove
the on_each_cpu() in the resume method? Fine I can do that.

-Andi

Re: [PATCH] Add MCE resume under ia32

[Shaohua Li]

On Wed, 2005-08-24 at 06:26 +0200, Andi Kleen wrote:
> On Wednesday 24 August 2005 06:16, Shaohua Li wrote:
> 
> > The boot code already initialized MCE for APs, it isn't required to
> > initialize again. The MCE entries are cpuhotplug friendly, so for
> > suspend/resume.
> 
> Ok so you're saying the only change needed is to remove
> the on_each_cpu() in the resume method? Fine I can do that.
Yep, only BP needs it. But I'm not sure if we should do the same (add
the sysdev class) in ia32, considering only BP needs it.

Thanks,
Shaohua

Re: [PATCH] Add MCE resume under ia32

[Pavel Machek]

Hi!

> > > The boot code already initialized MCE for APs, it isn't required to
> > > initialize again. The MCE entries are cpuhotplug friendly, so for
> > > suspend/resume.
> > 
> > Ok so you're saying the only change needed is to remove
> > the on_each_cpu() in the resume method? Fine I can do that.
> Yep, only BP needs it. But I'm not sure if we should do the same (add
> the sysdev class) in ia32, considering only BP needs it.

Adding sysdev class is nicer than #ifdef in the code, I'd say.

								Pavel
-- 
if you have sharp zaurus hardware you don't need... you know my address

[PATCH] Add MCE resume under ia32

[Shaohua Li]

Hi,
It's widely seen a MCE non-fatal error reported after resume. It seems
MCE resume is lacked under ia32. This patch tries to fix the gap.


Signed-off-by: Shaohua Li<shaohua.li@intel.com>
---

 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/k7.c      |    2 +-
 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/mce.c     |    4 ++--
 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p4.c      |    4 ++--
 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p5.c      |    2 +-
 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p6.c      |    2 +-
 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/winchip.c |    2 +-
 linux-2.6.13-rc6-root/arch/i386/power/cpu.c                 |    5 +++++
 7 files changed, 13 insertions(+), 8 deletions(-)

diff -puN arch/i386/kernel/cpu/mcheck/k7.c~mcheck_resume arch/i386/kernel/cpu/mcheck/k7.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/k7.c~mcheck_resume	2005-08-23 09:26:53.956518776 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/k7.c	2005-08-23 09:27:15.916180400 +0800
@@ -69,7 +69,7 @@ static fastcall void k7_machine_check(st
 
 
 /* AMD K7 machine check is Intel like */
-void __devinit amd_mcheck_init(struct cpuinfo_x86 *c)
+void amd_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	int i;
diff -puN arch/i386/kernel/cpu/mcheck/mce.c~mcheck_resume arch/i386/kernel/cpu/mcheck/mce.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/mce.c~mcheck_resume	2005-08-23 09:27:40.301473272 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/mce.c	2005-08-23 09:28:17.394834224 +0800
@@ -16,7 +16,7 @@
 
 #include "mce.h"
 
-int mce_disabled __devinitdata = 0;
+int mce_disabled = 0;
 int nr_mce_banks;
 
 EXPORT_SYMBOL_GPL(nr_mce_banks);	/* non-fatal.o */
@@ -31,7 +31,7 @@ static fastcall void unexpected_machine_
 void fastcall (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check;
 
 /* This has to be run for each processor */
-void __devinit mcheck_init(struct cpuinfo_x86 *c)
+void mcheck_init(struct cpuinfo_x86 *c)
 {
 	if (mce_disabled==1)
 		return;
diff -puN arch/i386/kernel/cpu/mcheck/p4.c~mcheck_resume arch/i386/kernel/cpu/mcheck/p4.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/p4.c~mcheck_resume	2005-08-23 09:29:17.665671664 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p4.c	2005-08-23 09:29:59.738275656 +0800
@@ -78,7 +78,7 @@ fastcall void smp_thermal_interrupt(stru
 }
 
 /* P4/Xeon Thermal regulation detect and init */
-static void __devinit intel_init_thermal(struct cpuinfo_x86 *c)
+static void intel_init_thermal(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	unsigned int cpu = smp_processor_id();
@@ -232,7 +232,7 @@ static fastcall void intel_machine_check
 }
 
 
-void __devinit intel_p4_mcheck_init(struct cpuinfo_x86 *c)
+void intel_p4_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	int i;
diff -puN arch/i386/kernel/cpu/mcheck/p5.c~mcheck_resume arch/i386/kernel/cpu/mcheck/p5.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/p5.c~mcheck_resume	2005-08-23 09:29:22.504935984 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p5.c	2005-08-23 09:30:12.610318808 +0800
@@ -29,7 +29,7 @@ static fastcall void pentium_machine_che
 }
 
 /* Set up machine check reporting for processors with Intel style MCE */
-void __devinit intel_p5_mcheck_init(struct cpuinfo_x86 *c)
+void intel_p5_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	
diff -puN arch/i386/kernel/cpu/mcheck/p6.c~mcheck_resume arch/i386/kernel/cpu/mcheck/p6.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/p6.c~mcheck_resume	2005-08-23 09:29:25.030552032 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p6.c	2005-08-23 09:30:26.595192784 +0800
@@ -80,7 +80,7 @@ static fastcall void intel_machine_check
 }
 
 /* Set up machine check reporting for processors with Intel style MCE */
-void __devinit intel_p6_mcheck_init(struct cpuinfo_x86 *c)
+void intel_p6_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	int i;
diff -puN arch/i386/kernel/cpu/mcheck/winchip.c~mcheck_resume arch/i386/kernel/cpu/mcheck/winchip.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/winchip.c~mcheck_resume	2005-08-23 09:29:34.589098912 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/winchip.c	2005-08-23 09:30:42.652751664 +0800
@@ -23,7 +23,7 @@ static fastcall void winchip_machine_che
 }
 
 /* Set up machine check reporting on the Winchip C6 series */
-void __devinit winchip_mcheck_init(struct cpuinfo_x86 *c)
+void winchip_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 lo, hi;
 	machine_check_vector = winchip_machine_check;
diff -puN arch/i386/power/cpu.c~mcheck_resume arch/i386/power/cpu.c
--- linux-2.6.13-rc6/arch/i386/power/cpu.c~mcheck_resume	2005-08-23 09:32:13.054008584 +0800
+++ linux-2.6.13-rc6-root/arch/i386/power/cpu.c	2005-08-23 09:41:54.992540480 +0800
@@ -104,6 +104,8 @@ static void fix_processor_context(void)
 
 }
 
+extern void mcheck_init(struct cpuinfo_x86 *c);
+
 void __restore_processor_state(struct saved_context *ctxt)
 {
 	/*
@@ -138,6 +140,9 @@ void __restore_processor_state(struct sa
 	fix_processor_context();
 	do_fpu_end();
 	mtrr_ap_init();
+#ifdef CONFIG_X86_MCE
+	mcheck_init(&boot_cpu_data);
+#endif
 }
 
 void restore_processor_state(void)
_

Re: [PATCH] Add MCE resume under ia32

[Pavel Machek]

Hi!

> It's widely seen a MCE non-fatal error reported after resume. It seems
> MCE resume is lacked under ia32. This patch tries to fix the gap.

Well, you patch seems like missing piece of puzzle, but:

a) we probably want to do it for x86-64, too, and 

b)

> diff -puN arch/i386/power/cpu.c~mcheck_resume arch/i386/power/cpu.c
> --- linux-2.6.13-rc6/arch/i386/power/cpu.c~mcheck_resume	2005-08-23 09:32:13.054008584 +0800
> +++ linux-2.6.13-rc6-root/arch/i386/power/cpu.c	2005-08-23 09:41:54.992540480 +0800
> @@ -104,6 +104,8 @@ static void fix_processor_context(void)
>  
>  }
>  
> +extern void mcheck_init(struct cpuinfo_x86 *c);
> +
>  void __restore_processor_state(struct saved_context *ctxt)
>  {
>  	/*


this should go to some header file and most importantly

> @@ -138,6 +140,9 @@ void __restore_processor_state(struct sa
>  	fix_processor_context();
>  	do_fpu_end();
>  	mtrr_ap_init();
> +#ifdef CONFIG_X86_MCE
> +	mcheck_init(&boot_cpu_data);
> +#endif
>  }

c) can't we register MCEs like some kind of system device so that this
kind of hooks is not neccessary?
								Pavel
-- 
if you have sharp zaurus hardware you don't need... you know my address

Re: [PATCH] Add MCE resume under ia32

[Shaohua Li]

On Tue, 2005-08-23 at 12:32 +0200, Pavel Machek wrote:
> > It's widely seen a MCE non-fatal error reported after resume. It seems
> > MCE resume is lacked under ia32. This patch tries to fix the gap.
> 
> Well, you patch seems like missing piece of puzzle, but:
> 
> a) we probably want to do it for x86-64, too, and 
x86-64 has resume support. It uses 'on_each_cpu' in resume method, which
is known broken. We'd better fix it.

> 
> > diff -puN arch/i386/power/cpu.c~mcheck_resume arch/i386/power/cpu.c
> > --- linux-2.6.13-rc6/arch/i386/power/cpu.c~mcheck_resume	2005-08-23 09:32:13.054008584 +0800
> > +++ linux-2.6.13-rc6-root/arch/i386/power/cpu.c	2005-08-23 09:41:54.992540480 +0800
> > @@ -104,6 +104,8 @@ static void fix_processor_context(void)
> >  
> >  }
> >  
> > +extern void mcheck_init(struct cpuinfo_x86 *c);
> > +
> >  void __restore_processor_state(struct saved_context *ctxt)
> >  {
> >  	/*
> 
> 
> this should go to some header file and most importantly
If you agree my other points, I'll do this.

> 
> > @@ -138,6 +140,9 @@ void __restore_processor_state(struct sa
> >  	fix_processor_context();
> >  	do_fpu_end();
> >  	mtrr_ap_init();
> > +#ifdef CONFIG_X86_MCE
> > +	mcheck_init(&boot_cpu_data);
> > +#endif
> >  }
> 
> c) can't we register MCEs like some kind of system device so that this
> kind of hooks is not neccessary?
Like x86-64 does, right? In this way, we must register a device for each
cpu. But APs directly call mcheck_init in resume time (cpuhotplug
framework). Only BP requires to call the resume method, so I think
restore_processor_state calls it might be cleaner. 

Thanks,
Shaohua

Re: [PATCH] Add MCE resume under ia32

[Pavel Machek]

Hi!

> > > diff -puN arch/i386/power/cpu.c~mcheck_resume arch/i386/power/cpu.c
> > > --- linux-2.6.13-rc6/arch/i386/power/cpu.c~mcheck_resume	2005-08-23 09:32:13.054008584 +0800
> > > +++ linux-2.6.13-rc6-root/arch/i386/power/cpu.c	2005-08-23 09:41:54.992540480 +0800
> > > @@ -104,6 +104,8 @@ static void fix_processor_context(void)
> > >  
> > >  }
> > >  
> > > +extern void mcheck_init(struct cpuinfo_x86 *c);
> > > +
> > >  void __restore_processor_state(struct saved_context *ctxt)
> > >  {
> > >  	/*
> > 
> > 
> > this should go to some header file and most importantly
> If you agree my other points, I'll do this.

Ok.

> > > @@ -138,6 +140,9 @@ void __restore_processor_state(struct sa
> > >  	fix_processor_context();
> > >  	do_fpu_end();
> > >  	mtrr_ap_init();
> > > +#ifdef CONFIG_X86_MCE
> > > +	mcheck_init(&boot_cpu_data);
> > > +#endif
> > >  }
> > 
> > c) can't we register MCEs like some kind of system device so that this
> > kind of hooks is not neccessary?
> Like x86-64 does, right? In this way, we must register a device for each
> cpu. But APs directly call mcheck_init in resume time (cpuhotplug
> framework). Only BP requires to call the resume method, so I think
> restore_processor_state calls it might be cleaner. 

Ahha, ok.
								Pavel
-- 
if you have sharp zaurus hardware you don't need... you know my address

Re: [PATCH] Add MCE resume under ia32

[Shaohua Li]

On Wed, 2005-08-24 at 10:50 +0200, Pavel Machek wrote:
> Hi!
> 
> > > > diff -puN arch/i386/power/cpu.c~mcheck_resume arch/i386/power/cpu.c
> > > > --- linux-2.6.13-rc6/arch/i386/power/cpu.c~mcheck_resume	2005-08-23 09:32:13.054008584 +0800
> > > > +++ linux-2.6.13-rc6-root/arch/i386/power/cpu.c	2005-08-23 09:41:54.992540480 +0800
> > > > @@ -104,6 +104,8 @@ static void fix_processor_context(void)
> > > >  
> > > >  }
> > > >  
> > > > +extern void mcheck_init(struct cpuinfo_x86 *c);
> > > > +
> > > >  void __restore_processor_state(struct saved_context *ctxt)
> > > >  {
> > > >  	/*
> > > 
> > > 
> > > this should go to some header file and most importantly
> > If you agree my other points, I'll do this.
Ok, updated one.
Reinitialize MCE to avoid MCE non-fatal warning after resume.

Signed-off-by: Shaohua Li<shaohua.li@intel.com>
---

 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/common.c         |    5 +----
 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/k7.c      |    2 +-
 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/mce.c     |    4 ++--
 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p4.c      |    4 ++--
 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p5.c      |    2 +-
 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p6.c      |    2 +-
 linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/winchip.c |    2 +-
 linux-2.6.13-rc6-root/arch/i386/power/cpu.c                 |    1 +
 linux-2.6.13-rc6-root/include/asm-i386/processor.h          |    6 ++++++
 9 files changed, 16 insertions(+), 12 deletions(-)

diff -puN arch/i386/kernel/cpu/mcheck/k7.c~mcheck_resume arch/i386/kernel/cpu/mcheck/k7.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/k7.c~mcheck_resume	2005-08-24 17:00:32.000000000 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/k7.c	2005-08-24 17:00:32.000000000 +0800
@@ -69,7 +69,7 @@ static fastcall void k7_machine_check(st
 
 
 /* AMD K7 machine check is Intel like */
-void __devinit amd_mcheck_init(struct cpuinfo_x86 *c)
+void amd_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	int i;
diff -puN arch/i386/kernel/cpu/mcheck/mce.c~mcheck_resume arch/i386/kernel/cpu/mcheck/mce.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/mce.c~mcheck_resume	2005-08-24 17:00:32.000000000 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/mce.c	2005-08-24 17:00:32.000000000 +0800
@@ -16,7 +16,7 @@
 
 #include "mce.h"
 
-int mce_disabled __devinitdata = 0;
+int mce_disabled = 0;
 int nr_mce_banks;
 
 EXPORT_SYMBOL_GPL(nr_mce_banks);	/* non-fatal.o */
@@ -31,7 +31,7 @@ static fastcall void unexpected_machine_
 void fastcall (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check;
 
 /* This has to be run for each processor */
-void __devinit mcheck_init(struct cpuinfo_x86 *c)
+void mcheck_init(struct cpuinfo_x86 *c)
 {
 	if (mce_disabled==1)
 		return;
diff -puN arch/i386/kernel/cpu/mcheck/p4.c~mcheck_resume arch/i386/kernel/cpu/mcheck/p4.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/p4.c~mcheck_resume	2005-08-24 17:00:32.000000000 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p4.c	2005-08-24 17:00:32.000000000 +0800
@@ -78,7 +78,7 @@ fastcall void smp_thermal_interrupt(stru
 }
 
 /* P4/Xeon Thermal regulation detect and init */
-static void __devinit intel_init_thermal(struct cpuinfo_x86 *c)
+static void intel_init_thermal(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	unsigned int cpu = smp_processor_id();
@@ -232,7 +232,7 @@ static fastcall void intel_machine_check
 }
 
 
-void __devinit intel_p4_mcheck_init(struct cpuinfo_x86 *c)
+void intel_p4_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	int i;
diff -puN arch/i386/kernel/cpu/mcheck/p5.c~mcheck_resume arch/i386/kernel/cpu/mcheck/p5.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/p5.c~mcheck_resume	2005-08-24 17:00:32.000000000 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p5.c	2005-08-24 17:00:32.000000000 +0800
@@ -29,7 +29,7 @@ static fastcall void pentium_machine_che
 }
 
 /* Set up machine check reporting for processors with Intel style MCE */
-void __devinit intel_p5_mcheck_init(struct cpuinfo_x86 *c)
+void intel_p5_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	
diff -puN arch/i386/kernel/cpu/mcheck/p6.c~mcheck_resume arch/i386/kernel/cpu/mcheck/p6.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/p6.c~mcheck_resume	2005-08-24 17:00:32.000000000 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/p6.c	2005-08-24 17:00:32.000000000 +0800
@@ -80,7 +80,7 @@ static fastcall void intel_machine_check
 }
 
 /* Set up machine check reporting for processors with Intel style MCE */
-void __devinit intel_p6_mcheck_init(struct cpuinfo_x86 *c)
+void intel_p6_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	int i;
diff -puN arch/i386/kernel/cpu/mcheck/winchip.c~mcheck_resume arch/i386/kernel/cpu/mcheck/winchip.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/mcheck/winchip.c~mcheck_resume	2005-08-24 17:00:32.000000000 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/mcheck/winchip.c	2005-08-24 17:00:32.000000000 +0800
@@ -23,7 +23,7 @@ static fastcall void winchip_machine_che
 }
 
 /* Set up machine check reporting on the Winchip C6 series */
-void __devinit winchip_mcheck_init(struct cpuinfo_x86 *c)
+void winchip_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 lo, hi;
 	machine_check_vector = winchip_machine_check;
diff -puN arch/i386/power/cpu.c~mcheck_resume arch/i386/power/cpu.c
--- linux-2.6.13-rc6/arch/i386/power/cpu.c~mcheck_resume	2005-08-24 17:00:32.000000000 +0800
+++ linux-2.6.13-rc6-root/arch/i386/power/cpu.c	2005-08-24 17:07:00.000000000 +0800
@@ -138,6 +138,7 @@ void __restore_processor_state(struct sa
 	fix_processor_context();
 	do_fpu_end();
 	mtrr_ap_init();
+	mcheck_init(&boot_cpu_data);
 }
 
 void restore_processor_state(void)
diff -puN include/asm-i386/processor.h~mcheck_resume include/asm-i386/processor.h
--- linux-2.6.13-rc6/include/asm-i386/processor.h~mcheck_resume	2005-08-23 09:43:33.000000000 +0800
+++ linux-2.6.13-rc6-root/include/asm-i386/processor.h	2005-08-24 17:07:10.000000000 +0800
@@ -702,4 +702,10 @@ extern void mtrr_bp_init(void);
 #define mtrr_bp_init() do {} while (0)
 #endif
 
+#ifdef CONFIG_X86_MCE
+extern void mcheck_init(struct cpuinfo_x86 *c);
+#else
+#define mcheck_init(c) do {} while(0)
+#endif
+
 #endif /* __ASM_I386_PROCESSOR_H */
diff -puN arch/i386/kernel/cpu/common.c~mcheck_resume arch/i386/kernel/cpu/common.c
--- linux-2.6.13-rc6/arch/i386/kernel/cpu/common.c~mcheck_resume	2005-08-24 17:07:50.000000000 +0800
+++ linux-2.6.13-rc6-root/arch/i386/kernel/cpu/common.c	2005-08-24 17:08:16.000000000 +0800
@@ -30,8 +30,6 @@ static int disable_x86_serial_nr __devin
 
 struct cpu_dev * cpu_devs[X86_VENDOR_NUM] = {};
 
-extern void mcheck_init(struct cpuinfo_x86 *c);
-
 extern int disable_pse;
 
 static void default_init(struct cpuinfo_x86 * c)
@@ -429,9 +427,8 @@ void __devinit identify_cpu(struct cpuin
 	}
 
 	/* Init Machine Check Exception if available. */
-#ifdef CONFIG_X86_MCE
 	mcheck_init(c);
-#endif
+
 	if (c == &boot_cpu_data)
 		sysenter_setup();
 	enable_sep_cpu();
_

Re: [PATCH] Add MCE resume under ia32

[Pavel Machek]

On Čt 25-08-05 10:36:31, Shaohua Li wrote:
> On Wed, 2005-08-24 at 10:50 +0200, Pavel Machek wrote:
> > Hi!
> > 
> > > > > diff -puN arch/i386/power/cpu.c~mcheck_resume arch/i386/power/cpu.c
> > > > > --- linux-2.6.13-rc6/arch/i386/power/cpu.c~mcheck_resume	2005-08-23 09:32:13.054008584 +0800
> > > > > +++ linux-2.6.13-rc6-root/arch/i386/power/cpu.c	2005-08-23 09:41:54.992540480 +0800
> > > > > @@ -104,6 +104,8 @@ static void fix_processor_context(void)
> > > > >  
> > > > >  }
> > > > >  
> > > > > +extern void mcheck_init(struct cpuinfo_x86 *c);
> > > > > +
> > > > >  void __restore_processor_state(struct saved_context *ctxt)
> > > > >  {
> > > > >  	/*
> > > > 
> > > > 
> > > > this should go to some header file and most importantly
> > > If you agree my other points, I'll do this.
> Ok, updated one.
> Reinitialize MCE to avoid MCE non-fatal warning after resume.

ACK.
							Pavel

-- 
if you have sharp zaurus hardware you don't need... you know my address