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Subject: Re: question on memory barrier
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Andy Isaacson <adi@hexapodia.org>,
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Date: Wed, 24 Aug 2005 22:45:35 +0100
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On Mer, 2005-08-24 at 12:53 -0700, Jesse Barnes wrote:
> writel() ensures ordering?  Only from one CPU, another CPU issuing a 
> write at some later time may have its write arrive first.  See 
> Documentation/io_ordering.txt for some documentation I put together on 
> this issue.

And in more detail from the deviceiobook..

      <para>
        In addition to write posting, on some large multiprocessing
systems
        (e.g. SGI Challenge, Origin and Altix machines) posted writes
won't
        be strongly ordered coming from different CPUs.  Thus it's
important
        to properly protect parts of your driver that do memory-mapped
writes
        with locks and use the <function>mmiowb</function> to make sure
they
        arrive in the order intended.  Issuing a regular <function>readX
        </function> will also ensure write ordering, but should only be
used
        when the driver has to be sure that the write has actually
arrived
        at the device (not that it's simply ordered with respect to
other
        writes), since a full <function>readX</function> is a relatively
        expensive operation.
      </para>