From: Rohit Seth <rohit.seth@intel.com>
To: Andi Kleen <ak@suse.de>
Cc: Ravikiran G Thirumalai <kiran@scalex86.org>,
Andrew Morton <akpm@osdl.org>,
linux-kernel@vger.kernel.org, discuss@x86-64.org,
zach@vmware.com, shai@scalex86.org, nippung@calsoftinc.com
Subject: Re: [discuss] [patch] x86_64: align and pad x86_64 GDT on page boundary
Date: Thu, 08 Dec 2005 15:26:07 -0800 [thread overview]
Message-ID: <1134084367.7131.32.camel@akash.sc.intel.com> (raw)
In-Reply-To: <20051208231141.GX11190@wotan.suse.de>
On Fri, 2005-12-09 at 00:11 +0100, Andi Kleen wrote:
> On Thu, Dec 08, 2005 at 03:09:17PM -0800, Rohit Seth wrote:
> >
> > IIRC, Zach's patches for gdt alignment, moved the gdts from per_cpu data
> > structure to each secondary CPU dynamically allocating page for its gdt.
>
> Kiran's patch does this too. Except for the BP GDT, which could
> be shared with the single IDT.
>
...that padding in BP's GDT (in this and original patches) could be
because of the Xen requirements to have dedicated pages for gdt.
-rohit
next prev parent reply other threads:[~2005-12-08 23:20 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-12-08 19:42 [patch] x86_64: align and pad x86_64 GDT on page boundary Ravikiran G Thirumalai
2005-12-08 20:15 ` [discuss] " Andi Kleen
2005-12-08 21:55 ` Ravikiran G Thirumalai
2005-12-08 23:09 ` Rohit Seth
2005-12-08 23:11 ` Andi Kleen
2005-12-08 23:26 ` Rohit Seth [this message]
2005-12-08 23:26 ` Andi Kleen
2005-12-08 23:45 ` Rohit Seth
2005-12-08 23:43 ` Andi Kleen
2005-12-09 22:19 ` Ravikiran G Thirumalai
2005-12-09 22:57 ` Andi Kleen
2005-12-09 23:01 ` Rohit Seth
2005-12-09 22:59 ` Andi Kleen
2005-12-09 23:46 ` Ravikiran G Thirumalai
2005-12-12 2:34 ` Zwane Mwaikambo
2005-12-12 2:31 ` Andi Kleen
2005-12-12 2:38 ` Zwane Mwaikambo
2005-12-08 23:50 ` Rohit Seth
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