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From: zhangsenchuan <zhangsenchuan@eswincomputing.com>
To: "Manivannan Sadhasivam" <mani@kernel.org>
Cc: bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org,
	lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org,
	p.zabel@pengutronix.de, jingoohan1@gmail.com,
	gustavo.pimentel@synopsys.com, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	christian.bruel@foss.st.com, mayank.rana@oss.qualcomm.com,
	shradha.t@samsung.com, krishna.chundru@oss.qualcomm.com,
	thippeswamy.havalige@amd.com, inochiama@gmail.com,
	ningyu@eswincomputing.com, linmin@eswincomputing.com,
	pinkesh.vaghela@einfochips.com, ouyanghui@eswincomputing.com,
	Frank.li@nxp.com
Subject: Re: Re: [PATCH v6 3/3] PCI: dwc: Add no_suspport_L2 flag and skip PME_Turn_Off broadcast
Date: Fri, 21 Nov 2025 14:48:20 +0800 (GMT+08:00)	[thread overview]
Message-ID: <11367b43.6d3.19aa52bc596.Coremail.zhangsenchuan@eswincomputing.com> (raw)
In-Reply-To: <dux47crrf6ranvexkpzw667hzmkgfguqadseco52svgvglalye@alxqq4ybu672>




> -----Original Messages-----
> From: "Manivannan Sadhasivam" <mani@kernel.org>
> Send time:Thursday, 20/11/2025 20:45:38
> To: zhangsenchuan@eswincomputing.com
> Cc: bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org, p.zabel@pengutronix.de, jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, christian.bruel@foss.st.com, mayank.rana@oss.qualcomm.com, shradha.t@samsung.com, krishna.chundru@oss.qualcomm.com, thippeswamy.havalige@amd.com, inochiama@gmail.com, ningyu@eswincomputing.com, linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com, ouyanghui@eswincomputing.com, Frank.li@nxp.com
> Subject: Re: [PATCH v6 3/3] PCI: dwc: Add no_suspport_L2 flag and skip PME_Turn_Off broadcast
> 
> On Thu, Nov 20, 2025 at 06:12:35PM +0800, zhangsenchuan@eswincomputing.com wrote:
> > From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> > 
> > The ESWIN EIC7700 soc does not support enter L2 link state. Therefore add
> > no_suspport_L2 flag skip PME_Turn_Off broadcast and link state check code,
> > other driver can reuse this flag if meet the similar situation.
> > 
> > Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
> > Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
> > Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> 
> Does this patch work for you?
> https://lore.kernel.org/linux-pci/20251119-pci-dwc-suspend-rework-v1-1-aad104828562@oss.qualcomm.com/

if the PCIe link is not up, this suits me too, but if the PCIe link up, 
our hardware does not support entering the L2 link state. At this point, 
it is also necessary to skip the broadcast PME_Turn_Off message and wait
for L2 transition.

Kind regards,
Senchuan Zhang

> 
> > ---
> >  drivers/pci/controller/dwc/pcie-designware-host.c | 4 ++++
> >  drivers/pci/controller/dwc/pcie-designware.h      | 1 +
> >  2 files changed, 5 insertions(+)
> > 
> > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> > index e92513c5bda5..a203577606e5 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > @@ -1156,6 +1156,9 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
> >  	if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1)
> >  		return 0;
> > 
> > +	if (pci->no_suspport_L2)
> > +		goto stop_link;
> > +
> >  	if (pci->pp.ops->pme_turn_off) {
> >  		pci->pp.ops->pme_turn_off(&pci->pp);
> >  	} else {
> > @@ -1182,6 +1185,7 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
> >  	 */
> >  	udelay(1);
> > 
> > +stop_link:
> >  	dw_pcie_stop_link(pci);
> >  	if (pci->pp.ops->deinit)
> >  		pci->pp.ops->deinit(&pci->pp);
> > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> > index e995f692a1ec..170a73299ce5 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware.h
> > +++ b/drivers/pci/controller/dwc/pcie-designware.h
> > @@ -539,6 +539,7 @@ struct dw_pcie {
> >  	 * use_parent_dt_ranges to true to avoid this warning.
> >  	 */
> >  	bool			use_parent_dt_ranges;
> > +	bool			no_suspport_L2;
> >  };
> > 
> >  #define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp)
> > --
> > 2.25.1
> > 
> 
> -- 
> மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2025-11-21  6:48 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-20 10:10 [PATCH v6 0/3] Add driver support for Eswin EIC7700 SoC PCIe controller zhangsenchuan
2025-11-20 10:11 ` [PATCH v6 1/3] dt-bindings: PCI: eic7700: Add Eswin PCIe host controller zhangsenchuan
2025-11-20 10:12 ` [PATCH v6 2/3] PCI: eic7700: Add Eswin PCIe host controller driver zhangsenchuan
2025-11-20 12:43   ` Manivannan Sadhasivam
2025-11-26 12:15     ` zhangsenchuan
2025-11-26 13:14       ` Manivannan Sadhasivam
2025-11-28  8:26         ` zhangsenchuan
2025-11-28 15:07           ` Manivannan Sadhasivam
2025-11-20 13:19   ` Shawn Lin
2025-11-26 12:23     ` zhangsenchuan
2025-11-20 10:12 ` [PATCH v6 3/3] PCI: dwc: Add no_suspport_L2 flag and skip PME_Turn_Off broadcast zhangsenchuan
2025-11-20 12:45   ` Manivannan Sadhasivam
2025-11-21  6:48     ` zhangsenchuan [this message]
2025-11-21  7:14       ` Shawn Lin
2025-11-24  9:53         ` zhangsenchuan

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