RE: Dual core Athlons and unsynced TSCs

Lee Revell
2006-01-13T17:47:47Z

On Fri, 2006-01-13 at 11:04 -0500, Steven Rostedt wrote:
> On Fri, 2006-01-13 at 09:10 -0600, Roger Heflin wrote:
> >
> > > -----Original Message-----
> > > From: linux-kernel-owner@vger.kernel.org
> > > [mailto:linux-kernel-owner@vger.kernel.org] On Behalf Of Lee Revell
> > > Sent: Thursday, January 12, 2006 4:18 PM
> > > To: linux-kernel
> > > Subject: Dual core Athlons and unsynced TSCs
> > >
> > > It's been known for quite some time that the TSCs are not
> > > synced between cores on Athlon X2 machines and this screws up
> > > the kernel's timekeeping, as it still uses the TSC as the
> > > default time source on these machines.
> > >
> > > This problem still seems to be present in the latest kernels.
> > > What is the plan to fix it? Is the fix simply to make the
> > > kernel use the ACPI PM timer by default on Athlon X2?
> >
> >
> > Do we know if this also affects dual-core opterons?
> >
> > The symptoms are that the clocks run at 2x the speed, correct?
>
> No, worse. The monotonic clock can go backwards. The tscs of the CPUs
> are not in sync when one slows down due to idle. So if you read from
> two different CPUs, you may get the second read have an earlier time
> than the first. Breaks the rule of what a monotonic clock is.
>

Steve,

I don't have hardware to test this, can you confirm that the only
workaround needed is to boot with "clock=pmtmr"?

Lee