Re: Dual core Athlons and unsynced TSCs

[Lee Revell <rlrevell@joe-job.com>]

On Fri, 2006-01-13 at 10:56 -0800, Sven-Thorsten Dietrich wrote:
> On Fri, 2006-01-13 at 10:55 -0800, thockin@hockin.org wrote:
> > On Fri, Jan 13, 2006 at 01:09:51PM -0500, Lee Revell wrote:
> > > > Some apps/users need higher resolution and lower overhead that only rdtsc
> > > > can offer currently.
> > > 
> > > But obviously if the TSC gives wildly inaccurate results, it cannot be
> > > used no matter how low the overhead.
> > 
> > unless we can re-sync the TSCs often enough that apps don't notice.
> > 
> 
> You'd have to quantify that somehow, in terms of the max drift rate
> (ppm), and the max resolution available (< tsc frequency).  
> 
> Either that, or track an offset, and use one TSC as truth, and update
> the correction factor for the other TSCs as often as needed, maybe?
> 
> This is kind of analogous to the "drift" NTP calculates against a
> free-running oscillator. 
> 
> So you'd be pushing that functionality deeper into the OS-core.
> 
> Dave Mills had that "hardpps" stuff in there for a while, it might be a
> starting point.
> 
> Just some thoughts for now... 
> 

It kind of makes you wonder what in the heck AMD were thinking, whether
they realized that this design decision would cause so many problems at
the OS level (it's broken at least Linux and Solaris).  Maybe Windows
keeps time in a way that was unaffected by this?

Lee